Evidence for stratospheric sudden warming effects on the upper thermosphere derived from satellite orbital decay data during 1967–2013

We investigate possible impact of stratospheric sudden warmings (SSWs) on the thermosphere by using long-term data of the global average thermospheric total mass density derived from satellite orbital drag during 1967–2013. Residuals are analyzed between the data and empirical Global Average Mass Density Model (GAMDM) that takes into account density variability due to solar activity, season, geomagnetic activity, and long-term trend. A superposed epoch analysis of 37 SSW events reveals a density reduction of 3–7% at 250–575 km around the time of maximum polar vortex weakening. The relative density perturbation is found to be greater at higher altitudes. The temperature perturbation is estimated to be −7.0 K at 400 km. We show that the density reduction can arise from enhanced wave forcing from the lower atmosphere

Gotcha! I Know What You are Doing on the FPGA Cloud: Fingerprinting Co-Located Cloud FPGA Accelerators via Measuring Communication Links

In recent decades, due to the emerging requirements of computation acceleration, cloud FPGAs have become popular in public clouds. Major cloud service providers, e.g. AWS and Microsoft Azure have provided FPGA computing resources in their infrastructure and have enabled users to design and deploy their own accelerators on these FPGAs. Multi-tenancy FPGAs, where multiple users can share the same FPGA fabric with certain types of isolation to improve resource efficiency, have already been proved feasible. However, this also raises security concerns. Various types of side-channel attacks targeting multi-tenancy FPGAs have been proposed and validated. The awareness of security vulnerabilities in the cloud has motivated cloud providers to take action to enhance the security of their cloud environments. In FPGA security research papers, researchers always perform attacks under the assumption that attackers successfully co-locate with victims and are aware of the existence of victims on the same FPGA board. However, the way to reach this point, i.e., how attackers secretly obtain information regarding accelerators on the same fabric, is constantly ignored despite the fact that it is non-trivial and important for attackers. In this paper, we present a novel fingerprinting attack to gain the types of co-located FPGA accelerators. We utilize a seemingly non-malicious benchmark accelerator to sniff the communication link and collect performance traces of the FPGA-host communication link. By analyzing these traces, we are able to achieve high classification accuracy for fingerprinting co-located accelerators, which proves that attackers can use our method to perform cloud FPGA accelerator fingerprinting with a high success rate. As far as we know, this is the first paper targeting multi-tenant FPGA accelerator fingerprinting with the communication side-channel.Comment: To be published in ACM CCS 202

Patch Materials for Pulmonary Artery Arterioplasty and Right Ventricular Outflow Tract Augmentation: A Review

Patch augmentation of the right ventricular outflow tract (RVOT) and pulmonary artery (PA) arterioplasty are relatively common procedures in the surgical treatment of patients with congenital heart disease. To date, several patch materials have been applied with no agreed upon clinical standard. Each patch type has unique performance characteristics, cost, and availability. There are limited data describing the various advantages and disadvantages of different patch materials. We performed a review of studies describing the clinical performance of various RVOT and PA patch materials and found a limited but growing body of literature. Short-term clinical performance has been reported for a multitude of patch types, but comparisons are limited by inconsistent study design and scarce histologic data. Standard clinical criteria for assessment of patch efficacy and criteria for intervention need to be applied across patch types. The field is progressing with improvements in outcomes due to newer patch technologies focused on reducing antigenicity and promoting neotissue formation which may have the ability to grow, remodel, and repair

The Solenoidal Large Intensity Device (SoLID) for JLab 12 GeV

The Solenoidal Large Intensity Device (SoLID) is a new experimental apparatus planned for Hall A at the Thomas Jefferson National Accelerator Facility (JLab). SoLID will combine large angular and momentum acceptance with the capability to handle very high data rates at high luminosity. With a slate of approved high-impact physics experiments, SoLID will push JLab to a new limit at the QCD intensity frontier that will exploit the full potential of its 12 GeV electron beam. In this paper, we present an overview of the rich physics program that can be realized with SoLID, which encompasses the tomography of the nucleon in 3-D momentum space from Semi-Inclusive Deep Inelastic Scattering (SIDIS), expanding the phase space in the search for new physics and novel hadronic effects in parity-violating DIS (PVDIS), a precision measurement of $J/\psi$ production at threshold that probes the gluon field and its contribution to the proton mass, tomography of the nucleon in combined coordinate and momentum space with deep exclusive reactions, and more. To meet the challenging requirements, the design of SoLID described here takes full advantage of recent progress in detector, data acquisition and computing technologies. In addition, we outline potential experiments beyond the currently approved program and discuss the physics that could be explored should upgrades of CEBAF become a reality in the future.Comment: This white paper for the SoLID program at Jefferson Lab was prepared in part as an input to the 2023 NSAC Long Range Planning exercise. To be submitted to J. Phys.

Optimizing Staining Protocols for Laser Microdissection of Specific Cell Types from the Testis Including Carcinoma In Situ

Microarray and RT-PCR based methods are important tools for analysis of gene expression; however, in tissues containing many different cells types, such as the testis, characterization of gene expression in specific cell types can be severely hampered by noise from other cells. The laser microdissection technology allows for enrichment of specific cell types. However, when the cells are not morphologically distinguishable, it is necessary to use a specific staining method for the target cells. In this study we have tested different fixatives, storage conditions for frozen sections and staining protocols, and present two staining protocols for frozen sections, one for fast and specific staining of fetal germ cells, testicular carcinoma in situ cells, and other cells with embryonic stem cell-like properties that express the alkaline phosphatase, and one for specific staining of lipid droplet-containing cells, which is useful for isolation of the androgen-producing Leydig cells. Both protocols retain a morphology that is compatible with laser microdissection and yield RNA of a quality suitable for PCR and microarray analysis

Compartmental Genomics in Living Cells Revealed by Single-Cell Nanobiopsy

The ability to study the molecular biology of living single cells in heterogeneous cell populations is essential for next generation analysis of cellular circuitry and function. Here, we developed a single-cell nanobiopsy platform based on scanning ion conductance microscopy (SICM) for continuous sampling of intracellular content from individual cells. The nanobiopsy platform uses electrowetting within a nanopipette to extract cellular material from living cells with minimal disruption of the cellular milieu. We demonstrate the subcellular resolution of the nanobiopsy platform by isolating small subpopulations of mitochondria from single living cells, and quantify mutant mitochondrial genomes in those single cells with high throughput sequencing technology. These findings may provide the foundation for dynamic subcellular genomic analysis

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Partial Reconfiguration of FPGA Mapped Designs with Applications to Fault Tolerance and Yield Enhancement

Field-programmable gate arrays have the potential to provide reconfigurability in the presence of faults. In this paper, we have investigated the problem of partially reconfiguring FPGA mapped designs. We present a maximum matching based algorithm to reconfigure the placement on an FPGA with little or no impact on circuit performance. Experimental results indicate the algorithm works well for both fault tolerance and reconfigurable computing applications. We also present the motivation and feasibility of using a similar approach for dynamic circuit reconfigurability