61 research outputs found

    Results from CHIPIX-FE0, a Small Scale Prototype of a New Generation Pixel Readout ASIC in 65nm CMOS for HL-LHC

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    CHIPIX65-FE0 is a readout ASIC in CMOS 65nm designed by the CHIPIX65 project for a pixel detector at the HL-LHC, consisting of a matrix of 64x64 pixels of dimension 50x50 μm2. It is fully functional, can work at low thresholds down to 250e− and satisfies all the specifications. Results confirm low-noise, fast performance of both the synchronous and asynchronous front-end in a complex digital chip. CHIPIX65-FE0 has been irradiated up to 600 Mrad and is only marginally affected on analog performance. Further irradiation to 1 Grad will be performed. Bump bonding to silicon sensors is now on going and detailed measurements will be presented. The HL-LHC accelerator will constitute a new frontier for particle physics after year 2024. One major experimental challenge resides in the inner tracking detectors, measuring particle position: here the dimension of the sensitive area (pixel) has to be scaled down with respect to LHC detectors. This paper describes the results obtained by CHIPIX65-FE0, a readout ASIC in CMOS 65nm designed by the CHIPIX65 project as small-scale demonstrator for a pixel detector at the HL-LHC. It consists of a matrix of 64x64 pixels of dimension 50x50 um2 pixels and contains several pieces that are included in RD53A, a large scale ASIC designed by the RD53 Collaboration: two out of three front-ends (a synchronous and an asynchronous architecture); several building blocks; a (4x4) pixel region digital architecture with central local buffer storage, complying with a 3 GHz/cm2 hit rate and a 1 MHz trigger rate maintaining a very high efficiency (above 99%). The chip is 100% functional, either running in triggered or trigger-less mode. All building-blocks (DAC, ADC, Band Gap, SER, sLVS-TX/RX) and very front ends are working as expected. Analog performance shows a remarkably low ENC of 90e-, a fast-rise time below 25ns and low-power consumption (about 4μA/pixel) in both synchronous and asynchronous front-ends; a very linear behavior of CSA and discriminator. No significant cross talk from digital electronics has been measured, achieving a low threshold of 250e-. Signal digitization is obtained with a 5b-Time over Threshold technique and is shown to be fairly linear, working well either at 80 MHz or with higher frequencies of 300 MHz obtained with a tunable local oscillator. Irradiation results up to 600 Mrad at low temperature (-20°C) show that the chip is still fully functional and analog performance is only marginally degraded. Further irradiation will be performed up to 1 Grad either at low or room temperature, to further understand the level of radiation hardness of CHIPIX65-FE0. We are now in the process of bump bonding CHIPIX65-FE0 to 3D and possibly planar silicon sensors during spring. Detailed results will be presented in the conference paper

    First Measurements of a Prototype of a New Generation Pixel Readout ASIC in 65 nm CMOS for Extreme Rate HEP Detectors at HL-LHC

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    A first prototype of a readout ASIC in CMOS 65nm for a pixel detector at High Luminosity LHC is described. The pixel cell area is 50x50 um2 and the matrix consists of 64x64 pixels. The chip was designed to guarantee high efficiency at extreme data rates for very low signals and with low power consumption. Two different analogue front-end designs, one synchronous and one asynchronous, were implemented, both occupying an area of 35x35 um2. ENC value is below 100e- for an input capacitance of 50 fF and in-time threshold below 1000e-. Leakage current compensation up to 50 nA with power consumption below 5 uW. A ToT technique is used to perform charge digitization with 5-bit precision using either a 40 MHz clock or a local Fast Oscillator up to 800 MHz. Internal 10-bit DAC's are used for biasing, while monitoring is provided by a 12-bit ADC. A novel digital architecture has been developed to ensure above 99.5% hit efficiency at pixel hit rates up to 3 GHz/cm2, trigger rates up to 1 MHz and trigger latency of 12.5 us. The total power consumption per pixel is below 5uW. Analogue dead-time is below 1%. Data are sent via a serializer connected to a CMOS-to-SLVS transmitter working at 320 MHz. All IP-blocks and front-ends used are silicon-proven and tested after exposure to ionizing radiation levels of 500-800 Mrad. The chip was designed as part of the Italian INFN CHIPIX65 project and in close synergy with the international CERN RD53 and was submitted in July 2016 for production. Early test results for both front-ends regarding minimum threshold, auto-zeroing and low-noise performance are high encouraging and will be presented in this paper

    CMS physics technical design report : Addendum on high density QCD with heavy ions

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    Search for heavy resonances decaying to two Higgs bosons in final states containing four b quarks

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    A search is presented for narrow heavy resonances X decaying into pairs of Higgs bosons (H) in proton-proton collisions collected by the CMS experiment at the LHC at root s = 8 TeV. The data correspond to an integrated luminosity of 19.7 fb(-1). The search considers HH resonances with masses between 1 and 3 TeV, having final states of two b quark pairs. Each Higgs boson is produced with large momentum, and the hadronization products of the pair of b quarks can usually be reconstructed as single large jets. The background from multijet and t (t) over bar events is significantly reduced by applying requirements related to the flavor of the jet, its mass, and its substructure. The signal would be identified as a peak on top of the dijet invariant mass spectrum of the remaining background events. No evidence is observed for such a signal. Upper limits obtained at 95 confidence level for the product of the production cross section and branching fraction sigma(gg -> X) B(X -> HH -> b (b) over barb (b) over bar) range from 10 to 1.5 fb for the mass of X from 1.15 to 2.0 TeV, significantly extending previous searches. For a warped extra dimension theory with amass scale Lambda(R) = 1 TeV, the data exclude radion scalar masses between 1.15 and 1.55 TeV

    Performance of the CMS muon trigger system in proton-proton collisions at √s = 13 TeV

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    The muon trigger system of the CMS experiment uses a combination of hardware and software to identify events containing a muon. During Run 2 (covering 2015-2018) the LHC achieved instantaneous luminosities as high as 2 × 10 cm s while delivering proton-proton collisions at √s = 13 TeV. The challenge for the trigger system of the CMS experiment is to reduce the registered event rate from about 40 MHz to about 1 kHz. Significant improvements important for the success of the CMS physics program have been made to the muon trigger system via improved muon reconstruction and identification algorithms since the end of Run 1 and throughout the Run 2 data-taking period. The new algorithms maintain the acceptance of the muon triggers at the same or even lower rate throughout the data-taking period despite the increasing number of additional proton-proton interactions in each LHC bunch crossing. In this paper, the algorithms used in 2015 and 2016 and their improvements throughout 2017 and 2018 are described. Measurements of the CMS muon trigger performance for this data-taking period are presented, including efficiencies, transverse momentum resolution, trigger rates, and the purity of the selected muon sample. This paper focuses on the single- and double-muon triggers with the lowest sustainable transverse momentum thresholds used by CMS. The efficiency is measured in a transverse momentum range from 8 to several hundred GeV

    The LiTE-DTU: A Data Conversion and Compression ASIC for the Readout of the CMS Electromagnetic Calorimeter

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    International audienceThe high-luminosity phase of operation of the CERN Large Hadron Collider (HL-LHC) will pose new challenges to the detectors and their readout electronics. In particular, the Compact Muon Solenoid (CMS) barrel electromagnetic calorimeter will require a full redesign of the electronic readout chain in order to cope with the increase in luminosity and trigger rate. In this framework, a new application-specific integrated circuit (ASIC) integrating A/D conversion, lossless data compression, and high-speed transmission has been developed and tested. The ASIC, named Lisboa-Torino Ecal Data Transmission Unit (LiTE-DTU), is designed in a commercial CMOS 65-nm process and embeds two 12-bit, 160-MS/s analog-to-digital converters (ADCs), a data selection and compression logic, and a 1.28-Gb/s output serial link. The high-speed 1.28-GHz clock is generated internally from the 160-MHz input by a clock multiplication phase-locked loop (PLL). The circuit has been designed implementing radiation-tolerant techniques in order to work in the harsh environment of the HL-LHC upgrade. The LiTE-DTU is currently in the preproduction phase. A sample of 600 chips has been tested and incorporated into front-end (FE) boards for systems performance testing

    Search for heavy neutrinos in K+μ+νμK^+ \rightarrow \mu^+ \nu_{\mu} decays

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    International audienceThe NA62 experiment recorded a large sample of K+→μ+νμ decays in 2007. A peak search has been performed in the reconstructed missing mass spectrum. In the absence of a signal, limits in the range 2×10−6 to 10−5 have been set on the squared mixing matrix element |Uμ4|2 between muon and heavy neutrino states, for heavy neutrino masses in the range 300–375 MeV/ c2 . The result extends the range of masses for which upper limits have been set on the value of |Uμ4|2 in previous production search experiments

    Study of the K-+/- -> pi(+/-)gamma gamma decay by the NA62 experiment

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    A study of the dynamics of the rare decay K-+/- -> pi(+/-)gamma gamma has been performed on a sample of 232 decay candidates, with an estimated background of 17.4 +/- 1.1 events, collected by the NA62 experiment at CERN in 2007. The results are combined with those from a measurement conducted by the NA48/2 Collaboration at CERN. The combined model-independent branching ratio in the kinematic range z = (m gamma gamma/m(K))(2) > 0.2 is B-MI(z > 0.2) = (0.965 +/- 0.063) x 10(-6), and the combined branching ratio in the full kinematic range assuming a Chiral Perturbation Theory description is B(K-pi gamma gamma) = (1.003 +/- 0.056) x 10(-6). A detailed comparison of the results with the previous measurements is performed. (C) 2014 The Authors. Published by Elsevier B.V
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