‘Malvasia nera di Brindisi/Lecce’ grapevine cultivar (Vitis vinifera L.) originated from ‘Negroamaro’ and ‘Malvasia bianca lunga’

‘Malvasia nera di Brindisi’ and ‘Malvasia nera di Lecce’ are two of the few Malvasias with black berries and belong to the Apulian ampelographic assortment (South Italy). Their presumed synonymy has been recently ascertained with SSR markers and therefore these two black 'Malvasias' can be considered as an unique variety. We discovered that this cultivar is the cross between ‘Malvasia bianca lunga’ alias ‘Malvasia del Chianti’ and ‘Negroamaro’ by using 42 nuclear SSR. Both parents belong to the Apulian varietal resources, since centuries. So far, ‘Malvasia nera di Brindisi/Lecce’ origin has been obscure; now we may assert that this cultivar was born right in Apulia. Three sets of chloroplast SSR loci were used to determine the female and the male parent: 6 ccmp loci, already used in previous pedigree studies, 15 ccSSR loci and 2 NTCP loci, derived from tobacco. The second set of loci was sequenced in order to compare the length of the markers with the reference species where they were originally obtained: in 4 cases no microsatellite motives were detected and in other 4 cases the perfect repetition found in tobacco was not maintained in grape. Unfortunately, the three sets of markers failed to show any polymorphism. A detailed comparison of the black Malvasia morphology with its two parents showed a closer similarity to ‘Negroamaro’. Also the anthocyanin profile is in agreement with that of the black parent; its varietal aroma presents interesting levels of free and bound 2-phenylethanol, responsible for rose flavor, and of bound linalool compounds.

Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs

NTRODUCTION \u2015 In the past decade the Tunnel Field Effect Transistor (TFET) relying on band-to-band tunneling (BTBT) has emerged as one of the most promising small slope FETs able to achieve a subthreshold swing (SS) below the room temperature 60 mV/dec limit of conventional MOSFET [1]. Many simulation studies attributed to TFETs the potential to outperform conventional MOSFETs in the ultra-low voltage domain (VDD < 0.4 V) in both analog [2-3] and digital [4-7] applications. However, only basic digital and analog circuits have been fabricated up to date, such as current mirrors [8] and inverter gates [9]. As for semiconductor materials, III-V hetero-structure TFETs may be able to achieve a sub-thermal SS in a wide current range and, at the same time, very competitive on currents [1], as demonstrated by a recently fabricated vertical InAs/GaAsSb/GaSb nanowire n-type TFETs [10]. The aim of this work is to benchmark a complementary III-V TFET technology platform against the mainstream FinFET reference, by considering basic building blocks of digital and analog applications. To this purpose, we selected a complementary III-V TFET technology platform designed and optimized using full quantum simulations in [11], where n- and p-type TFET pairs are realized in the same InAs/AlGaSb material system. The use of such devices allowed us to remove the excessively optimistic assumption of perfectly symmetric n- and p-type TFETs, very frequently embraced in previous simulation studies (e.g. in [2, 7]). We present circuit-level simulations performed on current mirrors and inverter-based logic blocks, which are identified as basic topologies representative of the analog and digital design realms, respectively. Similar benchmarking results for the same technology platforms have been obtained by focusing the comparison on more complicated circuit blocks [3], [5] and [6]

Microwave small-signal modelling of FinFETs using multi-parameter rational fitting method

An effective approach based on a multi-parameter rational fitting technique is proposed to model the microwave small-signal response of active solid-state devices. The model is identified by fitting multibias scattering-parameter measurements and its analytical expression is implemented in a commercial microwave circuit simulator. The approach has been applied to the modelling of a silicon-based FinFET, and an excellent agreement is obtained between the measured data and model predictions

Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits

In this work, a complementary InAs/Al0.05Ga0.95Sb tunnel field-effect-Transistor (TFET) virtual technology platform is benchmarked against the projection to the CMOS FinFET 10-nm node, by means of device and basic circuit simulations. The comparison is performed in the ultralow voltage regime (below 500 mV), where the proposed III-V TFETs feature ON-current levels comparable to scaled FinFETs, for the same low-operating-power OFF-current. Due to the asymmetrical n-and p-Type I-V exts , trends of noise margins and performances are investigated for different Wp/Wn ratios. Implications of the device threshold voltage variability, which turned out to be dramatic for steep slope TFETs, are also addressed

Yield and quality characteristics of brassica microgreens as affected by the NH4:NO3 molar ratio and strength of the nutrient solution

Microgreens are gaining more and more interest, but little information is available on the effects of the chemical composition of the nutrient solution on the microgreen yield. In this study, three Brassica genotypes (B. oleracea var. italica, B. oleracea var. botrytis, and Brassica rapa L. subsp. sylvestris L. Janch. var. esculenta Hort) were fertigated with three modified strength Hoagland nutrient solutions (1/2, 1/4, and 1/8 strength) or with three modified half-strength Hoagland nutrient solutions with three different NH4:NO3 molar ratios (5:95, 15:85, and 25:75). Microgreen yields and content of inorganic ions, dietary fiber, proteins, alpha;-tocopherol, and β-carotene were evaluated. Micro cauliflower showed the highest yield, as well as a higher content of mineral elements and alpha;-tocopherol (10.4 mg 100 g-1 fresh weight (FW)) than other genotypes. The use of nutrient solution at half strength gave both a high yield (0.23 g cm-2) and a desirable seedling height. By changing the NH4:NO3 molar ratio in the nutrient solution, no differences were found on yield and growing parameters, although the highest β-carotene content (6.3 mg 100 g-1 FW) was found by using a NH4:NO3 molar ratio of 25:75. The lowest nitrate content (on average 6.8 g 100 g-1 dry weight) was found in micro broccoli and micro broccoli raab by using a nutrient solution with NH4:NO3 molar ratios of 25:75 and 5:95, respectively. Micro cauliflower fertigated with a NH4:NO3 molar ratio of 25:75 showed the highest dry matter (9.8 g 100 g-1 FW) and protein content (4.2 g 100 g-1 FW)

Digital and analog TFET circuits: Design and benchmark

In this work, we investigate by means of simulations the performance of basic digital, analog, and mixed-signal circuits employing tunnel-FETs (TFETs). The analysis reviews and complements our previous papers on these topics. By considering the same devices for all the analysis, we are able to draw consistent conclusions for a wide variety of circuits. A virtual complementary TFET technology consisting of III-V heterojunction nanowires is considered. Technology Computer Aided Design (TCAD) models are calibrated against the results of advanced full-quantum simulation tools and then used to generate look-up-tables suited for circuit simulations. The virtual complementary TFET technology is benchmarked against predictive technology models (PTM) of complementary silicon FinFETs for the 10 nm node over a wide range of supply voltages (VDD) in the sub-threshold voltage domain considering the same footprint between the vertical TFETs and the lateral FinFETs and the same static power. In spite of the asymmetry between p- and n-type transistors, the results show clear advantages of TFET technology over FinFET for VDDlower than 0.4 V. Moreover, we highlight how differences in the I-V characteristics of FinFETs and TFETs suggest to adapt the circuit topologies used to implement basic digital and analog blocks with respect to the most common CMOS solutions

Impact of TFET unidirectionality and ambipolarity on the performance of 6T SRAM cells

We use mixed device-circuit simulations to predict the performance of 6T static RAM (SRAM) cells implemented with tunnel-FETs (TFETs). Idealized template devices are used to assess the impact of device unidirectionality, which is inherent to TFETs and identify the most promising configuration for the access transistors. The same template devices are used to investigate the $ extV- m DD range, where TFETs may be advantageous compared to conventional CMOS. The impact of device ambipolarity on SRAM operation is also analyzed. Realistic device templates extracted from experimental data of fabricated state-of-the-art silicon pTFET are then used to estimate the performance gap between the simulation of idealized TFETs and the best experimental implementations

Digital and analog TFET circuits: Design and benchmark

In this work, we investigate by means of simulations the performance of basic digital, analog, and mixed-signal circuits employing tunnel-FETs (TFETs). The analysis reviews and complements our previous papers on these topics. By considering the same devices for all the analysis, we are able to draw consistent conclusions for a wide variety of circuits. A virtual complementary TFET technology consisting of III-V heterojunction nanowires is considered. Technology Computer Aided Design (TCAD) models are calibrated against the results of advanced full-quantum simulation tools and then used to generate look-up-tables suited for circuit simulations. The virtual complementary TFET technology is benchmarked against predictive technology models (PTM) of complementary silicon FinFETs for the 10 nm node over a wide range of supply voltages (VDD) in the sub-threshold voltage domain considering the same footprint between the vertical TFETs and the lateral FinFETs and the same static power. In spite of the asymmetry between p- and n-type transistors, the results show clear advantages of TFET technology over FinFET for VDDlower than 0.4 V. Moreover, we highlight how differences in the I-V characteristics of FinFETs and TFETs suggest to adapt the circuit topologies used to implement basic digital and analog blocks with respect to the most common CMOS solutions

A Methodology to Account for the Finger Non-Uniformity in Photovoltaic Solar Cell

Abstract In this work we investigate the impact of a non-uniform finger in the front-side metallization on the performance of c-Si solar cells. For this purpose, we propose a methodology based on a mixed-mode simulation approach, which allows evaluating the solar cell properties by performing both numerical device simulations and circuit simulations. The finger roughness profile is modeled by means of Gaussian function. The impact of roughness on the solar cell efficiency is studied as a function of mean finger height, mean finger width and finger resistivity. The proposed methodology has been applied to typical roughness profiles realized with two different metallization techniques, the conventional single screen-printing (SP) and the double screen-printing (DP)