Penalized Orthogonal Iteration for Sparse Estimation of Generalized Eigenvalue Problem

We propose a new algorithm for sparse estimation of eigenvectors in generalized eigenvalue problems (GEP). The GEP arises in a number of modern data-analytic situations and statistical methods, including principal component analysis (PCA), multiclass linear discriminant analysis (LDA), canonical correlation analysis (CCA), sufficient dimension reduction (SDR) and invariant co-ordinate selection. We propose to modify the standard generalized orthogonal iteration with a sparsity-inducing penalty for the eigenvectors. To achieve this goal, we generalize the equation-solving step of orthogonal iteration to a penalized convex optimization problem. The resulting algorithm, called penalized orthogonal iteration, provides accurate estimation of the true eigenspace, when it is sparse. Also proposed is a computationally more efficient alternative, which works well for PCA and LDA problems. Numerical studies reveal that the proposed algorithms are competitive, and that our tuning procedure works well. We demonstrate applications of the proposed algorithm to obtain sparse estimates for PCA, multiclass LDA, CCA and SDR. Supplementary materials are available online

Trading Electricity with Blockchain Systems

On the wave of the development of new ICT technologies and renewable energy, the power system will certainly experience great changes to its outdated architecture over the next several decades. One of the key drivers of change in the power system is distributed energy resources. They are completely changing the paradigm of the power system as a system with a centralized hierarchy and one-way power flows from generation to customer and from high voltage to low voltage. Because the goals of net zero greenhouse gas emissions are gathering pace and are being accepted by countries around the world, slowdown in the integration of distributed energy resources cannot be expected. Another reason why we can expect faster integration is the development of technology for energy production which is becoming more available to power consumers. Because of the problems that are currently occurring in the distribution system, it is clear that the system must be modernized in line with the development of these technologies. The technology that will likely have the greatest impact on the modernization of the power system is blockchain technology combined with the smart grid paradigm. Blockchain has the ability to completely change the way the power system is managed and optimized for performance

Absorbing customer knowledge: how customer involvement enables service design success

Customers are a knowledge resource outside of the firm that can be utilized for new service success by involving them in the design process. However, existing research on the impact of customer involvement (CI) is inconclusive. Knowledge about customers’ needs and on how best to serve these needs (articulated in the service concept) is best obtained from customers themselves. However, codesign runs the risk of losing control of the service concept. This research argues that of the processes of external knowledge, acquisition (via CI), customer knowledge assimilation, and concept transformation form a capability that enables the firm to exploit customer knowledge in the form of a successful new service. Data from a survey of 126 new service projects show that the impact of CI on new service success is fully mediated by customer knowledge assimilation (the deep understanding of customers’ latent needs) and concept transformation (the modification of the service concept due to customer insights). However, its impact is more nuanced. CI exhibits an “∩”-shaped relationship with transformation, indicating there is a limit to the beneficial effect of CI. Its relationship with assimilation is “U” shaped, suggesting a problem with cognitive inertia where initial learnings are ignored. Customer knowledge assimilation directly impacts success, while concept transformation only helps success in the presence of resource slack. An evolving new service design is only beneficial if the firm has the flexibility to adapt to change

Mortality and pulmonary complications in patients undergoing surgery with perioperative SARS-CoV-2 infection: an international cohort study

Background: The impact of severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2) on postoperative recovery needs to be understood to inform clinical decision making during and after the COVID-19 pandemic. This study reports 30-day mortality and pulmonary complication rates in patients with perioperative SARS-CoV-2 infection. Methods: This international, multicentre, cohort study at 235 hospitals in 24 countries included all patients undergoing surgery who had SARS-CoV-2 infection confirmed within 7 days before or 30 days after surgery. The primary outcome measure was 30-day postoperative mortality and was assessed in all enrolled patients. The main secondary outcome measure was pulmonary complications, defined as pneumonia, acute respiratory distress syndrome, or unexpected postoperative ventilation. Findings: This analysis includes 1128 patients who had surgery between Jan 1 and March 31, 2020, of whom 835 (74·0%) had emergency surgery and 280 (24·8%) had elective surgery. SARS-CoV-2 infection was confirmed preoperatively in 294 (26·1%) patients. 30-day mortality was 23·8% (268 of 1128). Pulmonary complications occurred in 577 (51·2%) of 1128 patients; 30-day mortality in these patients was 38·0% (219 of 577), accounting for 81·7% (219 of 268) of all deaths. In adjusted analyses, 30-day mortality was associated with male sex (odds ratio 1·75 [95% CI 1·28–2·40], p\textless0·0001), age 70 years or older versus younger than 70 years (2·30 [1·65–3·22], p\textless0·0001), American Society of Anesthesiologists grades 3–5 versus grades 1–2 (2·35 [1·57–3·53], p\textless0·0001), malignant versus benign or obstetric diagnosis (1·55 [1·01–2·39], p=0·046), emergency versus elective surgery (1·67 [1·06–2·63], p=0·026), and major versus minor surgery (1·52 [1·01–2·31], p=0·047). Interpretation: Postoperative pulmonary complications occur in half of patients with perioperative SARS-CoV-2 infection and are associated with high mortality. Thresholds for surgery during the COVID-19 pandemic should be higher than during normal practice, particularly in men aged 70 years and older. Consideration should be given for postponing non-urgent procedures and promoting non-operative treatment to delay or avoid the need for surgery. Funding: National Institute for Health Research (NIHR), Association of Coloproctology of Great Britain and Ireland, Bowel and Cancer Research, Bowel Disease Research Foundation, Association of Upper Gastrointestinal Surgeons, British Association of Surgical Oncology, British Gynaecological Cancer Society, European Society of Coloproctology, NIHR Academy, Sarcoma UK, Vascular Society for Great Britain and Ireland, and Yorkshire Cancer Research

UDM: User Direct Messaging for General-Purpose Multiprocessing

User Direct Messaging (UDM) allows user-level, processor-to-processor messaging to coexist with general multiprogramming and virtual memory. Direct messaging, where processors launch and receive messages in tens of cycles directly via network interface FIFOs as opposed to indirectly via memory, offers high message bandwidth and low delivery latency by avoiding memory delay and buffer management overhead. However, user-level direct messaging implementations to date are limited in that they operate only in single-user machines or with strict gang scheduling. In this paper, we develop a messaging approach for protected, direct delivery with a single, unified user interface but with an underlying implementation that provides two delivery cases: a fast, common case corresponding to direct user access to hardware queues and a second case using virtual buffering that is invoked transparently when required by the demands of multiprogramming, virtual memory or user intransigence. The pape

Exploiting Two-Case Delivery for Fast Protected Messaging

We propose and evaluate two complementary techniques to protect and virtualize a tightly-coupled network interface in a multicomputer. The techniques allow efficient, direct application access to network hardware in a multiprogrammed environment while gaining most of the benefits of a memory-based network interface. First, two-case delivery allows an application to receive a message directly from the network hardware in ordinary circumstances, but provides buffering transparently when required for protection. Second, virtual buffering stores messages in virtual memory on demand, providing the convenience of effectively unlimited buffer capacity while keeping actual physical memory consumption low. The evaluation is based on workloads of real and synthetic applications running on a simulator and partly on emulated hardware. The results show that the direct path is also the common path, justifying the use of software buffering. Further results show that physical buffering requirements ..

The RAW Benchmark Suite: Computation Structures for General Purpose Computing

The RAW benchmark suite consists of twelve programs designed to facilitate comparing, validating, and improving reconfigurable computing systems. These benchmarks run the gamut of algorithms found in general purpose computing, including sorting, matrix operations, and graph algorithms. The suite includes an architecture-independent compilation framework, Raw Computation Structures (RawCS), to express each algorithm's dependencies and to support automatic synthesis, partitioning, and mapping to a reconfigurable computer. Within this framework, each benchmark is portably designed in both C and Behavioral Verilog and scalably parameterized to consume a range of hardware resource capacities. To establish initial benchmark ratings, we have targeted a commercial logic emulation system based on virtual wires technology to automatically generate designs up to millions of gates (14 to 379 FPGAs). Because the virtual wires techniques abstract away machine-level details like FPGA capacity and interconnect, our hardware target for this system is an abstract reconfigurable logic fabric with memorymapped host I/O. We report initial speeds in the range of 2X to 1800X faster than a 2.82 SPECint95 SparcStation 20 and encourage others in the field to run these benchmarks on other systems to provide a standard comparison

The Neurosurgery Match: COVID Comparison and Bibliometric Analysis

Because of the effect of COVID on academic opportunities, as well as limitations on travel, away rotations and in-person interviews, COVID-related changes could impact the neurosurgical resident demographics. Our aim was to retrospectively review the demographics of the previous four years of neurosurgery residents, provide bibliometric analysis of successful applicants, and analyze for the effects of COVID on the match cycle. All AANS residency program websites were examined for a list of demographic characteristics for current post-graduate year (PGY) 1 to 4. Gathered information included gender, undergraduate and medical institution and state, medical degree status, and prior graduate programs. A total of 114 institutions and 946 residents were included in the final review. 676 (71.5%) of the residents included in the analysis were male. Of the 783 who studied within the United States, 221 (28.2%) residents stayed within the same state of his or her medical school. 104 of 555 (18.7%) residents stayed within the same state of his or her undergraduate school. Demographic information as well as geographic switching relative to medical school, undergraduate school, and hometown showed no significant changes between pre-COVID and COVID-matched cohorts overall. The median number of publications per resident significantly increased for the COVID-matched cohort (median, 1; interquartile range (IQR), 0-4.75) when compared to the non-COVID-matched cohort (median, 1; IQR, 0-3, p = 0.004) as did first author publications (median, 1; IQR, 0-1 vs median, 1; IQR, 0-1; p = 0.015), respectively. The number of residents matching into the same region in the Northeast relative to undergraduate degree was significantly greater after COVID (56 (58%) vs 36 (42%), p = 0.026). The West demonstrated a significant increase in the mean number of total publications (4.0 ± 8.5 vs 2.3 ± 4.2, p = 0.02) and first author publications (1.24 ± 2.33 vs 0.68 ± 1.47, p = 0.02) after COVID, with the increase in first author publications being significant in a test of medians. Herein we characterized the most recently matched neurosurgery applicants, paying particular attention to changes over time in relation to the onset of the pandemic. Apart from publication volume, characteristics of residents and geographical preferences did not change with the influence of COVID-induced changes in the application process

Baring it all to software: Raw machines

Rapid advances in technology force a quest for computer architectures that exploit new opportunities and shed existing mechanisms that do not scale. Current architectures, such as hardware scheduled superscalars, are already hitting performance and complexity limits and cannot be scaled indefinitely. The Reconfigurable Architecture Workstation (Raw) is a simple, wire-efficient architecture that scales with increasing VLSI gate densities and attempts to provide performance that is at least comparable to that provided by scaling an existing architecture, but that can achieve orders of magnitude more performance for applications in which the compiler can discover and statically schedule fine-grain parallelism. The Raw microprocessor chip comprises a set of replicated tiles, each tile containing a simple RISC like processor, a small amount of configurable logic, and a portion of memory for instructions and data. Each tile has an associated programmable switch which connects the tiles in a wide-channel point-to-point interconnect. The compiler statically schedules multiple streams of computations, with one program counter pe

Baring it all to Software: The Raw Machine

Rapid advances in technology force a quest for computer architectures that exploit new opportunities and shed existing mechanisms that do not scale. Current architectures, such as hardware scheduled superscalars, are already hitting performance and complexity limits and cannot be scaled indefinitely. The Reconfigurable Architecture Workstation (Raw) is a simple, wire-efficient architecture that scales with increasing VLSI gate densities and attempts to provide performance that is at least comparable to that provided by scaling an existing architecture, but that can achieve orders of magnitude more performance for applications in which the compiler can discover and statically schedule fine-grain parallelism