Incorporation of feed-network and circuit modeling into the time-domain finite element analysis of antenna arrays and microwave circuits

In this dissertation, accurate and efficient numerical algorithms are developed to incorporate the feed-network and circuit modeling into the time-domain finite element analysis of antenna arrays and microwave circuits. First, simulation of an antenna system requires accurate modeling of interactions between the radiating elements and the associated feeding network. In this work, a feed network is represented in terms of its scattering matrix in a rational function form in the frequency domain that enables its interfacing with the time-domain finite element modeling of the antenna elements through a fast recursive time-convolution algorithm. The exchange of information between the antenna elements and the feed network occurs through the incident and reflected modal voltages/currents at properly defined port interfaces. The proposed numerical scheme allows a full utilization of the advanced antenna simulation techniques, and significantly extends the current antenna modeling capability to the system level. Second, a hybrid field-circuit solver that combines the capabilities of the time-domain finite element method and a lumped circuit analysis is developed for accurate and efficient characterization of complicated microwave circuits that include both distributive and lumped-circuit components. The distributive portion of the device is modeled by the time-domain finite element method to generate a finite element subsystem, while the lumped circuits are analyzed by a SPICE-like circuit solver to generate a circuit subsystem. A global system for both the finite-element and circuit unknowns is established by combining the two subsystems through coupling matrices to model their interactions. For simulations of even more complicated mixed-scale circuit systems that contain pre-characterized blocks of discrete circuit elements, the hybrid field-circuit analysis implemented a systematic and efficient algorithm to incorporate multiport lumped networks in terms of frequency-dependent admittance matrices. Other advanced features in the hybrid field-circuit solver include application of the tree-cotree splitting algorithm and introduction of a flexible time-stepping scheme. Various numerical examples are presented to validate the implementation and demonstrate the accuracy, efficiency, and applications of the proposed numerical algorithms

Time-domain analysis of large-scale circuits by matrix exponential method with adaptive control

We propose an explicit numerical integration method based on matrix exponential operator for transient analysis of large-scale circuits. Solving the differential equation analytically, the limiting factor of maximum time step changes largely from the stability and Taylor truncation error to the error in computing the matrix exponential operator. We utilize Krylov subspace projection to reduce the computation complexity of matrix exponential operator. We also devise a prediction-correction scheme tailored for the matrix exponential approach to dynamically adjust the step size and the order of Krylov subspace approximation. Numerical experiments show the advantages of the proposed method compared with the implicit trapezoidal method. © 1982-2012 IEEE.published_or_final_versio

A Novel Method for Tuning a Transistor-Based non-Foster Matching Circuit for Electrically Small Wideband Antennas

This dissertation reviews the application of non-Foster circuits for wideband antenna matching, and introduces a novel, rapid means of “tuning” the circuit to accommodate variations in antenna loadings. The tuning is accomplished via the judicious addition of a common transistor.A detailed literature search is provided, and non-Foster circuits are discussed in detail, including the myriad of implementations with focus on tuning. A comparison between different tuning methods is presented. The novel tuning method is evaluated via the normalized determinant function to ensure stability. Evaluations include simulations using commercially available software and experimentation to ensure not only stability but also that noise added by the active circuitry is manageable. Wideband stable operation is confirmed by pairing the tunable non-Foster matching circuit with an electrically small, resistively loaded dipole, and performance gains are demonstrated using the tunability feature. The resistively loaded dipole alone demonstrates reasonable performance at higher frequencies, but performance degrades considerably at lower frequencies, when the dipole is electrically small. The tunable non-Foster circuit is shown to alleviate some of this degradation. Additionally, applications other than wideband antenna matching can benefit from tunable non-Foster circuits such as tunable filters and phase shifters, and these are discussed as well. Finally, practical limitations of non-Foster circuits are presented

USV charging based on WPT system

With the increasing demand of water and underwater exploration, more and more electric unmanned surface vehicles (USV) are put into use in recent years. However, because of the present battery technology limits, these devices require to be recharged frequently that is a challenging problem taking into account the complex water environment where these equipments are acting. To improve safety and convenience of USV charging a wireless power transfer (WPT) system is proposed in this dissertation. In this case, the boat can be controlled to go to the charging facilities. During charging by the implemented WPT system, the state of charging can be remotely monitored by host computer. The moving control is based on embedded system. The relative position between transmitting coil and receiving coil is supposed to be sensed by magnetic sensor, since the relative position has great impact on transmission efficiency. The remote monitoring software was implemented in the host computer and was developed in LABVIEW. A graphical user interface was developed to control the boat moving and collect the data from the WPT and the boat sensors. The effectiveness of the proposed system was tested for instance in the laboratory environment and in-field tests are also planned in the near future.Com a crescente procura da exploração em ambientes aquáticos e subaquáticos , os veículos elétricos de superfície não tripulados ("electric unmanned surface vehicle" -USV) têm sido cada vez mais utilizados nestes últimos anos. No entanto, devido aos limites atuais relacionados com a tecnologia utilizada nas baterias, os dispositivos precisam de ser recarregados com frequência para poderem operar num ambiente aquático complexo. Para melhorar a segurança e a conveniência do carregamento da bateria de um USV, um sistema para recarregamento da bateria de um barco não tripulado através de transferência de energia sem fios("wireless power transfer" - WPT) é proposto nesta dissertação. Neste caso de estudo, o barco tem a capacidade de ser controlado para chegar a um ponto de recarregamento da bateria, que se encontra fixado por uma doca mecânica. Enquanto o sistema WPT érecarregado, os dados associados ao processo de recarregamento da bateria podem ser monitorizados por um computador host. O controlo da movimentação do barco é baseado num sistema embebido. A posição relativa entre a bobina transmissora e a bobina receptora deve ser detectada pelo sensor magnético, uma vez que a posição relativa tem um grande impacto na eficiência da transmissão. Em termos do computador host, foi utilizado o software LABVIEW para programar a interface que permite controlar o movimento do barco e recolher os dados. Finalmente, a eficácia do sistema proposto foi experimentada e testada num ambiente de laboratório

Measurements, Models, Systems and Design

531 s.

Resiliency Mechanisms for In-Memory Column Stores

The key objective of database systems is to reliably manage data, while high query throughput and low query latency are core requirements. To date, database research activities mostly concentrated on the second part. However, due to the constant shrinking of transistor feature sizes, integrated circuits become more and more unreliable and transient hardware errors in the form of multi-bit flips become more and more prominent. In a more recent study (2013), in a large high-performance cluster with around 8500 nodes, a failure rate of 40 FIT per DRAM device was measured. For their system, this means that every 10 hours there occurs a single- or multi-bit flip, which is unacceptably high for enterprise and HPC scenarios. Causes can be cosmic rays, heat, or electrical crosstalk, with the latter being exploited actively through the RowHammer attack. It was shown that memory cells are more prone to bit flips than logic gates and several surveys found multi-bit flip events in main memory modules of today's data centers. Due to the shift towards in-memory data management systems, where all business related data and query intermediate results are kept solely in fast main memory, such systems are in great danger to deliver corrupt results to their users. Hardware techniques can not be scaled to compensate the exponentially increasing error rates. In other domains, there is an increasing interest in software-based solutions to this problem, but these proposed methods come along with huge runtime and/or storage overheads. These are unacceptable for in-memory data management systems. In this thesis, we investigate how to integrate bit flip detection mechanisms into in-memory data management systems. To achieve this goal, we first build an understanding of bit flip detection techniques and select two error codes, AN codes and XOR checksums, suitable to the requirements of in-memory data management systems. The most important requirement is effectiveness of the codes to detect bit flips. We meet this goal through AN codes, which exhibit better and adaptable error detection capabilities than those found in today's hardware. The second most important goal is efficiency in terms of coding latency. We meet this by introducing a fundamental performance improvements to AN codes, and by vectorizing both chosen codes' operations. We integrate bit flip detection mechanisms into the lowest storage layer and the query processing layer in such a way that the remaining data management system and the user can stay oblivious of any error detection. This includes both base columns and pointer-heavy index structures such as the ubiquitous B-Tree. Additionally, our approach allows adaptable, on-the-fly bit flip detection during query processing, with only very little impact on query latency. AN coding allows to recode intermediate results with virtually no performance penalty. We support our claims by providing exhaustive runtime and throughput measurements throughout the whole thesis and with an end-to-end evaluation using the Star Schema Benchmark. To the best of our knowledge, we are the first to present such holistic and fast bit flip detection in a large software infrastructure such as in-memory data management systems. Finally, most of the source code fragments used to obtain the results in this thesis are open source and freely available.:1 INTRODUCTION 1.1 Contributions of this Thesis 1.2 Outline 2 PROBLEM DESCRIPTION AND RELATED WORK 2.1 Reliable Data Management on Reliable Hardware 2.2 The Shift Towards Unreliable Hardware 2.3 Hardware-Based Mitigation of Bit Flips 2.4 Data Management System Requirements 2.5 Software-Based Techniques For Handling Bit Flips 2.5.1 Operating System-Level Techniques 2.5.2 Compiler-Level Techniques 2.5.3 Application-Level Techniques 2.6 Summary and Conclusions 3 ANALYSIS OF CODING TECHNIQUES 3.1 Selection of Error Codes 3.1.1 Hamming Coding 3.1.2 XOR Checksums 3.1.3 AN Coding 3.1.4 Summary and Conclusions 3.2 Probabilities of Silent Data Corruption 3.2.1 Probabilities of Hamming Codes 3.2.2 Probabilities of XOR Checksums 3.2.3 Probabilities of AN Codes 3.2.4 Concrete Error Models 3.2.5 Summary and Conclusions 3.3 Throughput Considerations 3.3.1 Test Systems Descriptions 3.3.2 Vectorizing Hamming Coding 3.3.3 Vectorizing XOR Checksums 3.3.4 Vectorizing AN Coding 3.3.5 Summary and Conclusions 3.4 Comparison of Error Codes 3.4.1 Effectiveness 3.4.2 Efficiency 3.4.3 Runtime Adaptability 3.5 Performance Optimizations for AN Coding 3.5.1 The Modular Multiplicative Inverse 3.5.2 Faster Softening 3.5.3 Faster Error Detection 3.5.4 Comparison to Original AN Coding 3.5.5 The Multiplicative Inverse Anomaly 3.6 Summary 4 BIT FLIP DETECTING STORAGE 4.1 Column Store Architecture 4.1.1 Logical Data Types 4.1.2 Storage Model 4.1.3 Data Representation 4.1.4 Data Layout 4.1.5 Tree Index Structures 4.1.6 Summary 4.2 Hardened Data Storage 4.2.1 Hardened Physical Data Types 4.2.2 Hardened Lightweight Compression 4.2.3 Hardened Data Layout 4.2.4 UDI Operations 4.2.5 Summary and Conclusions 4.3 Hardened Tree Index Structures 4.3.1 B-Tree Verification Techniques 4.3.2 Justification For Further Techniques 4.3.3 The Error Detecting B-Tree 4.4 Summary 5 BIT FLIP DETECTING QUERY PROCESSING 5.1 Column Store Query Processing 5.2 Bit Flip Detection Opportunities 5.2.1 Early Onetime Detection 5.2.2 Late Onetime Detection 5.2.3 Continuous Detection 5.2.4 Miscellaneous Processing Aspects 5.2.5 Summary and Conclusions 5.3 Hardened Intermediate Results 5.3.1 Materialization of Hardened Intermediates 5.3.2 Hardened Bitmaps 5.4 Summary 6 END-TO-END EVALUATION 6.1 Prototype Implementation 6.1.1 AHEAD Architecture 6.1.2 Diversity of Physical Operators 6.1.3 One Concrete Operator Realization 6.1.4 Summary and Conclusions 6.2 Performance of Individual Operators 6.2.1 Selection on One Predicate 6.2.2 Selection on Two Predicates 6.2.3 Join Operators 6.2.4 Grouping and Aggregation 6.2.5 Delta Operator 6.2.6 Summary and Conclusions 6.3 Star Schema Benchmark Queries 6.3.1 Query Runtimes 6.3.2 Improvements Through Vectorization 6.3.3 Storage Overhead 6.3.4 Summary and Conclusions 6.4 Error Detecting B-Tree 6.4.1 Single Key Lookup 6.4.2 Key Value-Pair Insertion 6.5 Summary 7 SUMMARY AND CONCLUSIONS 7.1 Future Work A APPENDIX A.1 List of Golden As A.2 More on Hamming Coding A.2.1 Code examples A.2.2 Vectorization BIBLIOGRAPHY LIST OF FIGURES LIST OF TABLES LIST OF LISTINGS LIST OF ACRONYMS LIST OF SYMBOLS LIST OF DEFINITION

Parameterized macromodeling of passive and active dynamical systems

L'abstract è presente nell'allegato / the abstract is in the attachmen