Noise reduction by pixel circuit optimization in 4-T pixel structure detectors using integrated circuit technologies

Abstract: The most commonly used pixel structure in integrated circuit technologies is the three-transistor pixel structure (3-T). This structure consists of a pixel, a reset transistor, a source follower and a pixel select transistor. An extension to this is the 4-T pixel structure where an extra transistor is included to enable current steering in the readout phase and reset phase. This greatly reduces current consumption compared to the conventional 3-T pixel structure. Simulation results depicting this optimization is provided to support the technical contribution of this paper

Amorphous and Polycrystalline Photoconductors for Direct Conversion Flat Panel X-Ray Image Sensors

In the last ten to fifteen years there has been much research in using amorphous and polycrystalline semiconductors as x-ray photoconductors in various x-ray image sensor applications, most notably in flat panel x-ray imagers (FPXIs). We first outline the essential requirements for an ideal large area photoconductor for use in a FPXI, and discuss how some of the current amorphous and polycrystalline semiconductors fulfill these requirements. At present, only stabilized amorphous selenium (doped and alloyed a-Se) has been commercialized, and FPXIs based on a-Se are particularly suitable for mammography, operating at the ideal limit of high detective quantum efficiency (DQE). Further, these FPXIs can also be used in real-time, and have already been used in such applications as tomosynthesis. We discuss some of the important attributes of amorphous and polycrystalline x-ray photoconductors such as their large area deposition ability, charge collection efficiency, x-ray sensitivity, DQE, modulation transfer function (MTF) and the importance of the dark current. We show the importance of charge trapping in limiting not only the sensitivity but also the resolution of these detectors. Limitations on the maximum acceptable dark current and the corresponding charge collection efficiency jointly impose a practical constraint that many photoconductors fail to satisfy. We discuss the case of a-Se in which the dark current was brought down by three orders of magnitude by the use of special blocking layers to satisfy the dark current constraint. There are also a number of polycrystalline photoconductors, HgI2 and PbO being good examples, that show potential for commercialization in the same way that multilayer stabilized a-Se x-ray photoconductors were developed for commercial applications. We highlight the unique nature of avalanche multiplication in a-Se and how it has led to the development of the commercial HARP video-tube. An all solid state version of the HARP has been recently demonstrated with excellent avalanche gains; the latter is expected to lead to a number of novel imaging device applications that would be quantum noise limited. While passive pixel sensors use one TFT (thin film transistor) as a switch at the pixel, active pixel sensors (APSs) have two or more transistors and provide gain at the pixel level. The advantages of APS based x-ray imagers are also discussed with examples

Layer by layer printing of nanomaterials for large-area, flexible electronics

Large-area electronics, including printable and flexible electronics, is an emerging concept which aims to develop electronic components in a cheaper and faster manner, especially on those non-conventional substrates. Being flexible and deformable, this new form of electronics is regarded to hold great promises for various futuristic applications including the internet of things, virtual reality, healthcare monitoring, prosthetics and robotics. However, at present, large-area electronics is still nowhere near the commercialisation stage, which is due to several problems associated with performance, uniformity and reliability, etc. Moreover, although the device’s density is not the major concern in printed electronics, there is still a merit in further increasing the total number of devices in a limited area, in order to achieve more electronic blocks, higher performance and multiple functionalities. In this context, this Ph.D. thesis focuses on the printing of various nanomaterials for the realisation of high-performance, flexible and large-area electronics. Several aspects have been covered in this thesis, including the printing dynamics of quasi-1D NWs, the contact problem in device realisation and the strategy to achieve sequential integration (3D integration) of the as-printed devices, both on rigid and flexible substrates. Promisingly, some of the devices based on the printed nanomaterial show a comparable performance to the state-of-the-art technology. With the demonstrated 3D integration strategy, a highly dense array of electronic devices can be potentially achieved by printing method. This thesis also touches on the problem associated with the circuit and system realisation. Specifically, graphene-based logic gates and NW based UV sensing circuit has been discussed, which shows the promising applications of nanomaterial-based electronics. Future work will be focusing on extending the UV sensing circuit to an active matrix sensor array

Mathematical Modelling of Low-Frequency BiCMOS Near-Infrared Detector

Bipolar complementary metal-oxide semiconductor (BiCMOS) technology is the platform of choice for near-Infrared (IR) detector research because of low power consumption, increased operating speed and a high fill-factor. The drawback is poor noise performance which can be attributed to the readout circuitry of the detector. Conventional near-IR detector design is an iterative process. While recognising the value of this approach, rapid prototyping can be achieved by using mathematical modelling that would ensure design repeatability. Heterojunction bipolar transistor (HBT) and metal-oxide field-effect transistors (MOSFET) models for SiGe process technologies have been documented extensively. However, mathematical modelling of BiCMOS near-IR detectors has not been implemented in a complete working system before. This proposed model can be used to determine the output voltage as well as the noise performance of near-IR detectors. The focus of this research is to determine how process independent parameters and detector performance can be mathematically modelled. Secondly, and associated to this, is determining how the model can be extended to accommodate multiple feature sizes including short-channel MOSFETs. An implementation of this model on the three-transistor pixel structure, using reverse-biased diode-connected HBTs as pixels, was done as part of the experimental verification process of this research. The implementation was done in a 2 × 2 gated array detector configuration. The validity of the proposed modelling procedure was verified through comparison of simulations and measured results. The simulations were done in an iterative fashion to show how a deviation in one process independent parameter affects the noise performance, while the other process independent parameters are kept constant. The detector design with optimal noise performance can be achieved in this manner, thereby minimising design time and developing optimised detectors without the need for extensive prototyping. The main contribution of this research is that a designer can use this mathematical model to tune a detector to achieve desired performance. By changing the temperature, biasing voltage and biasing current and choosing the aspect ratio, noise performance changes. An iterative process in the mathematical model development can achieve optimised parameters for noise performance. Two approaches, namely DC analysis and y-parameter representation, were used to develop the mathematical model. Feedback was taken into account using the y-parameter representation. The measured results show that the output voltage behaviour follows the mathematical model developed. The output voltage behaviour also shows that the mathematical model parameters can determine noise performance. As an extension to this work, the same modelling process can be used to develop mathematical models for other detecting structures such as the four-transistor pixel structure.Thesis (PhD (Electronic Engineering))--University of Pretoria, 2020.Optronic Sensor Systems, Defence, Peace, Safety and Security (DPSS), Council for Scientific and Industrial Research (CSIR), South AfricaArmscor, Armaments Corporation of South Africa Limited Act, Act No 51 of 2003Department of International Relations, University of Pretoria, South AfricaNational Research Foundation (NRF), South AfricaElectrical, Electronic and Computer EngineeringPhD (Electronic Engineering)Unrestricte

Multi-mode Pixel Architectures for Large Area Real-Time X-ray Imaging

The goal of this work is to extend the state-of-the-art in digital medical X-ray imaging as it pertains to real-time, low-noise imaging and multi-mode imager functionality. One focus of this research in digital flat-panel imagers is to increase the detective quantum efficiency, particularly at low X-ray exposures, in order to enable low-noise imaging applications such as fluoroscopy or tomographic mammography. Another focus of this research is in the creation of a multi-mode imager, such as a combined radiographic and fluoroscopic (R&F) imager, which will reduce hospital costs, both in terms of equipment acquisition and storage space. To that end, we propose a novel three-transistor multi-mode digital flat-panel imager with a dynamic range capable for use in R&F applications, with a particular focus on noise optimization for low-noise real-time digital flat-panel X-ray fluoroscopy. This work involves the derivation and optimization of the total input referred noise of an active pixel sensor (APS) in terms of the on-pixel thin-film transistor device dimensions. It is determined that in order to minimize noise, all non-transistor capacitances at the pixel sense node needed to be minimized. This leads to a design where the on-pixel storage capacitance is eliminated; and instead the gate capacitance of the sense-node transistor is used to store the incoming X-ray converted charge. This work allows researchers to gain insight into the fundamental noise operation of active pixels used in medical imaging, and to appropriately choose device dimensions. Due to the inherent large feature sizes of thin-film transistors, active pixel flat-panel X-ray medical imagers offer lower resolution than their film-screen counterparts. By demonstrating the desirability of smaller device dimensions for reduced noise and the elimination of a storage capacitor, this research frees some of the area constraints that exist in active pixel flat-panel imagers, allowing for smaller pixels, and thus higher resolution medical imagers. The noise analysis and optimization as a function of pixel TFT device dimensions in this work is applicable to any amorphous silicon (a-Si) based charge-sensitive pixel, and is easily extended to other device technologies such as polysilicon (poly-Si). iv In addition, experimental results of a 64x64 pixel four-transistor APS imaging array fabricated in a-Si technology and mated with an a-Se photoconductor for use in medical X-ray imaging is presented. MTF results and transient response in the presence of X-rays (image lag) for the APS array are poor, which is ascribed to high charge trapping at the silicon nitride/a-Se interface. Improvements to the silicon nitride passivation layer and pixel layout are suggested to reduce this charge trapping. The prototype imager is compared directly with a state-of-the-art a-Si PPS imaging array and demonstrates good SNR performance for X-ray exposures down to 1.5μR. Pixel design and fabrication process improvements are suggested for low-exposure APS testing and improved low-noise performance

Spins and orbits in semiconductor quantum dots

Spins in semiconductor quantum dots are among the most promising candidates for the realization of a scalable quantum bit (qubit), the basic building block of a quantum computer. With this motivation, spin and orbital properties of quantum dots in three different semiconductor systems are investigated in this thesis: depletion mode quantum dots in GaAs/AlGaAs heterostructures as well as in silicon-germanium core-shell nanowires (GeSi NW), and accumulation mode quantum dots formed in a fin field-effect transistor (FinFET). The chronological order of this thesis reflects two major shifts of focus of the semiconductor spin qubit research in recent years: a transition from lateral GaAs quantum dots towards scalable, silicon-based systems and a change from electrons towards holes as the host of the spin qubit because of better prospects for spin manipulation and spin coherence. In a lateral GaAs single electron quantum dot, a new in-plane magnetic-field-assisted spectroscopy is demonstrated, which allows one to deduce the three dimensional confinement potential landscape of the quantum dot orbitals, which gives insight into the alignment of the ellipsoidal quantum dot with respect to the crystal axes. With this full model of the confinement at hand, the dependence of the spin relaxation on the direction and strength of an in-plane magnetic field is investigated. To mitigate the spin relaxation anisotropy due to anisotropic in-plane confinement of the quantum dot, said confinement is symmetrized by tuning the gate voltages to obtain a circular quantum dot. Then, the experimentally observed spin relaxation anisotropy can be attributed to the interplay of Rashba and Dresselhaus spin-orbit interaction (SOI) present in GaAs. By using a theoretical model, the strength and the relative sign of the Rashba and Dresselhaus SOI was obtained for the first time in such a quantum dot. From the dependence of the spin relaxation on the magnetic field strength, hyperfine induced phonon mediated spin relaxation was demonstrated -- a process predicted more than 15 years ago. Here, the hyperfine interaction leads to a mixing of spin and orbital degrees of freedom and facilitates spin relaxation. Limited by this relaxation process, a spin relaxation time of 57 +/- 15 s was measured -- setting the current record for spin lifetime in a nanostructure. Inspired by the unprecedented knowledge of the confinement and the SOI in the quantum dots used, a new theory to quantify the various corrections to the g-factor was developed. Later, these theoretical predictions have been experimentally validated by measurements of the g-factor anisotropy using pulsed-gate spectroscopy. Due to short spin qubit coherence time in GaAs, which is limited by the nuclear spins, a better approach is to build a spin qubit in a semiconductor vacuum with little or no nuclear spins. Because holes have minimal overlap with the nuclei of the semiconductor due to the p-type symmetry of their wave function, this type of decoherence is strongly suppressed when changing the host of the spin qubit from electrons to holes. The longer coherence times in combination with the predicted emergence of a direct type of Rashba SOI (DRSOI) -- a particularly strong and electrically controllable SOI -- motivated the investigation of hole quantum dots in GeSi NW. In this system, anisotropic behavior of the leakage current through a double quantum dot in Pauli spin blockade was observed. This anisotropy is qualitatively explained by a phenomenological model, which involves an anisotropic g-factor and an effective spin-orbit field. While the dominant type of SOI could not be resolved conclusively, the obtained data is not inconsistent with the expectation of DRSOI. Because each wire has to be placed manually, this NW based system lacks scalability. Hole and electron quantum dots in an industry-compatible silicon FinFET structure, conversely, are promising candidates for scalable spin qubits and, therefore, hold the potential to be used in a spin-based quantum computer. Recently, DRSOI was predicted to also emerge in narrow silicon channels such as FinFETs. In this thesis, the formation of accumulation mode hole quantum dots in such a FinFET structure is reported -- an important first step towards the realization of a scalable, all-electrically controllable, DRSOI hole spin qubit

Integrated Circuits/Microchips

With the world marching inexorably towards the fourth industrial revolution (IR 4.0), one is now embracing lives with artificial intelligence (AI), the Internet of Things (IoTs), virtual reality (VR) and 5G technology. Wherever we are, whatever we are doing, there are electronic devices that we rely indispensably on. While some of these technologies, such as those fueled with smart, autonomous systems, are seemingly precocious; others have existed for quite a while. These devices range from simple home appliances, entertainment media to complex aeronautical instruments. Clearly, the daily lives of mankind today are interwoven seamlessly with electronics. Surprising as it may seem, the cornerstone that empowers these electronic devices is nothing more than a mere diminutive semiconductor cube block. More colloquially referred to as the Very-Large-Scale-Integration (VLSI) chip or an integrated circuit (IC) chip or simply a microchip, this semiconductor cube block, approximately the size of a grain of rice, is composed of millions to billions of transistors. The transistors are interconnected in such a way that allows electrical circuitries for certain applications to be realized. Some of these chips serve specific permanent applications and are known as Application Specific Integrated Circuits (ASICS); while, others are computing processors which could be programmed for diverse applications. The computer processor, together with its supporting hardware and user interfaces, is known as an embedded system.In this book, a variety of topics related to microchips are extensively illustrated. The topics encompass the physics of the microchip device, as well as its design methods and applications

Development of a miniaturised particle radiation monitor for Earth orbit

Geometry and algorithm design for a novel highly miniaturised radiation monitor (HMRM) for spacecraft in medium Earth orbit are presented. The HMRM device comprises a telescopic configuration of application-specific active pixel sensors enclosed in a titanium shield, with an estimated total mass of 52 g and volume of 15 cm3. The monitor is intended to provide real-time dosimetry and identification of energetic charged particles in fluxes of up to 108 cm-2 s-1 (omnidirectional). Achieving this capability with such a small instrument could open new prospects for radiation detection in space. The methodology followed for the design and optimisation of the particle detector geometry is explained and analysis algorithms - for real-time use within the monitor and for post-processing reconstruction of spectra - are presented. Simulations with the Geant4 toolkit are used to predict operational results in various Earth orbits. Early test results of a prototype monitor, including calibration of the pixel sensors, are also reported.Open Acces

Noise Analysis and Measurement for Current Mode and Voltage Mode Active Pixel Sensor Readout Methods

A detailed experimental and theoretical investigation of noise in both current mode and voltage mode amorphous silicon (a-Si) active pixel sensors (APS) has been performed in this study. Both flicker (1/f) and thermal noise are considered. The experimental result in this study emphasizes the computation of the output noise variance, and not the output noise spectrum. This study determines which mode of operation is superior in term of output noise. The current noise power spectral density of a single a-Si TFT is also measured in order to find the suitable model for calculating the flicker noise. This experimental result matches Hooge’s model. The theoretical analysis shows that the voltage mode APS has an advantage over the current mode APS in terms of the flicker noise due to the operation of the readout process. The experimental data are compared to the theoretical analysis and are in good agreement. The results obtained in this study apply equally well to APS circuits made using polycrystalline silicon (poly-Si) and single crystal silicon

Dynamic range and sensitivity improvement of infrared detectors using BiCMOS technology

The field of infrared (IR) detector technology has shown vast improvements in terms of speed and performance over the years. Specifically the dynamic range (DR) and sensitivity of detectors showed significant improvements. The most commonly used technique of implementing these IR detectors is the use of charge-coupled devices (CCD). Recent developments show that the newly investigated bipolar complementary metal-oxide semiconductor (BiCMOS) devices in the field of detector technology are capable of producing similar quality detectors at a fraction of the cost. Prototyping is usually performed on low-cost silicon wafers. The band gap energy of silicon is 1.17 eV, which is too large for an electron to be released when radiation is received in the IR band. This means that silicon is not a viable material for detection in the IR band. Germanium exhibits a band gap energy of 0.66 eV, which makes it a better material for IR detection. This research is aimed at improving DR and sensitivity in IR detectors. CCD technology has shown that it exhibits good DR and sensitivity in the IR band. CMOS technology exhibits a reduction in prototyping cost which, together with electronic design automation software, makes this an avenue for IR detector prototyping. The focus of this research is firstly on understanding the theory behind the functionality and performance of IR detectors. Secondly, associated with this, is determining whether the performance of IR detectors can be improved by using silicon germanium (SiGe) BiCMOS technology instead of the CCD technology most commonly used. The Simulation Program with Integrated Circuit Emphasis (SPICE) was used to realise the IR detector in software. Four detectors were designed and prototyped using the 0.35 µm SiGe BiCMOS technology from ams AG as part of the experimental verification of the formulated hypothesis. Two different pixel structures were used in the four detectors, which is the silicon-only p-i-n diodes commonly found in literature and diode-connected SiGe heterojunction bipolar transistors (HBTs). These two categories can be subdivided into two more categories, which are the single-pixel-single-amplifier detectors and the multiple-pixel-single-amplifier detector. These were needed to assess the noise performance of different topologies. Noise influences both the DR and sensitivity of the detector. The results show a unique shift of the detecting band typically seen for silicon detectors to the IR band, accomplished by using the doping feature of HBTs using germanium. The shift in detecting band is from a peak of 250 nm to 665 nm. The detector still accumulates radiation in the visible band, but a significant portion of the near-IR band is also detected. This can be attributed to the reduced band gap energy that silicon with doped germanium exhibits. This, however, is not the optimum structure for IR detection. Future work that can be done based on this work is that the pixel structure can be optimised to move the detecting band even more into the IR region, and not just partially.Dissertation (MEng)--University of Pretoria, 2013.Electrical, Electronic and Computer Engineeringunrestricte