60 research outputs found

    Selection of the silicon sensor thickness for the Phase-2 upgrade of the CMS Outer Tracker

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    During the operation of the CMS experiment at the High-Luminosity LHC the silicon sensors of the Phase-2 Outer Tracker will be exposed to radiation levels that could potentially deteriorate their performance. Previous studies had determined that planar float zone silicon with n-doped strips on a p-doped substrate was preferred over p-doped strips on an n-doped substrate. The last step in evaluating the optimal design for the mass production of about 200 m2^{2} of silicon sensors was to compare sensors of baseline thickness (about 300 μm) to thinned sensors (about 240 μm), which promised several benefits at high radiation levels because of the higher electric fields at the same bias voltage. This study provides a direct comparison of these two thicknesses in terms of sensor characteristics as well as charge collection and hit efficiency for fluences up to 1.5 × 1015^{15} neq_{eq}/cm2^{2}. The measurement results demonstrate that sensors with about 300 μm thickness will ensure excellent tracking performance even at the highest considered fluence levels expected for the Phase-2 Outer Tracker

    Test beam performance of a CBC3-based mini-module for the Phase-2 CMS Outer Tracker before and after neutron irradiation

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    The Large Hadron Collider (LHC) at CERN will undergo major upgrades to increase the instantaneous luminosity up to 5–7.5×1034^{34} cm2^{-2}s1^{-1}. This High Luminosity upgrade of the LHC (HL-LHC) will deliver a total of 3000–4000 fb-1 of proton-proton collisions at a center-of-mass energy of 13–14 TeV. To cope with these challenging environmental conditions, the strip tracker of the CMS experiment will be upgraded using modules with two closely-spaced silicon sensors to provide information to include tracking in the Level-1 trigger selection. This paper describes the performance, in a test beam experiment, of the first prototype module based on the final version of the CMS Binary Chip front-end ASIC before and after the module was irradiated with neutrons. Results demonstrate that the prototype module satisfies the requirements, providing efficient tracking information, after being irradiated with a total fluence comparable to the one expected through the lifetime of the experiment

    The CMS Phase-1 pixel detector upgrade

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    The CMS detector at the CERN LHC features a silicon pixel detector as its innermost subdetector. The original CMS pixel detector has been replaced with an upgraded pixel system (CMS Phase-1 pixel detector) in the extended year-end technical stop of the LHC in 2016/2017. The upgraded CMS pixel detector is designed to cope with the higher instantaneous luminosities that have been achieved by the LHC after the upgrades to the accelerator during the first long shutdown in 2013–2014. Compared to the original pixel detector, the upgraded detector has a better tracking performance and lower mass with four barrel layers and three endcap disks on each side to provide hit coverage up to an absolute value of pseudorapidity of 2.5. This paper describes the design and construction of the CMS Phase-1 pixel detector as well as its performance from commissioning to early operation in collision data-taking.Peer reviewe

    Comparative evaluation of analogue front-end designs for the CMS Inner Tracker at the High Luminosity LHC

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    The CMS Inner Tracker, made of silicon pixel modules, will be entirely replaced prior to the start of the High Luminosity LHC period. One of the crucial components of the new Inner Tracker system is the readout chip, being developed by the RD53 Collaboration, and in particular its analogue front-end, which receives the signal from the sensor and digitizes it. Three different analogue front-ends (Synchronous, Linear, and Differential) were designed and implemented in the RD53A demonstrator chip. A dedicated evaluation program was carried out to select the most suitable design to build a radiation tolerant pixel detector able to sustain high particle rates with high efficiency and a small fraction of spurious pixel hits. The test results showed that all three analogue front-ends presented strong points, but also limitations. The Differential front-end demonstrated very low noise, but the threshold tuning became problematic after irradiation. Moreover, a saturation in the preamplifier feedback loop affected the return of the signal to baseline and thus increased the dead time. The Synchronous front-end showed very good timing performance, but also higher noise. For the Linear front-end all of the parameters were within specification, although this design had the largest time walk. This limitation was addressed and mitigated in an improved design. The analysis of the advantages and disadvantages of the three front-ends in the context of the CMS Inner Tracker operation requirements led to the selection of the improved design Linear front-end for integration in the final CMS readout chip

    Beam test performance of a prototype module with Short Strip ASICs for the CMS HL-LHC tracker upgrade

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    The Short Strip ASIC (SSA) is one of the four front-end chips designed for the upgrade of the CMS Outer Tracker for the High Luminosity LHC. Together with the Macro-Pixel ASIC (MPA) it will instrument modules containing a strip and a macro-pixel sensor stacked on top of each other. The SSA provides both full readout of the strip hit information when triggered, and, together with the MPA, correlated clusters called stubs from the two sensors for use by the CMS Level-1 (L1) trigger system. Results from the first prototype module consisting of a sensor and two SSA chips are presented. The prototype module has been characterized at the Fermilab Test Beam Facility using a 120 GeV proton beam

    Mechanical stability of the CMS strip tracker measured with a laser alignment system

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    Evaluation of planar silicon pixel sensors with the RD53A readout chip for the Phase-2 Upgrade of the CMS Inner Tracker

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    The Large Hadron Collider at CERN will undergo an upgrade in order to increase its luminosity to 7.5 × 10³⁴ cm⁻²s⁻¹. The increased luminosity during this High-Luminosity running phase, starting around 2029, means a higher rate of proton-proton interactions, hence a larger ionizing dose and particle fluence for the detectors. The current tracking system of the CMS experiment will be fully replaced in order to cope with the new operating conditions. Prototype planar pixel sensors for the CMS Inner Tracker with square 50 μm × 50 μm and rectangular 100 μm × 25 μm pixels read out by the RD53A chip were characterized in the lab and at the DESY-II testbeam facility in order to identify designs that meet the requirements of CMS during the High-Luminosity running phase. A spatial resolution of approximately 3.4 μm (2 μm) is obtained using the modules with 50 μm × 50 μm (100 μm × 25 μm) pixels at the optimal angle of incidence before irradiation. After irradiation to a 1 MeV neutron equivalent fluence of Φeq = 5.3 × 10¹⁵ cm⁻², a resolution of 9.4 μm is achieved at a bias voltage of 800 V using a module with 50 μm × 50 μm pixel size. All modules retain a hit efficiency in excess of 99% after irradiation to fluences up to 2.1 × 10¹⁶ cm⁻². Further studies of the electrical properties of the modules, especially crosstalk, are also presented in this paper

    CIC: a radiation tolerant 65 nm data aggregation ASIC for the future CMS tracking detector at LHC

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    International audienceFor the Phase II upgrade at HL-LHC, CMS needs a new Outer Tracker detector able to cope with reduced material budget, increased radiation tolerance and higher pile-up conditions with respect to LHC. The main feature of the Outer Tracker will be its inclusion at the first level of the CMS trigger system with data readout at 40 MHz. Two types of modules, Pixel-Strip and Strip-Strip will equip the Outer Tracker. Each module consists of a superposition of two silicon layers, able to detect charged particles, and an innovative readout electronics, allowing a significant data rate reduction. The Concentrator Integrated Circuit (CIC) is a 65 nm CMOS radiation tolerant front-end ASIC for both modules. It is considered a fundamental element of the future detector front-end chain due to its role in aggregating and compressing data from 8 front-end ASICs on each module. It reduces the data throughput by an order of magnitude. Two first version of the CIC were previously developed and tested. This paper will present the pre-production version, called CIC2.1, together with the functional and wafer test results
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