42 research outputs found
Does speculation impact what factors determine oil futures prices?
Recent studies provide contradictory evidence about the impact of speculation on commodity prices. Rather than directly evaluating this relationship we instead use a novel approach to assess if speculation can inform our choice of factor inclusion in modelling oil futures
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Volatility and Correlation Timing: The Role of Commodities
This paper examines the role of commodit ies from the perspective of dynamic asset allocation. W e model conditional second moments of st ock, bond and commodity futures and examine their impact on the portfolio choice decision of a risk-averse investor in a mean-variance framework . Findings suggest that adding commodities in the opportunity set enhances portfolio risk-return characteristics and offers diversification benefits. Moreover, there is substantial economic value in both volatility and correlation timing strategies. Results are robust across various sub-periods and rebalancing strategies , alternative correlation dynamic s specifications, short-sale constraints and transaction costs under both in-and out-of-sample settings
Correlations between oil and stock markets:A wavelet-based approach
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High-Level Power Estimation with Interconnect Effects
We extend earlier work on high-level average power estimation to include the power due to interconnect loading. The resulting technique is a combination of a RTL-level gate count prediction method and average interconnect estimation based on Rent's rule. The method can be adapted to be used with different place and route engines and standard cell libraries. For a number of benchmark circuits, the method is verified by extracting wire lengths from a layout of each circuit and then comparing the predicted (at RTL) power against that measured using SPICE. An average error of 14.4% is obtained for the average interconnect length, and an average error of 25.8% is obtained for average power estimation including interconnect effects
High-Level Area Estimation
Early power estimation requires one to estimate the area (gate count) of a design from a high-level description. We propose a method to do this that makes use of the concept of Boolean networks (BN) and introduces an invariant area complexity measure which captures the gate-count requirement of a design. The method can be adapted to be used at different points on the area/delay tradeoff curve, with different synthesizer/mapper tools, and different target gate libraries. The area model is experimentally verified and tested using a number of ISCAS and MCNC benchmark circuits and two different target cell libraries, on two different synthesis systems