Circuits and Systems for On-Chip RF Chemical Sensors and RF FDD Duplexers

Integrating RF bio-chemical sensors and RF duplexers helps to reduce cost and area in the current applications. Furthermore, new applications can exist based on the large scale integration of these crucial blocks. This dissertation addresses the integration of RF bio-chemical sensors and RF duplexers by proposing these initiatives. A low power integrated LC-oscillator-based broadband dielectric spectroscopy (BDS) system is presented. The real relative permittivity ε’r is measured as a shift in the oscillator frequency using an on-chip frequency-to-digital converter (FDC). The imaginary relative permittivity ε”r increases the losses of the oscillator tank which mandates a higher dc biasing current to preserve the same oscillation amplitude. An amplitude-locked loop (ALL) is used to fix the amplitude and linearize the relation between the oscillator bias current and ε”r. The proposed BDS system employs a sensing oscillator and a reference oscillator where correlated double sampling (CDS) is used to mitigate the impact of flicker noise, temperature variations and frequency drifts. A prototype is implemented in 0.18 µm CMOS process with total chip area of 6.24 mm^2 to operate in 1-6 GHz range using three dual bands LC oscillators. The achieved standard deviation in the air is 2.1 ppm for frequency reading and 110 ppm for current reading. A tunable integrated electrical balanced duplexer (EBD) is presented as a compact alternative to multiple bulky SAW and BAW duplexers in 3G/4G cellular transceivers. A balancing network creates a replica of the transmitter signal for cancellation at the input of a single-ended low noise amplifier (LNA) to isolate the receive path from the transmitter. The proposed passive EBD is based on a cross-connected transformer topology without the need of any extra balun at the antenna side. The duplexer achieves around 50 dB TX-RX isolation within 1.6-2.2 GHz range up to 22 dBm. The cascaded noise figure of the duplexer and LNA is 6.5 dB, and TX insertion loss (TXIL) of the duplexer is about 3.2 dB. The duplexer and LNA are implemented in 0.18 µm CMOS process and occupy an active area of 0.35 mm^2

AN INVESTIGATION INTO QUASI-TUNABLE RF PASSIVE CIRCUIT DESIGN

Modern wireless electronic circuit design is continually challenged by the needs to reduce circuit size, and to also function reliably with lower power levels. To that end, two aspects of RFIC circuit design and technology have gained great interest, i.e. RF MEMS switching technology, and RF MEMS passive component development. MEMS (Micro-Electromechanical Systems) technology, originally developed for the defense industry, has been in development since the 1970s, and today enjoys wide range of utilization, from the defense industry to the automotive industry. Spiral inductors used in RFIC circuits, e.g. silicon technology, are ubiquitous in wireless RFIC applications. The tradeoff with low cost fabrication processes are inductors with very low quality factors which greatly affect the losses in RF passive circuits, and hence their performance. Research in the area of RF MEMS inductors has shown promise for components with significantly higher Q, and hence has the potential for wide range of benefits in both tunable and non-tunable applications. Electronic design environments such as Agilent ADS provide automated tools for generating passive circuits, e.g. band-pass filters, based on a specified desired frequency response and circuit topology. However, they typically do not incorporate component Q, which can greatly affect the actual circuit’s performance, into the results of their suggested designs. With this in mind, the development of a systematic approach to predict the relationship between passive circuit component’s Q and its S-parameters can be of great benefit to the RF electronic circuit designer, especially in the area of wireless passive circuits. The first of part of this work develops an analytical approach, using mesh-current analysis to derive the relationship between inductor Q, and the S-parameters of a generalized passive RF circuit. For the analysis, the S-parameters of a 90ᵒ Lumped Element Hybrid coupler are derived in terms of even mode and odd mode coupler responses using mathematical functions that relate the S-parameters of each circuit to their associated even mode Q, and odd mode Q factors The results of this research demonstrate that work can still be done in the area of circuit analysis to extend the capability of common passive circuit design tools to include the effects of component Q on the design results, e.g. filter design tools which commonly utilize simple LC circuits as building blocks for more complicated filters. The second part of this work investigates the performance of different RF switching technologies, i.e. MEMS Switching vs. RF PIN Diode, to a 2-3 GHz quasi-tunable RFIC 90ᵒ Lumped Element Hybrid Coupler design utilizing high Q three-dimensional air-core solenoidal MEMS inductors, and IPD Capacitors. The results of this investigation demonstrated the following: The concept of a tunable RFIC Lumped Element Hybrid coupler in the 2-3 GHz range is feasible, and if implement with high Q inductors, comparable to that of off-the-shelf 90° Hybrid Couplers in terms of return loss and isolation performance, but in a much small area, ~ one fiftieth of the surface area at 2 GHz. RF PIN Diodes at low current levels can be sufficient when only the phase imbalance of the coupler is critical. If either magnitude loss or magnitude balance is critical, then RF MEMS switching may provide a better alternative. RF PIN Diode forward bias resistance approaches that of DC contact switch resistance at higher current levels, e.g. 60 mA, and hence their power consumption becomes the main issue in determining the technology best suited for this application. The concept of a ground switched tapped capacitor bank was developed to maximize the switched capacitor Q. This approach optimized the coupler performance compared to a signal switched design. In the third part of this work, a selectable dual-band 630 MHz and 900 MHz PCB lumped element hybrid coupler is designed, fabricated, and measured. The inductors and capacitors are fabricated with only printed conductors and metal patches respectively on a four-layer PCB. The S-parameters of the measured results and simulations correlated extremely well after adjustment of the substrate dielectric thicknesses used for the simulation of the capacitors. This work demonstrates that lumped element passive components can be cheaply fabricated in PCB technology that are useful in the frequency range of 600 MHZ to 1300 MHZ, partially covering the GSM and LTE bands, that can be used in quasi-tunable wireless PCB applications, e.g. base stations, while also reducing circuit size in place of commonly found in microstrip distributed circuits

Design and Analysis of Low-power Millimeter-Wave SiGe BiCMOS Circuits with Application to Network Measurement Systems

Interest in millimeter (mm-) wave frequencies covering the spectrum of 30-300 GHz has been steadily increasing. Advantages such as larger absolute bandwidth and smaller form-factor have made this frequency region attractive for numerous applications, including high-speed wireless communication, sensing, material science, health, automotive radar, and space exploration. Continuous development of silicon-germanium heterojunction bipolar transistor (SiGe HBT) and associated BiCMOS technology has achieved transistors with fT/fmax of 505/720 GHz and integration with 55 nm CMOS. Such accomplishment and predictions of beyond THz performance have made SiGe BiCMOS technology the most competitive candidate for addressing the aforementioned applications. Especially for mobile applications, a critical demand for future mm-wave applications will be low DC power consumption (Pdc), which requires a substantial reduction of supply voltage and current. Conventionally, reducing the supply voltage will lead to HBTs operating close to or in the saturation region, which is typically avoided in mm-wave circuits due to expectated performance degradation and often inaccurate models. However, due to only moderate speed reduction at the forward-biased base-collector voltage (VBC) up to 0.5 V and the accuracy of the compact model HICUM/L2 also in saturation, low-power mm-wave circuits with SiGe HBTs operating in saturation offer intriguing benefits, which have been explored in this thesis based on 130 nm SiGe BiCMOS technologies: • Different low-power mm-wave circuit blocks are discussed in detail, including low-noise amplifiers (LNAs), down-conversion mixers, and various frequency multipliers covering a wide frequency range from V-band (50-75 GHz) to G-band (140-220 GHz). • Aiming at realizing a better trade-off between Pdc and RF performance, a drastic decrease in supply voltage is realized with forward-biased VBC, forcing transistors of the circuits to operate in saturation. • Discussions contain the theoretical analysis of the key figure of merits (FoMs), topology and bias selection, device sizing, and performance enhancement techniques. • A 173-207 GHz low-power amplifier with 23 dB gain and 3.2 mW Pdc, and a 72-108 GHz low-power tunable amplifier with 10-23 dB gain and 4-21 mW Pdc were designed. • A 97 GHz low-power down-conversion mixer was presented with 9.6 dB conversion gain (CG) and 12 mW Pdc. • For multipliers, a 56-66 GHz low-power frequency quadrupler with -3.6 dB peak CG and 12 mW Pdc, and a 172-201 GHz low-power frequency tripler with -4 dB peak CG and 10.5 mW Pdc were realized. By cascading these two circuits, also a 176-193 GHz low-power ×12 multiplier was designed, achieving -11 dBm output power with only 26 mW Pdc. • An integrated 190 GHz low-power receiver was designed as one receiving channel of a G-band frequency extender specifically for a VNA-based measurement system. Another goal of this receiver is to explore the lowest possible Pdc while keeping its highly competitive RF performance for general applications requiring a wide LO tuning range. Apart from the low-power design method of circuit blocks, the careful analysis and distribution of the receiver FoMs are also applied for further reduction of the overall Pdc. Along this line, this receiver achieved a peak CG of 49 dB with a 14 dB tunning range, consuming only 29 mW static Pdc for the core part and 171 mW overall Pdc, including the LO chain. • All designs presented in this thesis were fabricated and characterized on-wafer. Thanks to the accurate compact model HICUM/L2, first-pass access was achieved for all circuits, and simulation results show excellent agreement with measurements. • Compared with recently published work, most of the designs in this thesis show extremely low Pdc with highly competitive key FoMs regarding gain, bandwidth, and noise figure. • The observed excellent measurement-simulation agreement enables the sensitivity analysis of each design for obtaining a deeper insight into the impact of transistor-related physical effects on critical circuit performance parameters. Such studies provide meaningful feedback for process improvement and modeling development.:Table of Contents Kurzfassung . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii 1 Introduction 1 1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 List of symbols and acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Technology 7 2.1 Fabrication Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 SiGe HBT performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.2 B11HFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1.3 SG13G2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.4 SG13D7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2 Commonly Used Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.1 Grounded-sidewall-shielded microstrip line . . . . . . . . . . . . . . . . . . 12 2.2.2 Zero-impedance Transmission Line . . . . . . . . . . . . . . . . . . . . . . 15 2.2.3 Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.2.3.1 Active Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.2.3.2 Passive Balun . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3 Low-power Low-noise Amplifiers 25 3.1 173-207 GHz Ultra-low-power Amplifier . . . . . . . . . . . . . . . . . . . . . . . 25 3.1.1 Topology Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.1.2 Bias Dependency of the Small-signal Performance . . . . . . . . . . . . . 27 3.1.2.1 Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.1.2.2 Bias vs Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.1.2.3 Bias vs Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.1.2.4 Bias vs Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 3.1.3 Bias selection and Device sizing . . . . . . . . . . . . . . . . . . . . . . . . 36 3.1.3.1 Bias Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3.1.3.2 Device Sizing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 3.1.4 Performance Enhancement Technologies . . . . . . . . . . . . . . . . . . . 41 3.1.4.1 Gm-boosting Inductors . . . . . . . . . . . . . . . . . . . . . . . 41 3.1.4.2 Stability Enhancement . . . . . . . . . . . . . . . . . . . . . . . 43 3.1.4.3 Noise Improvement . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.1.5 Circuit Realization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 3.1.5.1 Layout Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 3.1.5.2 Inductors Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 3.1.5.3 Dual-band Matching Network . . . . . . . . . . . . . . . . . . . 48 3.1.5.4 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . 50 3.1.6 Results and Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 3.1.6.1 Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . 51 3.1.6.2 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . 51 3.1.6.3 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3.2 72-108 GHz Low-Power Tunable Amplifier . . . . . . . . . . . . . . . . . . . . . . 55 3.2.1 Configuration, Sizing, and Bias Tuning Range . . . . . . . . . . . . . . . . 55 3.2.2 Regional Matching Network . . . . . . . . . . . . . . . . . . . . . . . . . . 57 3.2.2.1 Impedance Variation . . . . . . . . . . . . . . . . . . . . . . . . . 57 3.2.2.2 Regional Matching Network Design . . . . . . . . . . . . . . . . 60 3.2.3 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3.2.4 Results and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3.2.4.1 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 3.2.4.2 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 3.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 4 Low-power Down-conversion Mixers 73 4.1 97 GHz Low-power Down-conversion Mixer . . . . . . . . . . . . . . . . . . . . . 74 4.1.1 Mixer Design and Implementation . . . . . . . . . . . . . . . . . . . . . . 74 4.1.1.1 Mixer Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 4.1.1.2 Bias Selection and Device Sizing . . . . . . . . . . . . . . . . . . 77 4.1.1.3 Mixer Implementation . . . . . . . . . . . . . . . . . . . . . . . . 79 4.1.2 Results and Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 4.1.2.1 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . 80 4.1.2.2 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 4.2 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 5 Low-power Multipliers 87 5.1 General Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 5.2 56-66 GHz Low-power Frequency Quadrupler . . . . . . . . . . . . . . . . . . . . 89 5.3 172-201 GHz Low-power Frequency Tripler . . . . . . . . . . . . . . . . . . . . . 93 5.4 176-193 GHz Low-power ×12 Frequency Multiplier . . . . . . . . . . . . . . . . . 96 5.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 6 Low-power Receivers 101 6.1 Receiver Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 6.2 LO Chain (×12) Integrated 190 GHz Low-Power Receiver . . . . . . . . . . . . . 104 6.2.1 Receiver Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 6.2.2 Low-power Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 6.2.3 Building Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 6.2.3.1 LNA and LO DA . . . . . . . . . . . . . . . . . . . . . . . . . . 108 6.2.3.2 Tunable Mixer and IF BA . . . . . . . . . . . . . . . . . . . . . 111 6.2.3.3 65 GHz (V-band) Quadrupler . . . . . . . . . . . . . . . . . . . 116 6.2.3.4 G-band Tripler . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 6.2.4 Receiver Results and Discussion . . . . . . . . . . . . . . . . . . . . . . . 123 6.2.5 Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 6.2.6 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 6.3 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 7 Conclusions 133 7.1 Summaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 7.2 Outlook . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 Bibliography 135 List of Figures 149 List of Tables 157 A Derivation of the Gm 159 A.1 Gm of standard cascode stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159 A.2 Gm of cascode stage with Lcas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 A.3 Gm of cascode stage with Lb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 B Derivation of Yin in the stability analysis 163 C Derivation of Zin and Zout 165 C.1 Zin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 C.2 Zout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167 D Derivation of the cascaded oP1dB 169 E Table of element values for the designed circuits 17

24GHz CMOS direct downconversion receiver front-end and VCO design

Because of advancements in RF CMOS circuits, devices, and passive elements in the last decade, it has become possible to develop a RF system-on-chip (SoC) that integrates RF, analog and digital circuits completely. Direct downconversion, or zero-IF downconversion architecture, shows an advantage over traditional superheterodyne architectures, because it eliminates the image rejection filter and IF filter, and employs only one local oscillator (LO), which reduces the receiver size and power dissipation significantly. For this reason, direct downconversion has drawn more and more attention recently in various wireless applications. However, it also presents some design challenges like flicker noise, DC offsets, even-order distortion, and I/Q mismatches. In this work, a thorough noise analysis and a comprehensive study of the noise mechanism of the low noise amplifier of CMOS direct downconversion receivers (DCR) is given. Also addressed is the design of a cross-coupled LC voltage-controlled oscillator (VCO). For the low noise amplifier, which presents major noise contribution to the DCR front-end, an optimization technique which employs both a parallel capacitance and an inter-stage inductor is proposed. The addition of this capacitance helps keep the active device relatively small, and the analysis on the effects of the inter-stage inductor shows that it helps boost gain of the LNA at the desired operation frequency of 2.4GHz, and offers a lower noise figure. In order to achieve direct downconversion, both a passive switching mixer and an active double-balanced mixer are presented. The passive switching mixer helps solve the problem of flicker noise, but suffers power loss, while the double-balanced architecture helps relieve the problems of DC offset and second-order distortion. The last part of this presentation is about a partially tunable CMOS LC-VCO which achieves good phase noise performance at the cost of smaller tuning range. It uses on-chip spiral inductors and junction varactors in the resonant LC-tank. The presented building blocks can be used for a low-power, low-voltage DCR front-end for 802.11b/g applications. It is concluded that direct downconversion architecture can find its use in low-power, low-cost 802.11b and Bluetooth applications should the circuit design make use of the optimization techniques addressed in this work

Radio-frequency integrated-circuit design for CMOS single-chip UWB systems

Low cost, a high-integrated capability, and low-power consumption are the basic requirements for ultra wide band (UWB) system design in order for the system to be adopted in various commercial electronic devices in the near future. Thus, the highly integrated transceiver is trended to be manufactured by companies using the latest silicon based complimentary metal-oxide-silicon (CMOS) processes. In this dissertation, several new structural designs are proposed, which provide solutions for some crucial RF blocks in CMOS for UWB for commercial applications. In this dissertation, there is a discussion of the development, as well as an illustration, of a fully-integrated ultra-broadband transmit/receive (T/R) switch which uses nMOS transistors with deep n-well in a standard 0.18-μm CMOS process. The new CMOS T/R switch exploits patterned-ground-shield on-chip inductors together with MOSFET’s parasitic capacitances in order to synthesize artificial transmission lines which result in low insertion loss over an extremely wide bandwidth. Within DC-10 GHz, 10-18 GHz, and 18-20 GHz, the developed CMOS T/R switch exhibits insertion loss of less than 0.7, 1.0 and 2.5 dB and isolation between 32-60 dB, 25-32 dB, and 25-27 dB, respectively. The measured 1-dB power compression point and input third-order intercept point reach as high as 26.2 and 41 dBm, respectively. Further, there is a discussion and demonstration of a tunable Carrier-based Time-gated UWB transmitter in this dissertation which uses a broadband multiplier, a novel fully integrated single pole single throw (SPST) switch designed by the CMOS process, where a tunable instantaneous bandwidth from 500 MHz to 4 GHz is exhibited by adjusting the width of the base band impulses in time domain. The SPST switch utilizes the synthetic transmission line concept and multiple reflections technique in order to realize a flat insertion loss less than 1.5 dB from 3.1 GHz to 10.6 GHz and an extremely high isolation of more than 45 dB within this frequency range. A fully integrated complementary LC voltage control oscillator (VCO), designed with a tunable buffer, operates from 4.6 GHz to 5.9 GHz. The measurement results demonstrate that the integrated VCO has a very low phase noise of –117 dBc/ Hz at 1 MHz offset. The fully integrated VCO achieves a very high figure of merit (FOM) of 183.5 using standard CMOS process while consuming 4 mA DC current

High Frequency Devices and Circuit Modules for Biochemical Microsystems

This dissertation investigates high frequency devices and circuit modules for biochemical microsystems. These modules are designed towards replacing external bulky laboratory instruments and integrating with biochemical microsystems to generate and analyze signals in frequency and time domain. The first is a charge pump circuit with modified triple well diodes, which is used as an on-chip power supply. The second is an on-chip pulse generation circuit to generate high voltage short pulses. It includes a pulse-forming-line (PFL) based pulse generation circuit, a Marx generator and a Blumlein generator. The third is a six-port circuit based on four quadrature hybrids with 2.0~6.0 GHz operating frequency tuning range for analyzing signals in frequency domain on-chip. The fourth is a high-speed sample-and-hold circuit (SHC) with a 13.3 Gs/s sampling rate and ~11.5 GHz input bandwidth for analyzing signals in time domain on-chip. The fifth is a novel electron spin resonance (ESR) spectroscopy with high-sensitivity and wide frequency tuning range

Design of a Magnetically Tunable Low Noise Amplifier in 0.13 um CMOS Technology

With legacy technologies present and approaching new wireless standards, the 1-10 GHz band of frequencies is quickly becoming saturated. Although saturated, the frequency bands are being utilized inefficiently. Cognitive radio, an intelligent wireless communication system, is the novel solution for the efficient utilization of the frequency bands. Front-end receivers for cognitive radio will need the capability to receive and process multiple frequency bands and a key component is the low noise amplifier (LNA). A tunable LNA using a new magnetically tuned input impedance matching network is presented. The LNA has been designed and simulated in a commercially available 0.13 μm CMOS technology and is capable of tuning from 3.2 GHz to 4.6 GHz as S11 \u3c -10 dB. Within this bandwidth the maximum power gain is 16.2 dB, the maximum noise figure is 7.5 dB, and the minimum IIP3 is -6.4 dBm. The total power consumption of the LNA (neglecting the buffer required to drive the 50 Ω test equipment) is 50 mW. This tunable LNA introduces a new magnetically tunable matching technique and tuning scheme capable of continuous frequency variation for LNAs. It is expected that this technique could be expanded to realize LNAs with a tunable, narrow-band response that can cover the entire 1-10 GHz band of frequencies. The presented tunable LNA has demonstrated the capability to cover and process multiple frequencies and can be used for reconfigurable systems. A tunable LNA design is the first step in an effort to realize a fully reconfigurable front-end radio frequency (RF) receiver for future cognitive radio applications

Nonlinear mechanisms in passive microwave devices

Premi extraordinari doctorat curs 2010-2011, àmbit d’Enginyeria de les TICThe telecommunications industry follows a tendency towards smaller devices, higher power and higher frequency, which imply an increase on the complexity of the electronics involved. Moreover, there is a need for extended capabilities like frequency tunable devices, ultra-low losses or high power handling, which make use of advanced materials for these purposes. In addition, increasingly demanding communication standards and regulations push the limits of the acceptable performance degrading indicators. This is the case of nonlinearities, whose effects, like increased Adjacent Channel Power Ratio (ACPR), harmonics, or intermodulation distortion among others, are being included in the performance requirements, as maximum tolerable levels. In this context, proper modeling of the devices at the design stage is of crucial importance in predicting not only the device performance but also the global system indicators and to make sure that the requirements are fulfilled. In accordance with that, this work proposes the necessary steps for circuit models implementation of different passive microwave devices, from the linear and nonlinear measurements to the simulations to validate them. Bulk acoustic wave resonators and transmission lines made of high temperature superconductors, ferroelectrics or regular metals and dielectrics are the subject of this work. Both phenomenological and physical approaches are considered and circuit models are proposed and compared with measurements. The nonlinear observables, being harmonics, intermodulation distortion, and saturation or detuning, are properly related to the material properties that originate them. The obtained models can be used in circuit simulators to predict the performance of these microwave devices under complex modulated signals, or even be used to predict their performance when integrated into more complex systems. A key step to achieve this goal is an accurate characterization of materials and devices, which is faced by making use of advanced measurement techniques. Therefore, considerations on special measurement setups are being made along this thesis.Award-winningPostprint (published version

A low power, low noise, 1.8 GHz voltage-controlled oscillator

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.Includes bibliographical references (leaf 97).by Donald A. Hitko.M.S

Microwave noise detection of a quantum dot with stub impedance matching

Noise is defined as random fluctuations of a signal in time. The fundamental requirement for noise is some sort of randomness. Noise is well-known and infamous to every experimentalist - whether he is working in the field of electronics, optics, acoustics or anywhere else - since such fluctuations are inherent and unavoidable in many systems. For most of us, the word noise has a negative connotation. It is considered to be an unwanted disturbance superposed on a useful signal, which tends to obscure the signal's information. The natural reaction to this nuisance is trying to reduce it as much as possible, be it with a longer averaging time or an improved setup. In this respect, the signal-to-noise ratio, which compares the level of the desired signal with the level of the superposed noise, is the relevant quantity. A signal-to-noise level larger than one has to be achieved in order to observe the requested signal. In fact, noise is often a limiting factor in experiments and there are many examples where a reduced noise level led to the revelation of unexpected features. In this sense, noise seems to be a tedious, annoying matter and it is a fair question to ask why one would make it the topic of an entire thesis. While noise is primarily an experimental affair, theoretical studies on the statistics of these fluctuations have been carried out for a long time, too. These studies draw an interesting picture. Measuring the average current through a system delivers partial information on the mechanisms responsible for conduction. But a more complete description and further information on the conduction mechanisms are given by the probability distribution of the current, containing both the average current and its fluctuations. Even though the fluctuations appear randomly, they are caused by well-defined processes like the thermal motion of charges, the discreteness of charge carriers and the probabilistic character of scattering. Each noise source exhibits distinct characteristics. Measuring the noise properties of a system and knowing the underlying process, one might be able to infer complementary insight beyond what is possible with the mean current. Hence, a profound knowledge of the noise processes does not only help to find a way for reducing the noise level, but can also be used as a diagnostic tool. It was Einstein who realised in 1909 that electromagnetic fluctuations differ if the energy is carried by waves or particles. He derived a linear relation between the mean energy and the corresponding fluctuations for waves, whereas the fluctuations scale with the square root of the mean energy for particles. Another example where fluctuations can provide information about the charge carriers was proposed by Schottky in 1918 in the context of vacuum tubes. Shot noise (which is not a dangerous effect at all despite its name) arises from the granularity of charge and therefore scales with the unit of charge. Indeed, the doubled charge of Cooper pairs and the fractional charge of Laughlin quasiparticles appearing in the fractional quantum Hall state was confirmed in this way. In 1928, the dependence of fluctuations due to thermal agitation was studied experimentally by Johnson and theoretically by Nyquist. In the following, the extrapolation of thermal noise to zero amplitude was used to determine the absolute zero of temperature and a value for the Boltzmann constant was deduced from the temperature dependence of thermal noise. Typical currents that occur in nanoelectronics are tiny. Current fluctuations coming from these samples are even smaller and more challenging to detect and one has to come up with a clever measurement scheme. We are mainly interested in shot noise, whose spectral density is frequency-independent up to a few gigahertz. In contrast, electronic components add an undesired noise contribution, which is inversely proportional to the frequency f. At gigahertz frequencies, the amplitude of this 1/f-noise is considerably reduced. Moreover, measuring at high frequencies has a second advantage. Higher frequencies enable us to measure with a larger bandwidth and consequently to acquire more signal. For these reasons, we started the noise project by building up a microwave measurement scheme. Our main interest lies in noise studies of high-resistance mesoscopic devices, such as quantum dots. However, the combination of high-frequency measurements with impedances on the order of R = 100 kOhm suffers from the large impedance mismatch to the standard characteristic impedance of the measurement line, Z0 = 50 Ohm. According to voltage division, the suppression of detectable signal power on the 50 Ohm side is on the order of (Z_0/R)^2. Hence, there is a solution needed to enhance the transmission from the device to the instrument. This is achieved with impedance matching, for which we use a so-called stub impedance-matching circuit. It is a resonant circuit based on transmission lines. This thesis about noise detection with a stub impedance-matching circuit is structured as follows: It starts in chapter 2 with an introduction to the characteristics of microwave transmission lines, which are the building blocks of the later used microwave circuit. The development of carbon nanotube samples with an integrated stub impedance-matching circuit for noise detection as well as building up the high-frequency measurement setup were important experimental parts of this PhD project. For this reason, it is documented in detail in the thesis. A description of the stub impedance-matching circuit's properties is found in chapter 3. It also mentions impedance matching with an LC circuit and ends with a comparison of the two approaches. All fabrication considerations and recipes are collected in chapter 4. Chapter 5 gives an overview of the measurement setup, which is partially inside a dilution refrigerator. The remaining two chapters are devoted to results from a quantum dot formed in a carbon nanotube. Chapter 6 discusses RF reflectometry in the presence of a stub impedance-matching circuit. It is shown how to extract the circuit parameters and the device impedances from the reflection spectrum. Finally, noise measurements and their analysis are presented in chapter 7. The good agreement of our noise data in the single quantum dot regime with previous studies is a confirmation that the developed methods for noise detection with stub impedance matching and for calibration are well suited and allow for accurate noise results