A CMOS 8×8 SPAD array for Time-of-Flight measurement and light-spot statistics

The design and simulation of a CMOS 8 × 8 single photon avalanche diode (SPAD) array is presented. The chip has been fabricated in a 0.18μm standard CMOS technology and implements a double functionality: measuring the Time-of-Flight with the help of a pulsed light source; or computing focal-plane statistics in biomedical imaging applications based on a concentrated light-spot. The incorporation of on-chip processing simplifies the interfacing of the array with the host system. The pixel pitch is 32μm, while the diameter of the quasi-circular active area of the SPADs is 12μm. The 113μm 2 active area is surrounded by a T-well guard ring. The resulting breakdown voltage is 10V with a maximum excess voltage of 1.8V. The pixel incorporates a novel active quenching/reset circuit. The array has been designed to operate with a laser pulsed at 20Mhz. The overall time resolution is 115ps. Focal-plane statistics are obtained in digital format. The maximum throughput of the digital output buffers is 200Mbps.Ministerio de Economía y Competitividad IPT-2011-1625- 430000, IPC-20111009Office of Naval Research (USA) N00014111031

Design of a smart SiPM based on focal-plane processing elements for improved spatial resolution in PET

Single-photon avalanche diodes are compatible with standard CMOS. It means that photo-multipliers for scintillation detectors in nuclear medicine (i. e. PET, SPECT) can be built in inexpensive technologies. These silicon photo-multipliers consist in arrays of, usually passively-quenched, SPADs whose output current is sensed by some analog readout circuitry. In addition to the implementation of photosensors that are sensitive to singlephoton events, analog, digital and mixed-signal processing circuitry can be included in the same CMOS chip. For instance, the SPAD can be employed as an event detector, and with the help of some in-pixel circuitry, a digitized photo-multiplier can be built in which every single-photon detection event is summed up by a counter. Moreover, this concurrent processing circuitry can be employed to realize low level image processing tasks. They can be efficiently implemented by this architecture given their intrinsic parallelism. Our proposal is to operate onto the light-induced signal at the focal plane in order to obtain a more elaborated record of the detection. For instance, by providing some characterization of the light spot. Information about the depth-of-interaction, in scintillation detectors, can be derived from the position and shape of the scintillation light distribution. This will ultimately have an impact on the spatial resolution that can be achieved. We are presenting the design in CMOS of an array of detector cells. Each cell contains a SPAD, an MOS-based passive quenching circuit and drivers for the column and row detection lines.Junta de Andalucía 2006-TIC-2352Ministerio de Ciencia e Innovación TEC 2009-11812Office of Naval Research (USA) N00014111031

Compact CMOS active quenching/recharge circuit for SPAD arrays

Avalanche diodes operating in Geiger mode are able to detect single photon events. They can be employed to photon counting and time-of-flight estimation. In order to ensure proper operation of these devices, the avalanche current must be rapidly quenched, and, later on, the initial equilibrium must be restored. In this paper, we present an active quenching/recharge circuit specially designed to be integrated in the form of an array of single-photon avalanche diode (SPAD) detectors. Active quenching and recharge provide benefits like an accurately controllable pulse width and afterpulsing reduction. In addition, this circuit yields one of the lowest reported area occupations and power consumptions. The quenching mechanism employed is based on a positive feedback loop that accelerates quenching right after sensing the avalanche current. We have employed a current starved inverter for the regulation of the hold-off time, which is more compact than other reported controllable delay implementations. This circuit has been fabricated in a standard 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology. The SPAD has a quasi-circular shape of 12 μm diameter active area. The fill factor is about 11%. The measured time resolution of the detector is 187 ps. The photon-detection efficiency (PDE) at 540 nm wavelength is about 5% at an excess voltage of 900 mV. The break-down voltage is 10.3 V. A dark count rate of 19 kHz is measured at room temperature. Worst case post-layout simulations show a 117 ps quenching and 280 ps restoring times. The dead time can be accurately tuned from 5 to 500 ns. The pulse-width jitter is below 1.8 ns when dead time is set to 40 ns.Ministerio de Economía y Competitividad TEC2012-38921-C02, IPT-2011-1625-430000, IPC-20111009 CDTIJunta de Andalucía TIC 2338-2013Office of Naval Research (USA) N00014141035

High resolution hold-off time control circuit for Geiger-mode avalanche photodiodes

A high-resolution hold-off time control circuit for Geiger-mode avalanche photodiodes (GM-APDs) that enables linear changes to the hold-off time from several nanoseconds to microseconds is presented. The resolution of the hold-off time can be varied from nanoseconds to tens of nanoseconds with a range up to 1.2 μs to cater for a variety of GM-APDs. This circuit allows setting of the optimal `afterpulse-free' hold-off time for any GM-APD through digital inputs or additional signal processing circuitry. The layout area is 95 μm × 55 μm which makes it suitable for use with APD arrays. The APD is automatically reset following the end of the hold-off period

A geiger-mode APD photon counting system with adjustable dead-time and interchangeable detector

A Geiger-mode avalanche photodiode (GM-APD) photon counting system is presented in this letter. The system provides a maximum counting rate of 35 Mcounts/s and is capable of directly displaying the counting rate and data logging to a PC. In this system, the detector can be easily changed to enhance its usefulness in different applications. A novel active quench and reset integrated circuit (AQR-IC) is designed for the system with adjustable hold-off time from several nanoseconds up to 1.6 μs with a setting resolution of ~6.5 ns. This facilitates optimal performance when using different types of APDs. The AQR-IC also registers each avalanche event as a TTL pulse that is processed by a microcontroller to calculate the photon-counting rate. The microcontroller can be interfaced with a PC over USB to record the measured data and to allow further processing. Software was also written to calculate the photon-counting rate, display the results and save the data to files

Feasibility of Geiger-mode avalanche photodiodes in CMOS standard technologies for tracker detectors

The next generation of particle colliders will be characterized by linear lepton colliders, where the collisions between electrons and positrons will allow to study in great detail the new particle discovered at CERN in 2012 (presumably the Higgs boson). At present time, there are two alternative projects underway, namely the ILC (International Linear Collider) and CLIC (Compact LInear Collider). From the detector point of view, the physics aims at these particle colliders impose such extreme requirements, that there is no sensor technology available in the market that can fulfill all of them. As a result, several new detector systems are being developed in parallel with the accelerator. This thesis presents the development of a GAPD (Geiger-mode Avalanche PhotoDiode) pixel detector aimed mostly at particle tracking at future linear colliders. GAPDs offer outstanding qualities to meet the challenging requirements of ILC and CLIC, such as an extraordinary high sensitivity, virtually infinite gain and ultra-fast response time, apart from compatibility with standard CMOS technologies. In particular, GAPD detectors enable the direct conversion of a single particle event onto a CMOS digital pulse in the sub-nanosecond time scale without the utilization of either preamplifiers or pulse shapers. As a result, GAPDs can be read out after each single bunch crossing, a unique quality that none of its competitors can offer at the moment. In spite of all these advantages, GAPD detectors suffer from two main problems. On the one side, there exist noise phenomena inherent to the sensor, which induce noise pulses that cannot be distinguished from real particle events and also worsen the detector occupancy to unacceptable levels. On the other side, the fill-factor is too low and gives rise to a reduced detection efficiency. Solutions to the two problems commented that are compliant with the severe specifications of the next generation of particle colliders have been thoroughly investigated. The design and characterization of several single pixels and small arrays that incorporate some elements to reduce the intrinsic noise generated by the sensor are presented. The sensors and the readout circuits have been monolithically integrated in a conventional HV-CMOS 0.35 μm process. Concerning the readout circuits, both voltage-mode and current-mode options have been considered. Moreover, the time-gated operation has also been explored as an alternative to reduce the detected sensor noise. The design and thorough characterization of a prototype GAPD array, also monolithically integrated in a conventional 0.35 μm HV-CMOS process, is presented in the thesis as well. The detector consists of 10 rows x 43 columns of pixels, with a total sensitive area of 1 mm x 1 mm. The array is operated in a time-gated mode and read out sequentially by rows. The efficiency of the proposed technique to reduce the detected noise is shown with a wide variety of measurements. Further improved results are obtained with the reduction of the working temperature. Finally, the suitability of the proposed detector array for particle detection is shown with the results of a beam-test campaign conducted at CERN-SPS (European Organization for Nuclear Research-Super Proton Synchrotron). Apart from that, a series of additional approaches to improve the performance of the GAPD technology are proposed. The benefits of integrating a GAPD pixel array in a 3D process in terms of overcoming the fill-factor limitation are examined first. The design of a GAPD detector in the Global Foundries 130 nm/Tezzaron 3D process is also presented. Moreover, the possibility to obtain better results in light detection applications by means of the time-gated operation or correction techniques is analyzed too.Aquesta tesi presenta el desenvolupament d’un detector de píxels de GAPDs (Geiger-mode Avalanche PhotoDiodes) dedicat principalment a rastrejar partícules en futurs col•lisionadors lineals. Els GAPDs ofereixen unes qualitats extraordinàries per satisfer els requisits extremadament exigents d’ILC (International Linear Collider) i CLIC (Compact LInear Collider), els dos projectes per la propera generació de col•lisionadors que s’han proposat fins a dia d’avui. Entre aquestes qualitats es troben una sensibilitat extremadament elevada, un guany virtualment infinit i una resposta molt ràpida, a part de ser compatibles amb les tecnologies CMOS estàndard. En concret, els detectors de GAPDs fan possible la conversió directa d’un esdeveniment generat per una sola partícula en un senyal CMOS digital amb un temps inferior al nanosegon. Com a resultat d’aquest fet, els GAPDs poden ser llegits després de cada bunch crossing (la col•lisió de les partícules), una qualitat única que cap dels seus competidors pot oferir en el moment actual. Malgrat tots aquests avantatges, els detectors de GAPDs pateixen dos grans problemes. D’una banda, existeixen fenòmens de soroll inherents al sensor, els quals indueixen polsos de soroll que no poden ser distingits dels esdeveniments reals generats per partícules i que a més empitjoren l’ocupació del detector a nivells inacceptables. D’altra banda, el fill-factor (és a dir, l’àrea sensible respecte l’àrea total) és molt baix i redueix l’eficiència detectora. En aquesta tesi s’han investigat solucions als dos problemes comentats i que a més compleixen amb les especificacions altament severes dels futurs col•lisionadors lineals. El detector de píxels de GAPDs, el qual ha estat monolíticament integrat en un procés HV-CMOS estàndard de 0.35 μm, incorpora circuits de lectura en mode voltatge que permeten operar el sensor en l’anomenat mode time-gated per tal de reduir el soroll detectat. L’eficiència de la tècnica proposada queda demostrada amb la gran varietat d’experiments que s’han dut a terme. Els resultats del beam-test dut a terme al CERN indiquen la capacitat del detector de píxels de GAPDs per detectar partícules altament energètiques. A banda d’això, també s’han estudiat els beneficis d’integrar un detector de píxels de GAPDs en un procés 3D per tal d’incrementar el fill-factor. L’anàlisi realitzat conclou que es poden assolir fill-factors superiors al 90%

Conception d'un circuit d'étouffement de photodiodes avalanches monophotoniques pour une intégration matricielle dans un module de comptage monophotonique

De nombreuses applications en sciences nucléaires bénéficieraient d’un détecteur possédant une précision temporelle de 10 ps largeur à mi-hauteur à la mesure d’un photon unique. Par exemple, le projet de Time-Imaging Calorimeter en cours de conception au CERN requiert un détecteur possédant une telle précision temporelle afin de mesurer le temps de vol (TDV) et la trajectoire des particules émises lors des collisions dans les expériences du Large Hadron Collider (LHC), ce qui permet d’identifier ces dites particules. De plus, un détecteur possédant une précision temporelle de l’ordre de 10 ps permettra la mitigation de l’empilement des événements. Un second exemple est la tomographie d’émission par positrons (TEP), une modalité d’imagerie médicale non-invasive qui mesure la distribution d’un traceur radioactif afin d’étudier et détecter le cancer. Dans le but de développer un scanner TEP temps réel, le groupe de recherche en appareillage médical de Sherbrooke (GRAMS) travaille sur l’intégration de la mesure du TDV de l’interaction TEP. Les meilleures performances actuelles des détecteurs TEP se situent aux alentours de 150 ps, ce qui n’est pas suffisant pour intégrer le TDV dans un scanner TEP préclinique. Cette mesure exige une résolution temporelle TEP de l’ordre de 10 ps. La solution proposée par le GRAMS est de développer un module de comptage monophotonique (MCMP) 3D qui est composé d’une matrice de photodiodes avalanches monophotoniques (PAMP) reliée par des interconnexions verticales (TSV) à une matrice de circuits de lecture composée d’un circuit d’étouffement et d’un convertisseur temps-numérique. Ce détecteur permet donc de mesurer précisément le temps d’arrivée de chaque photon détecté. Ce document présente la conception du circuit d’étouffement réalisé en technologie CMOS 65 nm de TSMC (Taiwan Semiconductor Manufacturing Company) intégré à chaque pixel de 50 × 50 µm2 dans un MCMP 3D. Afin de répondre au besoin de précision temporelle de 10 ps dans un détecteur 3D, le circuit proposé est un circuit d’étouffement passif avec une recharge active possédant un amplificateur opérationnel en boucle ouverte à titre de comparateur de tension. L’amplificateur opérationnel utilisé possède un seuil ajustable de 0 à 2,5 V afin d’être en mesure d’évaluer le seuil optimal pour la mesure de gigue temporelle avec une PAMP. La taille finale du circuit d’étouffement est de 18 × 30 µm2 incluant l’amplificateur qui est d’une taille de 13 × 8 µm2, ce qui représente respectivement environ 22% et 4% de la taille totale du pixel. Le circuit d’étouffement possède une gigue temporelle de 4 ps largeur à mi-hauteur (LMH). Les résultats obtenus prouvent qu’il est possible d’intégrer de l’électronique de lecture de PAMP dans un MCMP 3D possédant des performances temporelles sous les 10 ps

Conception d'un circuit d'étouffement pour photodiodes à avalanche en mode Geiger pour intégration hétérogène 3D

Le Groupe de Recherche en Appareillage Médical de Sherbrooke (GRAMS) travaille actuellement sur un programme de recherche portant sur des photodiodes à avalanche monophotoniques (PAMP) opérées en mode Geiger en vue d'une application à la tomographie d’émission par positrons (TEP). Pour opérer dans ce mode, la PAMP, ou SPAD selon l’acronyme anglais (Single Photon Avalanche Diode), requiert un circuit d'étouffement (CE) pour, d’une part, arrêter l’avalanche pouvant causer sa destruction et, d’autre part, la réinitialiser en mode d’attente d’un nouveau photon. Le rôle de ce CE comprend également une électronique de communication vers les étages de traitement avancé de signaux. La performance temporelle optimale du CE est réalisée lorsqu’il est juxtaposé à la PAMP. Cependant, cela entraîne une réduction de la surface photosensible ; un élément crucial en imagerie. L’intégration 3D, à base d'interconnexions verticales, offr une solution élégante et performante à cette problématique par l’empilement de circuits intégrés possédant différentes fonctions (PAMP, CE et traitement avancé de signaux). Dans l’approche proposée, des circuits d’étouffement de 50 [mu]m x 50 [mu]m réalisés sur une technologie CMOS 130 nm 3D Tezzaron, contenant chacun 112 transistors, sont matricés afin de correspondre à une matrice de PAMP localisée sur une couche électronique supérieure. Chaque circuit d'étouffement possède une gigue temporelle de 7,47 ps RMS selon des simulations faites avec le logiciel Cadence. Le CE a la flexibilité d'ajuster les temps d'étouffement et de recharge pour la PAMP tout en présentant une faible consommation de puissance ( ~ 0,33 mW à 33 Mcps). La conception du PAMP nécessite de supporter des tensions supérieures aux 3,3 V de la technologie. Pour répondre à ce problème, des transistors à drain étendu (DEMOS) ont été réalisés. En raison de retards de production par les fabricants, les circuits n’ont pu être testés physiquement par des mesures. Les résultats de ce mémoire sont par conséquent basés sur des résultats de simulations avec le logiciel Cadence

Parallel reconfigurable single photon avalanche diode array for optical communications

There is a pressing need to develop alternative communications links due to a number of physical phenomena, limiting the bandwidth and energy efficiency of wire-based systems or economic factors such as cost, material-supply reliability and environmental costs. Networks have moved to optical connections to reduce costs, energy use and to supply high data rates. A primary concern is that current optical-detection devices require high optical power to achieve fast data rates with high signal quality. The energy required therefore, quickly becomes a problem. In this thesis, advances in single-photon avalanche diodes (SPADs) are utilised to reduce the amount of light needed and to reduce the overall energy budget. Current high performance receivers often use exotic materials, many of which have severe environmental impact and have cost, supply and political restrictions. These present a problem when it comes to integration; hence silicon technology is used, allowing small, mass-producible, low power receivers. A reconfigurable SPAD-based integrating receiver in standard 130nm imaging CMOS is presented for links with a readout bandwidth of 100MHz. A maximum count rate of 58G photon/s is observed, with a dynamic range of ≈ 79dB, a sensitivity of ≈ −31.7dBm at 100MHz and a BER of ≈ 1x10−9. We investigate the properties of the receiver for optical communications in the visible spectrum, using its added functionality and reconfigurability to experimentally explore non-ideal influences. The all-digital 32x32 SPAD array, achieves a minimum dead time of 5.9ns, and a median dark count rate (DCR) of 2.5kHz per SPAD. High noise devices can be weighted or removed to optimise the SNR. The power requirements, transient response and received data are explored and limiting factors similar to those of photodiode receivers are observed. The thesis concludes that data can be captured well with such a device but more electrical energy is needed at the receiver due to its fundamental operation. Overall, optical power can be reduced, allowing significant savings in either transmitter power or the transmission length, along with the advantages of an integrated digital chip