115 research outputs found

    Modeling and Simulation Methodologies for Digital Twin in Industry 4.0

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    The concept of Industry 4.0 represents an innovative vision of what will be the factory of the future. The principles of this new paradigm are based on interoperability and data exchange between dierent industrial equipment. In this context, Cyber- Physical Systems (CPSs) cover one of the main roles in this revolution. The combination of models and the integration of real data coming from the field allows to obtain the virtual copy of the real plant, also called Digital Twin. The entire factory can be seen as a set of CPSs and the resulting system is also called Cyber-Physical Production System (CPPS). This CPPS represents the Digital Twin of the factory with which it would be possible analyze the real factory. The interoperability between the real industrial equipment and the Digital Twin allows to make predictions concerning the quality of the products. More in details, these analyses are related to the variability of production quality, prediction of the maintenance cycle, the accurate estimation of energy consumption and other extra-functional properties of the system. Several tools [2] allow to model a production line, considering dierent aspects of the factory (i.e. geometrical properties, the information flows etc.) However, these simulators do not provide natively any solution for the design integration of CPSs, making impossible to have precise analysis concerning the real factory. Furthermore, for the best of our knowledge, there are no solution regarding a clear integration of data coming from real equipment into CPS models that composes the entire production line. In this context, the goal of this thesis aims to define an unified methodology to design and simulate the Digital Twin of a plant, integrating data coming from real equipment. In detail, the presented methodologies focus mainly on: integration of heterogeneous models in production line simulators; Integration of heterogeneous models with ad-hoc simulation strategies; Multi-level simulation approach of CPS and integration of real data coming from sensors into models. All the presented contributions produce an environment that allows to perform simulation of the plant based not only on synthetic data, but also on real data coming from equipments

    Application of object-orientation to HDL-based designs

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    The increase in the scale of VLSI circuits over the last two decades has been of great importance to the development process. To cope with this ever­growing design complexity. new development techniques and methodologies have been researched and applied. The early 90's have witnessed the uptake of a new kind of design methodology based on Hardware Description Languages (HDL). This methodology has helped to master the possibilities inherent in our ability to manufacture ever-larger designs. However. while HDL based design methodology is sufficient to address today's standard ASIC sizes, it reaches its limits when considering tomorrow's design scales. Already. RISC processor chip descriptions can contain tens of thousands of HDLlines. Object-Oriented design methodology has recently had a considerable Impact in the software design community as it is tightly coupled with the handling of complex systems. Object-Orientation concentrates on data rather than functions since. throughout the design process. data are more stable than functions. Methodologies for both hardware and software have been introduced through the application of HDLs to hardware design. Common design constructs and principles that have proved successful in software language development should therefore be considered in order to assess their suitability for HDLs based designs. A new methodology was created to emphasise on encapsulation. abstraction and classification of designs. using standard VHDL constructs. This achieves higher levels of modelling along with an Improved reusability through design inheritance. The development of extended semantics for integrating Object-Orientation in the VHDL language is described. Comparisons are made between the modelling abilities of the proposed extension and other competing proposals. A UNIX based Object-Oriented to standard VHDL pre-processor is described along with translation techniques and their issues related to synthesis and simulation. This tool permitted validation of the new design methodology by application to existing design problems

    "Going back to our roots": second generation biocomputing

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    Researchers in the field of biocomputing have, for many years, successfully "harvested and exploited" the natural world for inspiration in developing systems that are robust, adaptable and capable of generating novel and even "creative" solutions to human-defined problems. However, in this position paper we argue that the time has now come for a reassessment of how we exploit biology to generate new computational systems. Previous solutions (the "first generation" of biocomputing techniques), whilst reasonably effective, are crude analogues of actual biological systems. We believe that a new, inherently inter-disciplinary approach is needed for the development of the emerging "second generation" of bio-inspired methods. This new modus operandi will require much closer interaction between the engineering and life sciences communities, as well as a bidirectional flow of concepts, applications and expertise. We support our argument by examining, in this new light, three existing areas of biocomputing (genetic programming, artificial immune systems and evolvable hardware), as well as an emerging area (natural genetic engineering) which may provide useful pointers as to the way forward.Comment: Submitted to the International Journal of Unconventional Computin

    Computer Architectures to Close the Loop in Real-time Optimization

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    © 2015 IEEE.Many modern control, automation, signal processing and machine learning applications rely on solving a sequence of optimization problems, which are updated with measurements of a real system that evolves in time. The solutions of each of these optimization problems are then used to make decisions, which may be followed by changing some parameters of the physical system, thereby resulting in a feedback loop between the computing and the physical system. Real-time optimization is not the same as fast optimization, due to the fact that the computation is affected by an uncertain system that evolves in time. The suitability of a design should therefore not be judged from the optimality of a single optimization problem, but based on the evolution of the entire cyber-physical system. The algorithms and hardware used for solving a single optimization problem in the office might therefore be far from ideal when solving a sequence of real-time optimization problems. Instead of there being a single, optimal design, one has to trade-off a number of objectives, including performance, robustness, energy usage, size and cost. We therefore provide here a tutorial introduction to some of the questions and implementation issues that arise in real-time optimization applications. We will concentrate on some of the decisions that have to be made when designing the computing architecture and algorithm and argue that the choice of one informs the other

    Framework for media oriented transport systems

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    Dissertação de mestrado integrado em Engenharia Electrónica Industrial e ComputadoresThe natural evolution of embedded systems resulted in a faster execution of tasks, increased possibility for including additional features, allied to lower power consumption and benefiting from ever-growing rates of integration as far as silicon is concerned. The automotive industry is not an exception with regards to the integration of technology for a vast arrays of applications in systems which vary from entertainment of infotainment to systems related to vehicle safety and stability such as driver assists. The existence of diverse independent systems in modern cars, combined with the necessity of centralizing the user interface, simplifying the operation of the system and minimizing the user’s intervention, help to promote the comfort and reduce the likelihood of distractions taking place while driving. Modern communication oriented network standards, e.g. MOST or FlexRay, enable information compatibility when exchanged between systems communicating over different protocols. Moreover, the coexistence of packet, control and timesensitive information are ensured within timing requirements, providing a reliable QoS (Quality of Service) and by making use of a single physical transmission mean. Synchronized multimedia data (e.g. synchronized video and audio transmission) are example of this kind of (time-sensitive) information. This dissertation proposes a framework for design and development of network distributed applications in the field of automotive infotainment, compliant with the industry standards and using FPGA technology in order to ensure the system requirements satisfaction and promote IP Core re-utilization.A evolução natural dos sistemas embebidos traduziu-se numa maior rapidez na execução de tarefas, a possibilidade de incluir mais funcionalidades, aliado a menores consumos energéticos e beneficiando de crescentes e elevadas taxas de integração ao nível de silício. A indústria automóvel não é excepção no que diz respeito à integração de tecnologia para as mais variadas aplicações, com ou sem tolerância à falha, em sistemas que vão desde entretenimento ou infotainment a sistemas relacionados com a estabilidade e segurança do veículo, como é exemplo as driver assists. Existem de vários sistemas independentes nos modernos veículos automóveis. Estes, combinados com a necessidade de centralização ao nível de interface com o utilizador, tornam imperativa a simplicidade da operação. Para tal, requerem a minimizaccão da intervenção do utilizador, promovendo o conforto e diminuindo a probabilidade de desconcentração durante o exercício de condução. Os mais modernos standards de redes de comunicação como é exemplo o MOST ou o FlexRay, permitem a compatibilidade de informação trocada entre sistemas que comunicam através de distintos protocolos de comunicação. Para além disso, ainda garantem a coexistência de informação de controlo, informação do entretenimento e informação do tipo time-sensitive, onde os requisitos de temporização devem ser assegurados, mantendo uma qualidade de serviço fiàvel e fazendo uso de um único meio físico de transmissão. São exemplos deste tipo de informação, dados síncronos do tipo multimédia (e.g. streaming de àudio e vídeo de forma sincronizada). Pretende-se desenvolver uma framework para desenvolvimento de aplicações de rede distribuídas, do tipo infotainment e que beneficia a aplicação de tecnologias como FPGA, no offloading de computação para este dispositivo, como meio de garantir a satisfação dos requisitos, e promover a reutilização deste tipo de sistemas, mantendo o elevado desempenho na troca de dados e promovendo a portabilidade e a modularidade

    Specification-driven design of custom hardware in HOP

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    technical reportWe present a language "Hardware viewed as Objects and Processes" (HOP) for specifying the structure, behavior, and timing of hardware systems. HOP embodies a simple process model for lock-step synchronous processes. Processes may be described both as a black-box and as a collection of interacting sub-processes. The latter can be statically simplified using an algorithm 'PARCOMP'. PARCOMP symbolically simulates a collection of interacting processes. The advantages claimed for HOP include simple semantics, intuitiveness, high expressive power, and numerous provisions to support easily verifiable designs all the way to VLSI layout. After introducing HOP, and presenting some of the results obtained from experimenting with the HOP design system, we present the design of a large hardware system (the "Utah Simulation Engine") currently being developed to speed-up distributed discrete event simulation using Time Warp. Issues in the specification driven design of this system are discussed and illustrated using HOP
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