Nanoscale content-addressable memory

A combined content addressable memory device and memory interface is provided. The combined device and interface includes one or more one molecular wire crossbar memories having spaced-apart key nanowires, spaced-apart value nanowires adjacent to the key nanowires, and configurable switches between the key nanowires and the value nanowires. The combination further includes a key microwire-nanowire grid (key MNG) electrically connected to the spaced-apart key nanowires, and a value microwire-nanowire grid (value MNG) electrically connected to the spaced-apart value nanowires. A key or value MNGs selects multiple nanowires for a given key or value

Economic evaluation of bio-based supply chains with CO2 capture and utilisation

Carbon capture and storage (CCS) and carbon capture and utilisation (CCU) are acknowledged as important R&D priorities to achieve environmental goals set for next decades. This work studies biomass-based energy supply chains with CO2 capture and utilisation. The problem is formulated as a mixed-integer linear program. This study presents a flexible supply chain superstructure to answer issues on economic and environmental benefits achievable by integrating biomass-coal plants, CO2 capture and utilisation plants; i.e. location of intermediate steps, fraction of CO2 emissions captured per plant, CO2 utilisation plants' size, among others. Moreover, eventual incentives and environmental revenues will be discussed to make an economically feasible project. A large-size case study located in Spain will be presented to highlight the proposed approach. Two key scenarios are envisaged: (i) Biomass, capture or utilisation of CO2 are not contemplated; (ii) Biomass, capture and CO2 utilisation are all considered. Finally, concluding remarks are drawn.Peer ReviewedPostprint (author's final draft

Time-Optimal and Conflict-Free Mappings of Uniform Dependence Algorithms into Lower Dimensional Processor Arrays

Most existing methods of mapping algorithms into processor arrays are restricted to the case where n-dimensional algorithms or algorithms with n nested loops are mapped into (n—l)-dimensional arrays. However, in practice, it is interesting to map n-dimensional algorithms into (k —l)-dimensional arrays where k\u3c.n. For example, many algorithms at bit-level are at least 4-dimensional (matrix multiplication, convolution, LU decomposition, etc.) and most existing bit level processor arrays are 2-dimensional. A computational conflict occurs if two or more computations of an algorithm are mapped into the same processor and the same execution time. In this paper, necessary and sufficient conditions are derived to identify all mappings without computational conflicts, based on the Hermite normal form of the mapping matrix. These conditions are used to propose methods of mapping any n-dimensional algorithm into (k— l)-dimensional arrays, kn—3, optimality of the mapping is guaranteed

Partitioning of Uniform Dependency Algorithms for Parallel Execution on MIMD/ Systolic Systems

An algorithm can be modeled as an index set and a set of dependence vectors. Each index vector in the index set indexes a computation of the algorithm. If the execution of a computation depends on the execution of another computation, then this dependency is represented as the difference between the index vectors of the computations. The dependence matrix corresponds to a matrix where each column is a dependence vector. An independent partition of the index set is such that there are no dependencies between computations that belong to different blocks of the partition. This report considers uniform dependence algorithms with any arbitrary kind of index set and proposes two very simple methods to find independent partitions of the index set. Each method has advantages over the other one for certain kind of application, and they both outperform previously proposed approaches in terms of computational complexity and/or optimality. Also, lower bounds and upper bounds of the cardinality of the maximal independent partitions are given. For some algorithms it is shown that the cardinality of the maximal partition is equal to the greatest common divisor of some subdeterminants of the dependence matrix. In an MIMD/multiple systolic array computation environment, if different blocks of ail independent partition are assigned to different processors/arrays, the communications between processors/arrays will be minimized to zero. This is significant because the communications usually dominate the overhead in MIMD machines. Some issues of mapping partitioned algorithms into MIMD/systolic systems are addressed. Based on the theory of partitioning, a new method is proposed to test if a system of linear Diophantine equations has integer solutions

Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor Arrays

Recent advances in VLSI/WSI technology have led to the design of processor arrays with a large number of processing elements confined in small areas. The use of redundancy to increase fault-tolerance has the effect of reducing the ratio of area dedicated to processing elements over the area occupied by other resources in the array. The assumption of fault-free hardware support (switches, buses, interconnection links, etc.,), leads at best to conservative reliability estimates. However, detailed modeling entails not only an explosive growth in the model state space but also a difficult model construction process. To address the latter problem, a systematic method to construct Markov models for the reliability evaluation of processor arrays is proposed. This method is based on the premise that the fault behavior of a processor array can be modeled by a Stochastic Petri Net (SPN). However, in order to obtain a more compact representation, a set of attributes is associated with each transition in the Petri net model. This representation is referred to as a Modified Stochastic Petri Net (MSPN) model. A MSPN allows the construction of the corresponding Markov model as the reachability graph is being generated. The Markov model generated can include the effect of failures of several different components of the array as well as the effect of a peculiar distribution of faults when the reconfiguration occurs. Specific reconfiguration schemes such as Successive Row Elimination (SRE), Alternate Row-Column Elimination (ARCE) and Direct Reconfiguration (DR), are analyze

COSMIC: A Model for Multiprocessor Performance Analysis

COSMIC, the Combined Ordering Scheme Model with Isolated Components, describes the execution of specific algorithms on multiprocessors and facilitates analysis of their performance. Building upon previous modeling efforts such as Petri nets, COSMIC structures the modeling of a system along several issues including computational and overhead costs due to sequencing of operations, synchronization between operations, and contention for limited resources. This structuring allows us to isolate the performance impact associated with each issue. Finally, studying the performance of a system while executing a specific algorithm gives insight into its performance under realistic operating conditions. The model also allows us to study realistically sized algorithms with ease, especially when they are regularly structured. During the analysis of a system modeled by COSMIC, a set timed Petri nets is produced. These Petri nets are then analyzed to determine measures of the systems performance. To facilitate the specification, manipulation, and analysis of large timed Petri nets, a set of tools has been developed. These tools take advantage of several special properties of the timed Petri nets that greatly reduce the computational resources required to calculate the required measures. From this analysis, performance measures show not only total performance, but also present a breakdown of these results into several specific categories

Destination Tag Routing Techniques Based on a State Model for the IADM Network

A state model is proposed for solving the problem of routing and rerouting messages in the Inverse Augmented Data Manipulator (IADM) network. Using this model, necessary and sufficient conditions for the reroutability of messages are established, and then destination tag schemes are derived. These schemes are simpler, more efficient and require less complex hardware than previously proposed routing schemes. Two destination tag schemes are proposed. For one of the schemes, rerouting is totally transparent to the sender of the message and any blocked link of a given type can be avoided. Compared with previous works that deal with the same type of blockage, the timeXspace complexity is reduced from O(logN) to O(1). For the other scheme, rerouting is possible for any type of link blockage. A universal rerouting algorithm is constructed based on the second scheme, which finds a blockage-free path for any combination of multiple blockages if there exists such a path, and indicates absence of such a path if there exists none. In addition, the state model is used to derive constructively a lower bound on the number of subgraphs which are isomorphic to the Indirect Binary N-Cube network in the IADM network. This knowledge can be used to characterize properties of the IADM networks and for permutation routing in the IADM networks

Neuroprotective efect of indomethacin in normal perfusion pressure breakthrough phenomenon

Loss of cerebral autoregulation in normal perfusion pressure breakthrough (NPPB) phenomenon has been reported in other Central Nervous System diseases such as neonatal intraventricular haemorrhage. Several studies have demonstrated that low-dose indomethacin prevents this latter condition. A previous rat model was used to resemble NPPB phenomenon. Study animals were distributed in 4 groups that received 3 doses of indomethacin at different concentrations prior to fistula occlusion 60 days after its creation. Control animals received saline solution. Intracranial pressure (ICP) increased in all groups following fistula creation, whereas mean arterial pressure (MAP) and cerebral perfusion pressure (CPP) decreased as a manifestation of cerebral hypoperfusion and intracranial hypertension. The administration of indomethacin was associated with raised MAP and CPP, as well as decreased ICP. Sodium fluorescein extravasation was slight in study animals when comparing with control ones. Histological analysis evidenced diffuse ischaemic changes with signs of neuronal apoptosis in all brain layers in control animals. These findings were only focal and slight in study animals. The results suggest the usefulness of indomethacin to revert, at least partially, the haemodynamic effects of NPPB phenomenon in this experimental model, as well as to reduce BBB disruption and histological ischemia observed in absence of indomethacinThis study has been supported by the Spanish Ministries of Economy and Competitiveness in collaboration with the European Regional Development Fund (FEDER) under Grant FIS PI 12/0290

Cyber-Workstation for Computational Neuroscience

A Cyber-Workstation (CW) to study in vivo, real-time interactions between computational models and large-scale brain subsystems during behavioral experiments has been designed and implemented. The design philosophy seeks to directly link the in vivo neurophysiology laboratory with scalable computing resources to enable more sophisticated computational neuroscience investigation. The architecture designed here allows scientists to develop new models and integrate them with existing models (e.g. recursive least-squares regressor) by specifying appropriate connections in a block-diagram. Then, adaptive middleware transparently implements these user specifications using the full power of remote grid-computing hardware. In effect, the middleware deploys an on-demand and flexible neuroscience research test-bed to provide the neurophysiology laboratory extensive computational power from an outside source. The CW consolidates distributed software and hardware resources to support time-critical and/or resource-demanding computing during data collection from behaving animals. This power and flexibility is important as experimental and theoretical neuroscience evolves based on insights gained from data-intensive experiments, new technologies and engineering methodologies. This paper describes briefly the computational infrastructure and its most relevant components. Each component is discussed within a systematic process of setting up an in vivo, neuroscience experiment. Furthermore, a co-adaptive brain machine interface is implemented on the CW to illustrate how this integrated computational and experimental platform can be used to study systems neurophysiology and learning in a behavior task. We believe this implementation is also the first remote execution and adaptation of a brain-machine interface

Tinea nigra palmaris : a clinical case in a rural Ethiopian hospital

Tinea nigra is an infrequent, superficial fungal infection, mainly caused by Hortaea werneckii, which is still underreported in Ethiopia. An asymptomatic 62-year-old male patient sought a rural hospital of Ethiopia, showing dark plaques on the palms of both hands. A superficial mycosis was suspected and a direct light microscopic mycological examination from skin scrapings revealed short brownish hyphae. To our knowledge, this is the first case of tinea nigra from the Ethiopian highlands. This may be due to the actual rarity of the condition or to underreporting.Peer reviewe