26 research outputs found
Symptomatic and Asymptomatic Neurological Complications of Infective Endocarditis: Impact on Surgical Management and Prognosis
International audienceObjectives:Symptomatic neurological complications (NC) are a major cause of mortality in infective endocarditis (IE) but the impact of asymptomatic complications is unknown. We aimed to assess the impact of asymptomatic NC (AsNC) on the management and prognosis of IE.Methods: From the database of cases collected for a population-based study on IE, we selected 283 patients with definite left-sided IE who had undergone at least one neuroimaging procedure (cerebral CT scan and/or MRI) performed as part of initial evaluation.Results Among those 283 patients, 100 had symptomatic neurological complications (SNC) prior to the investigation, 35 had an asymptomatic neurological complications (AsNC), and 148 had a normal cerebral imaging (NoNC). The rate of valve surgery was 43% in the 100 patients with SNC, 77% in the 35 with AsNC, and 54% in the 148 with NoNC (p<0.001). In-hospital mortality was 42% in patients with SNC, 8.6% in patients with AsNC, and 16.9% in patients with NoNC (p<0.001). Among the 135 patients with NC, 95 had an indication for valve surgery (71%), which was performed in 70 of them (mortality 20%) and not performed in 25 (mortality 68%). In a multivariate adjusted analysis of the 135 patients with NC, age, renal failure, septic shock, and IE caused by S. aureus were independently associated with in-hospital and 1-year mortality. In addition SNC was an independent predictor of 1-year mortality.Conclusions The presence of NC was associated with a poorer prognosis when symptomatic. Patients with AsNC had the highest rate of valve surgery and the lowest mortality rate, which suggests a protective role of surgery guided by systematic neuroimaging results
Erratum to: 36th International Symposium on Intensive Care and Emergency Medicine
[This corrects the article DOI: 10.1186/s13054-016-1208-6.]
CONTRIBUTION A L'ETUDE DES REACTIONS INTERFACIALES ET DES CONTRAINTES MECANIQUES DANS LES COUCHES MINCES ALUMINIUM-TITANE
GRENOBLE1-BU Sciences (384212103) / SudocSudocFranceF
Hot-Carrier Damage in N-Channel EDMOS Used in Single Photon Avalanche Diode Cell through Quasi-Static Modeling
A single photon avalanche diode (SPAD) cell using N-channel extended-drain metal oxide semiconductor (N-EDMOS) is tested for its hot-carrier damage (HCD) resistance. The stressing gate-voltage (VGS) dependence is compared to hot-hole (HH) injection, positive bias temperature (PBT) instability and off-mode (VGS = 0). The goal was to check an accurate device lifetime extraction using accelerated DC to AC stressing by applying the quasi-static (QS) lifetime technique. N-EDMOS device is devoted to 3D bonding with CMOS imagers obtained by an optimized process with an effective gate-length Leff = 0.25 µm and a SiO2 gate-oxide thickness Tox = 5 nm. The operating frequency is 10 MHz at maximum supply voltage VDDmax = 5.5 V. TCAD simulations are used to determine the real voltage and timing configurations for the device in a mixed structure of the SPAD cell. AC device lifetime is obtained using worst-case DC accelerating degradation, which is transferred by QS technique to the AC waveforms applied to N-EDMOS device. This allows us to accurately obtain the AC device lifetime as a function of the delay and load for a fixed pulse shape. It shows the predominance of the high energy hot-carriers involved in the first substrate current peak during transients
A New Direct Measurement Method of Time Dependent Dielectric Breakdown at High Frequency
International audienc
Performance vs. Reliability Adaptive Body Bias Scheme in 28nm & 14nm UTBB FDSOI nodes
International audienc
New Modelling Off-state TDDB for 130nm to 28nm CMOS nodes
International audienceWe present a detailed analysis of Off-state Time Dependent Dielectric Breakdown (TDDB) under non-uniform field performed in MOSFET devices from 28nm FDSOI, 65nm SOI to 130nm nodes. Oxide breakdown in thin gate oxide is characterized under DC stress with different gate-length LG and as function of drain voltage VDS and temperature. We show that the leakage current is a better monitor for TDDB dependence under Off-mode stress whereas a new modeling is proposed. It is found that Weibull slopes β are higher in PFET due large amount of injected hot electrons than in NFET when hot holes are involved
Hot-Carrier induced Breakdown events from Off to On mode in NEDMOS
International audienceExtended Drain MOS (EDMOS) transistors were studied about hot-carrier (HC) degradation and its involvement in hard breakdown (BD) events as these smart power devices represent a big challenge to optimize under Off/On mode switching in RF circuits. N-channel devices with gate-length LG=0.5µm and two gate-oxide thicknesses were tested Tox= 2.3nm (GO1) and 8.5nm (GO2). The sensitivity to BD between Off-mode and HC is pointed out in GO1 through the hot-hole injections (HHI) that are involved as a function of gate-voltage VGS = VTH and VGmax where the VTH case induces HC damage that can be used with series resistance increase (RSD ) to detect BD events in the drift region. Hole trapping and interface traps are generated leading to the dominant effect of HHI, with very close generation rates between Off- and On- mode stressing. This can be used to prevent circuit aging giving warning level for confidence in AC lifetime for power amplifiers class E and class A
Identification of stress factors and degradation mechanisms inducing DCR drift in SPADs
International audienc