Metal-insulator-semiconductor (MIS) structures have been investigated theirs good applications in electronic and optoelectronic. Their importance attributes that they have storage layer property, capacitance effect and high dielectric constant. For this reason, two samples of Si3N4 layers were deposited with plasma-enhanced chemical vapor deposition (PECVD) technique on p-type Si; first is about 5 nm thickness and the other is about 50 nm. The thicknesses of Si3N4 were adjusted by an ellipsometer. It was studied the thickness effect of Si3N4 layers on the Al/Si3N4/p type Si contact and acquired the capacitance-voltage (C–V) and conductance–voltage (G−V) characteristics of the structures in the frequency and applied bias voltage ranges of 10 kHz to 1 MHz and −5 V to +5 V, respectively, at room temperature. Changing of Si3N4 layer thickness could be seen that influenced characterizations of the contacts. In each contact having different insulator layers, capacitance values decreased and conductance values increased with increasing frequencies. The interface states (Nss), the effect of series resistance (Rs), barrier height (Φb) and carrier concentration (Na) were found from characterizations and explained. It was also measured and compared C–V and G−V characterizations dual measurement at 500 kHz in the room temperature for 5 nm and 50 nm thicknesses layers. It could be seen that they have similarly memristor structure and can be used and improved for memory devices.

The ZnO layer onto n-Si has been formed by atomic layer deposition technique. A final film thickness of 10 nm has been obtained by the resulting ZnO film growth rate of about 1.45 Å per cycle. The crystal structures of the ZnO layer were acquired by X-ray diffractometer (XRD) and it could be seen ZnO peaks from XRD patterns. The surface of ZnO thin film onto the n-Si could be seen with Atomic Force Microscopy (AFM) images and it were obtained homogenous and smooth surface. The I-V measurements were performed -2V to +2 V under dark and light, C-V measurements were performed changing 10 kHz to 2 MHz frequency and -2 V to +2 V bias voltage at room temperature. The device has the saturation current value of 8.99 × 10-9 A. The values of ideality factor (n ) and the barrier height (?b) have been found to be 2.49 and 0.77 eV by using the thermionic emission theory, respectively. In addition, the barrier height ?b and the series resistance (Rs) have been also acquired from Cheung's functions. The photovoltaic parameters of device; short circuit current (Isc), open circuit voltage (Voc), fill factor (FF) and conversion efficiency (?) were taken as 342 mV, 34.7 µA, 32% and 0.48% under 100 mW/cm2 light intensity, respectively. The C–V and G–V plots of device almost have peaks in all frequencies except for 2 MHz frequency. The device also behaved like memristor at 500 kHz dual C–V measurements under dark and light but has not wide memory window. It has been concluded that the device can be used as photodiode at room temperature because of small saturation current and good rectifying behavior and it may be improved photovoltaic, capacitor and memristor properties of Au/ZnO/n-Si device in the future

COMPARISON OFTHE Ti/n-GaAs SCHOTTKY CONTACTS' PARAMETERS FABRICATED USING DC MAGNETRON SPUTTERING AND THERMAL EVAPORATION

WOS: 000402864700007We have fabricated the Ti/n-type GaAs Schottky diodes (SDs) by the DC magnetron deposition and thermal evaporation, cut from the same GaAs substrates, and we have made a comparative study of the current-voltage (I-V) measurements of both SDs in the measurement temperature range of 160-300K with steps of 10 K. The barrier height (BH) values of about 0.82 and 0.76 eV at 300K have been obtained for the sputtered and evaporated SDs, respectively. It has been seen that the apparent BH value for the diodes has decreased with decreasing temperature obeying the single-Gaussian distribution (GD) for the evaporated diode and the double-GD for the sputtered diode over the whole measurement temperature range. The increment in BH and observed discrepancies in the sputtered diode have been attributed to the reduction in the native oxide layer present on the substrate surface by the high energy of the sputtered atoms and to sputtering-induced defects present in the near-surface region. We conclude that the thermal evaporation technique yields better quality Schottky contacts for use in electronic devices compared to the DC magnetron deposition technique.Scientific Research Projects Unit of Erciyes UniversityErciyes University [EUBAP-FBY-11-3501]This work was supported by the Scientific Research Projects Unit of Erciyes University, Project No. EUBAP-FBY-11-3501. The authors would like to thank Erciyes University

Temperature-dependent C-V characteristics of Au/ZnO/n-Si device obtained by atomic layer deposition technique

Since the importance of Schottkky devices, Au/ZnO/n-Si device were obtained, and the capacitance–voltage (C-V) and conductance-voltage (G-V) characteristics of Au/ZnO/n-Si device were studied using admittance spectroscopy at changing temperature from 160 to 340 K with 20 K intervals and -1 to +2 V bias voltage range. The interface thin film ZnO layer was deposited on the n-type Si wafer by atomic layer deposition technique (ALD) in order to obtain homogenous interface layer. The layer thickness of ZnO was taken as 10 nm by the resulting ZnO film growth rate at about 1.45 Å per cycle. This thin film layer was characterized with XRD and AFM analyses. It can be seen from the C-V curves of the device that the capacitance values increased in depletion region with increasing temperature and exhibited peaks towards to forward biases after 240 K temperature. The changing of capacitance values confirmed re-ordering and re-structuring of charges in the interface of the device with changing temperature. The G-V curves of the device also increased with increasing temperature and towards to forward bias voltages due to increasing free charges in the interface. The series resistance ( RsRs ) of the device was taken into account to understand its effect on main electrical parameters, and it could be seen from these results that the RsRs strongly depends on the device temperature. The impedance (Z) values decreased with changing from -1 to +2 V bias voltages and increasing temperature. The barrier height which was obtained from the C-2-V plots increased a slope of 0.00108 eV/K with a decrease in temperature from 160 to 340 K. It can be concluded that the Au/ZnO/n-Si device may be used and improved for next technological applications such as capacitor and memristor