Tool Modeling with Fujaba

AbstractThis paper is a small tutorial on tool building with Fujaba. With the help of a small case study, we exemplify how the different requirements of an environment for a visual language may be addressed using Fujaba graph transformations. This covers abstract and concrete syntax, static and operational semantics, and model transformations. This case study shows, how the more sophisticated language elements of Fujaba may be exploited in modeling complex aspects of the desired CASE tool. In addition, we address some not graph grammar related aspects in building such an environment, e.g. the graphical user interface and multi-user support

A UML-based static verification framework for security

Secure software engineering is a new research area that has been proposed to address security issues during the development of software systems. This new area of research advocates that security characteristics should be considered from the early stages of the software development life cycle and should not be added as another layer in the system on an ad-hoc basis after the system is built. In this paper, we describe a UML-based Static Verification Framework (USVF) to support the design and verification of secure software systems in early stages of the software development life-cycle taking into consideration security and general requirements of the software system. USVF performs static verification on UML models consisting of UML class and state machine diagrams extended by an action language. We present an operational semantics of UML models, define a property specification language designed to reason about temporal and general properties of UML state machines using the semantic domains of the former, and implement the model checking process by translating models and properties into Promela, the input language of the SPIN model checker. We show that the methodology can be applied to the verification of security properties by representing the main aspects of security, namely availability, integrity and confidentiality, in the USVF property specification language

Towards the Correctness of Software Behavior in UML: A Model Checking Approach Based on Slicing

Embedded systems are systems which have ongoing interactions with their environments, accepting requests and producing responses. Such systems are increasingly used in applications where failure is unacceptable: traffic control systems, avionics, automobiles, etc. Correct and highly dependable construction of such systems is particularly important and challenging. A very promising and increasingly attractive method for achieving this goal is using the approach of formal verification. A formal verification method consists of three major components: a model for describing the behavior of the system, a specification language to embody correctness requirements, and an analysis method to verify the behavior against the correctness requirements. This Ph.D. addresses the correctness of the behavioral design of embedded systems, using model checking as the verification technology. More precisely, we present an UML-based verification method that checks whether the conditions on the evolution of the embedded system are met by the model. Unfortunately, model checking is limited to medium size systems because of its high space requirements. To overcome this problem, this Ph.D. suggests the integration of the slicing (reduction) technique

On UML statechart with variabilities

El uso de métodos formales para el diseño de software contribuye a la confiabilidad y robustez del sistema a construir. A medida que los sistemas se vuelven complejos, el enfoque formal es esencial, debido a que permite la demostrabilidad y verificabilidad del diseño. El diseño formal es un proceso que comienza con la etapa de especificación, en la cual el sistema es de nido utilizando un lenguaje de modelado; luego la etapa de verificación, en la cual el sistema es analizado mediante un enfoque de corrección basado en pruebas formales utilizando herramientas matemá ticas y, por último, la etapa de implementación, en la cual la especificación se convierte en código ejecutable. El Lenguaje de Modelado Unificado (UML por sus siglas en inglés) es un lenguaje específico ampliamente utilizado en la industria y la academia. Desafortunadamente, carece de una semántica formal que permita el desarrollo de modelos utilizando un enfoque de corrección basado en pruebas formales. Este trabajo se centra en la especificación formal de familias de sistemas, y, en particular, en la semán- tica de máquinas de estados de UML (UML Statecharts) con variabilidades y sus aplicaciones a líneas de productos de software. La principal contribución es la definición de un formalismo que permite modelar el comportamiento de una familia de sistemas. Tal comportamiento se describe utilizando UML Statecharts en combinación con Diagramas de funcionalidades (Feature Diagrams), con el fin de representar las funcionalidades comunes y variantes de una familia. Para ello se define una relación de orden entre los UML Statecharts, que representa el hecho de que un statechart posee una estructura mas rica que otro. Luego se defi ne con precisión la forma de combinar diferentes extensiones de un mismo statechart. Utilizando estos conceptos, es posible definir el efecto que cada funcionalidad tiene en los productos en los cuales se encuentra presente.Estas definiciones proporcionan una forma muy simple de obtener la especificación del comportamiento de un producto de la línea como la combinación de los UML Statecharts que implementan todas las funcionalidades presentes en un producto en particular. Mas aún, se prueba que la relación de extensión propuesta constituye un refinamiento de comportamiento. El presente enfoque se compara con el estado del arte y se estudia su aplicación práctica con el n de visualizar sus bene cios y posibles debilidades. Adicionalmente, con el fin de comprobar la adecuación de la propuesta, una gran parte de las ideas fueron implementadas en un prototipo utilizando Prolog

A Formal and Tool-Equipped Approach for the Integration of State Diagrams and Formal Datatypes

International audienceSeparation of concerns or aspects is a way to deal with the increasing complexity of systems. The separate design of models for different aspects also promotes a better reusability level. However, an important issue is then to define means to integrate them into a global model. We present a formal and tool-equipped approach for the integration of dynamic models (behaviors expressed using state diagrams) and static models (formal data types) with the benefit to share advantages of both: graphical user-friendly models for behaviors, formal and abstract models for data types. Integration is achieved in a generic way so that it can deal with both different static specification languages (algebraic specifications, Z, B) and different dynamic specification semantic

Challenges and Directions in Formalizing the Semantics of Modeling Languages

Developing software from models is a growing practice and there exist many model-based tools (e.g., editors, interpreters, debuggers, and simulators) for supporting model-driven engineering. Even though these tools facilitate the automation of software engineering tasks and activities, such tools are typically engineered manually. However, many of these tools have a common semantic foundation centered around an underlying modeling language, which would make it possible to automate their development if the modeling language specification were formalized. Even though there has been much work in formalizing programming languages, with many successful tools constructed using such formalisms, there has been little work in formalizing modeling languages for the purpose of automation. This paper discusses possible semantics-based approaches for the formalization of modeling languages and describes how this formalism may be used to automate the construction of modeling tools

Generic Methodology for Formal Verification of UML Models

This paper discusses a Unified Modelling Language (UML) based formal verification methodology for early error detection in the model-based software development cycle. Our approach proposes a UML-based formal verification process utilising functional and behavioural modelling artifacts of UML. It reinforces these artifacts with formal model transition and property verification. The main contribution is a UML to Labelled Transition System (LTS) Translator application that automatically converts UML Statecharts to formal models. Property specifications are derived from system requirements and corresponding Computational Tree Logic (CTL)/Linear Temporal Logic (LTL) model checking procedure verifies property entailment in LTS. With its ability to verify CTL and LTL specifications, the methodology becomes generic for verifying all types of embedded system behaviours. The steep learning curve associated with formal methods is avoided through the automatic formal model generation and thus reduces the reluctance of using formal methods in software development projects. A case study of an embedded controller used in military applications validates the methodology. It establishes how the methodology finds its use in verifying the correctness and consistency of UML models before implementation

Termination Criteria for Model Transformation

Nowadays the usage of model transformations in software engineering has become widespread. Considering current trends in software development such as model driven development (MDD), there is an emerging need to develop model manipulations such as model evolution and optimisation, semantics definition, etc. If a model transformation is described in a precise way, it can be analysed lateron. Models, especially visual models, can be described best by graphs, due to their multi-dimensional extension. Graphs can be manipulated by graph transformation in a rule-based manner. Thus, we specify model transformation by graph transformation. This approach offers visual and formal techniques in such a way that model transformations can be subjects to analysis. Various results on graph transformation can be used to prove important properties of model transformations such as its functional behaviour, a basic property for computations. Moreover, certain kinds of syntactical and semantical consistency properties can be shown on this formal basis

QUALITY IMPROVEMENT AND VALIDATION TECHNIQUES ON SOFTWARE SPECIFICATION AND DESIGN

Ph.DDOCTOR OF PHILOSOPH

Workshop on Modelling of Objects, Components, and Agents, Aarhus, Denmark, August 27-28, 2001

This booklet contains the proceedings of the workshop Modelling of Objects, Components, and Agents (MOCA'01), August 27-28, 2001. The workshop is organised by the CPN group at the Department of Computer Science, University of Aarhus, Denmark and the "Theoretical Foundations of Computer Science" Group at the University of Hamburg, Germany. The papers are also available in electronic form via the web pages: http://www.daimi.au.dk/CPnets/workshop01