MIDAS: Automated Approach to Design Microwave Integrated Inductors and Transformers on Silicon

The design of modern radiofrequency integrated circuits on silicon operating at microwave and millimeter-waves requires the integration of several spiral inductors and transformers that are not commonly available in the process design-kits of the technologies. In this work we present an auxiliary CAD tool for Microwave Inductor (and transformer) Design Automation on Silicon (MIDAS) that exploits commercial simulators and allows the implementation of an automatic design flow, including three-dimensional layout editing and electromagnetic simulations. In detail, MIDAS allows the designer to derive a preliminary sizing of the inductor (transformer) on the bases of the design entries (specifications). It draws the inductor (transformer) layers for the specific process design kit, including vias and underpasses, with or without patterned ground shield, and launches the electromagnetic simulations, achieving effective design automation with respect to the traditional design flow for RFICs. With the present software suite the complete design time is reduced significantly (typically 1 hour on a PC based on Intel® Pentium® Dual 1.80GHz CPU with 2-GB RAM). Afterwards both the device equivalent circuit and the layout are ready to be imported in the Cadence environment

Compact modelling in RF CMOS technology

With the continuous downscaling of complementary metal-oxide-semiconductor (CMOS) technology, the RF performance of metal-oxide-semiconductor field transistors (MOSFETs) has considerably improved over the past years. Today, the standard CMOS technology has become a popular choice for realizing radio frequency (RF) applications. The focus of the thesis is on device compact modelling methodologies in RF CMOS. Compact models oriented to integrated circuit (ICs) computer automatic design (CAD) are the key component of a process design kit (PDK) and the bridge between design houses and foundries. In this work, a novel substrate model is proposed for accurately characterizing the behaviour of RF-MOSFETs with deep n-wells (DNW). A simple test structure is presented to directly access the substrate parasitics from two-port measurements in DNWs. The most important passive device in RFIC design in CMOS is the spiral inductor. A 1-pi model with a novel substrate network is proposed to characterize the broadband loss mechanisms of spiral inductors. Based on the proposed 1-pi model, a physics-originated fully-scalable 2-pi model and model parameter extraction methodology are also presented for spiral inductors in this work. To test and verify the developed active and passive device models and model parameter extraction methods, a series of RF-MOSFETs and planar on-chip spiral inductors with different geometries manufactured by employing standard RF CMOS processes were considered. Excellent agreement between the measured and the simulated results validate the compact models and modelling technologies developed in this work

Modeling of integrated inductors for RF circuit design

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnic

A dual-mode Q-enhanced RF front-end filter for 5 GHz WLAN and UWB with NB interference rejection

The 5 GHz Wireless LAN (802.11a) is a popular standard for wireless indoor communications providing moderate range and speed. Combined with the emerging ultra Wideband standard (UWB) for short range and high speed communications, the two standards promise to fulfil all areas of wireless application needs. However, due to the overlapping of the two spectrums, the stronger 802.11a signals tend to interfere causing degradation to the UWB receiver. This presents one of the main technical challenges preventing the wide acceptance of UWB. The research work presented in this thesis is to propose a low cost RF receiver front-end filter topology that would resolve the narrowband (NB) interference to UWB receiver while being operable in both 802.11a mode and UWB mode. The goal of the dual mode filter design is to reduce cost and complexity by developing a fully integrated front-end filter. The filter design utilizes high Q passive devices and Q-enhancement technique to provide front-end channel-selection in NB mode and NB interference rejection in UWB mode. In the 802.11a NB mode, the filter has a tunable gain of 4 dB to 25 dB, NF of 8 dB and an IIP3 between -47 dBm and -18 dBm. The input impedance is matched at -16 dB. The frequency of operation can be tuned from 5.15 GHz to 5.35 GHz. In the UWB mode, the filter has a gain of 0 dB to 8 dB across 3.1 GHz to 9 GHz. The filter can reject the NB interference between 5.15 GHz to 5.35 GHz at up to 60 dB. The Q of the filter is tunable up to a 250 while consuming a maximum of 23.4 mW of power. The fully integrated dual mode filter occupies a die area of 1.1 mm2

An RF LC Q-enhanced CMOS iter using integrated inductors with layout optimization

Dissertação apresentada para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores, pela Universidade Nova de Lisboa, Faculdade de Ciências e TecnologiaThe advancement of CMOS technology led to the integration of more complex functions in a single chip. In the particular of wireless transceivers, integrated LC tanks are becoming popular both for VCOs and integrated lters. The design of a 2nd order CMOS 0.13 m Q-enhanced integrated LC lter for a frequency of 2.44 GHz is presented. The intent of this lter is to create a circuit for integrated wireless receiver and minimize the requirement for o -chip passive lter components, reducing the overall component count and size of wireless devices and systems. For RF applications the main challenge is still the design of integrated inductors with the maximum quality factor. For that purpose, tapered, i.e, variable width inductors have been introduced in the literature. In this work, a characterization of variable width integrated inductors is proposed. This inductor model is then integrated into an optimization procedure where inductors with a quality factor improvement are obtained

CMOS On-Chip 3D Inductor Design & Application in RF Bio-Sensing

abstract: Three-dimensional (3D) inductors with square, hexagonal and octagonal geometries have been designed and simulated in ANSYS HFSS. The inductors have been designed on Silicon substrate with through-hole via with different width, spacing and thickness. Spice modeling has been done in Agilent ADS and comparison has been made with results of custom excel based calculator and HFSS simulation results. Single ended quality factor was measured as 12.97 and differential ended quality factor was measured as 15.96 at a maximum operational frequency of 3.65GHz. The single ended and differential inductance was measured as 2.98nH and 2.88nH respectively at this frequency. Based on results a symmetric octagonal inductor design has been recommended to be used for application in RF biosensing. A system design has been proposed based on use of this inductor and principle of inductive sensing using magnetic labeling.Dissertation/ThesisM.S. Electrical Engineering 201

The Performance of an Integrated Transformer in a DC/DC Converter

The separation between the low-voltage part and high-voltage part of the converter is formed by a transformer that transfers power while jamming the DC ring. The resonant mode power oscillator is utilized to allow elevated competence power transfer. The on-chip transformer is probable to have elevated value inductance, elevated quality factors and elevated coupling coefficient to decrease the loss in the oscillation. The performance of a transformer is extremely dependent on the structure, topology and other essential structures that create it compatible with the integrated circuits IC process such as patterned ground shield (PGS). Different types of transformers are modeled and simulated in MATLAB; the performances are compared to select the optimum design. The on-chip transformer model is simulated and the Results of MATLAB simulation are exposed, showing an excellent agreement in radio frequency RF

Design and modeling of integrated octagonal shape inductor with substrate silicon in a buck converter

The paper discusses the design and modeling of an integrate octagonal shaped inductor with silicon substrate. A validated equivalent electrical model of the integrated octagonal shaped spiral inductor is developed. The model is used to analyze and evaluate the quality factor and the inductance of the inductor structure proposed under different physical parameters setting. These include the number of turns, spacing between turns and the inner diameter. The simulation results show that an appropriate selection of physic a parameters can achieve an enhanced quality factor and improved inductance. PSIM simulator is used for the implementation of the integrated inductor in a micro buck converter. The simulation results demonstrate that our proposals are very promising approaches for the monolithic integration of DC-DC converters