Multiport Bidirectional SRM Drives for Solar-Assisted Hybrid Electric Bus Powertrain With Flexible Driving and Self-Charging Functions

The hybrid electric bus (HEB) presents an emerging solution to exhaust gas emissions in urban transport. This paper proposes a multiport bidirectional switched reluctance motor (SRM) drive for solar-assisted HEB (SHEB) powertrain, which not only improves the motoring performance, but also achieves flexible charging functions. To extend the driving miles and achieve self-charging ability, photovoltaic (PV) panels are installed on the bus to decrease the reliance on fuelsbatteries and charging stations. A bidirectional front-end circuit with a PV-fed circuit is designed to integrate electrical components into one converter. Six driving and five charging modes are achieved. The dc voltage is boosted by the battery in generator control unit (GCU) driving mode and by the charge capacitor in battery driving mode, where the torque capability is improved. Usually, an extra converter is needed to achieve battery charging. In this paper, the battery can be directly charged by the demagnetization current in GCU or PV driving mode, and can be quickly charged by the PV panels and GCUAC grids at SHEB standstill conditions, by utilizing the traction motor windings and integrated converter circuit, without external charging converters. Experiments on a three-phase 128 SRM confirm the effectiveness of the proposed drive and control scheme

Design of single switch-boosted voltage current suppressor converter for uninterrupted power supply using green resources integration

Introduction. Uninterrupted power supply is the major requirement in the areas since it involves human lives. In the current scenario the demand and price of fossil fuels is increasing rapidly and availability also is not sufficient to the needs, an alternative identification to power generation is solar and wind energies. The purpose of designing an aimed, single switch boosted voltage and current suppressor (SS-BVCS) converter topology that interfaces both the wind and solar hybrid model. The method involves in the proposed chopper converter is derived by simply merging a switch and a pair of diodes and CLC filter which is used in realization of zero voltage switching for the main switch and a reversing diode to extract high voltage gain. The designed SS-BVCS converter topology can able to have a tight self-control on two power-processing paths. The novelty of the SS-BVCS converter module is designed to ensure maximum throughput, feeding to the load with high quality uninterrupted output, by boosting the DC voltage to a required amount and thereby supressing the current. Practical value obtained by the developed model utilizes both the sources for supply to the load individually or combined based on the extraction availability of the feeder. Also, the proposed SS-BVCS module delivers with efficient lesser component count and gaining maximum power from the harvest of green energy.Вступ. Джерело безперебійного живлення є основною вимогою в галузях, що пов'язані з людськими життями. У поточній ситуації, коли попит та ціна на викопне паливо швидко зростають, а їх доступність також недостатня для задоволення потреб, альтернативною технологією виробництва електроенергії є сонячна та вітрова енергія. Метою є розробка цільової топології перетворювача з підвищеною напругою та пригнічувачем струму з одним перемикачем (SS-BVCS), яка взаємодіє як з вітровою, так і з гібридною моделлю сонячної енергії. Метод включає запропонований перетворювач переривника, отриманий шляхом простого злиття перемикача, пари діодів і CLC-фільтра, який використовується для реалізації перемикання при нульовому напрузі для основного ключа і реверсивного діода для вилучення високого коефіцієнта посилення по напрузі. Розроблена топологія перетворювача SS-BVCS може забезпечити жорсткий самоконтроль на двох ланцюгах обробки енергії. Новизна модуля перетворювача SS-BVCS призначена для забезпечення максимальної пропускної здатності, живлення навантаження з якісним безперебійним виходом шляхом підвищення напруги постійного струму до необхідної величини і, таким чином, придушення струму. Практична цінність, отримана завдяки розробленій моделі, дозволяє використовувати як джерела живлення навантаження окремо, так і комбіновано залежно від можливості відбору фідера. Крім того, запропонований модуль SS-BVCS забезпечує ефективне використання меншої кількості компонентів та отримання максимальної потужності за рахунок збирання зеленої енергії

Voltage-to-Time Converter for High-Speed Time-Based Analog-to-Digital Converters

In modern complementary metal oxide semiconductor (CMOS) technologies, the supply voltage scales faster than the threshold voltage (Vth) of the transistors in successive smaller nodes. Moreover, the intrinsic gain of the transistors diminishes as well. Consequently, these issues increase the difficulty of designing higher speed and larger resolution analog-to-digital converters (ADCs) employing voltage-domain ADC architectures. Nevertheless, smaller transistor dimensions in state-of-the-art CMOS technologies leads to reduced capacitance, resulting in lower gate delays. Therefore, it becomes beneficial to first convert an input voltage to a 'time signal' using a voltage-to-time converter (VTC), instead of directly converting it into a digital output. This 'time-signal' could then be converted to a digital output through a time-to-digital converter (TDC) for complete analog-to-digital conversion. However, the overall performance of such an ADC will still be limited to the performance level of the voltage-to-time conversion process. Hence, this thesis presents the design of a linear VTC for a high-speed time-based ADC in 28 nm CMOS process. The proposed VTC consists of a sample-and-hold (S/H) circuit, a ramp generator and a comparator to perform the conversion of the input signal from the voltage to the time domain. Larger linearity is attained by integrating a constant current (with high output impedance) over a capacitor, generating a linear ramp. The VTC operates at 256 MSPS consuming 1.3 mW from 1 V supply with a full-scale 1 V pk-pk differential input signal, while achieving a time-domain output signal with a spurious-free-dynamic-range (SFDR) of 77 dB and a signal-to-noise-and-distortion ratio (SNDR) of 56 dB at close to Nyquist frequency (f = 126.5 MHz). The proposed VTC attains an output range of 2.7 ns, which is the highest linear output range for a VTC at this speed, published to date

A Charge-Recycling Scheme and Ultra Low Voltage Self-Startup Charge Pump for Highly Energy Efficient Mixed Signal Systems-On-A-Chip

The advent of battery operated sensor-based electronic systems has provided a pressing need to design energy-efficient, ultra-low power integrated circuits as a means to improve the battery lifetime. This dissertation describes a scheme to lower the power requirement of a digital circuit through the use of charge-recycling and dynamic supply-voltage scaling techniques. The novel charge-recycling scheme proposed in this research demonstrates the feasibility of operating digital circuits using the charge scavenged from the leakage and dynamic load currents inherent to digital design. The proposed scheme efficiently gathers the “ground-bound” charge into storage capacitor banks. This reclaimed charge is then subsequently recycled to power the source digital circuit. The charge-recycling methodology has been implemented on a 12-bit Gray-code counter operating at frequencies of less than 50 MHz. The circuit has been designed in a 90-nm process and measurement results reveal more than 41% reduction in the average energy consumption of the counter. The total energy savings including the power consumed for the generation of control signals aggregates to an average of 23%. The proposed methodology can be applied to an existing digital path without any design change to the circuit but with only small loss to the performance. Potential applications of this scheme are described, specifically in wide-temperature dynamic power reduction and as a source for energy harvesters. The second part of this dissertation deals with the design and development of a self-starting, ultra-low voltage, switched-capacitor (SC) DC-DC converter that is essential to an energy harvesting system. The proposed charge-pump based SC-converter operates from 125-mV input and thus enables battery-less operation in ultra-low voltage energy harvesters. The charge pump does not require any external components or expensive post-fabrication processing to enable low-voltage operation. This design has been implemented in a 130-nm CMOS process. While the proposed charge pump provides significant efficiency enhancement in energy harvesters, it can also be incorporated within charge recycling systems to facilitate adaptable charge-recycling levels. In total, this dissertation provides key components needed for highly energy-efficient mixed signal systems-on-a-chip

Efficient DSP and Circuit Architectures for Massive MIMO: State-of-the-Art and Future Directions

Massive MIMO is a compelling wireless access concept that relies on the use of an excess number of base-station antennas, relative to the number of active terminals. This technology is a main component of 5G New Radio (NR) and addresses all important requirements of future wireless standards: a great capacity increase, the support of many simultaneous users, and improvement in energy efficiency. Massive MIMO requires the simultaneous processing of signals from many antenna chains, and computational operations on large matrices. The complexity of the digital processing has been viewed as a fundamental obstacle to the feasibility of Massive MIMO in the past. Recent advances on system-algorithm-hardware co-design have led to extremely energy-efficient implementations. These exploit opportunities in deeply-scaled silicon technologies and perform partly distributed processing to cope with the bottlenecks encountered in the interconnection of many signals. For example, prototype ASIC implementations have demonstrated zero-forcing precoding in real time at a 55 mW power consumption (20 MHz bandwidth, 128 antennas, multiplexing of 8 terminals). Coarse and even error-prone digital processing in the antenna paths permits a reduction of consumption with a factor of 2 to 5. This article summarizes the fundamental technical contributions to efficient digital signal processing for Massive MIMO. The opportunities and constraints on operating on low-complexity RF and analog hardware chains are clarified. It illustrates how terminals can benefit from improved energy efficiency. The status of technology and real-life prototypes discussed. Open challenges and directions for future research are suggested.Comment: submitted to IEEE transactions on signal processin

An 11b pipeline ADC with dual sampling technique for converting multi-carrier signals

This paper presents a dual sampling technique for analog-to-digital converters (ADCs) to convert multi-carrier signals more efficiently and proposes an 11b switched-capacitor pipeline ADC based on this technique. With the dual sampling technique, the input signal power of the ADC can be boosted without getting excessive clipping noise and the ADC can have a higher resolution over the critical low amplitude region. Hence the overall signal to thermal, quantization and clipping noise ratio is improved. The 11b pipeline ADC with the proposed technique achieves a wide input signal range of 2Vppd using a single 1.2V supply. Simulations show an improvement of about 5dB in SNDR and better than 10dB in MTPR compared to a conventional 11b ADC for converting multi-carrier signals

Space-vector-modulated three-level inverters with a single Z-source network

The Z-source inverter is a relatively recent converter topology that exhibits both voltage-buck and voltage-boost capability. The Z-source concept can be applied to all dc-to-ac, ac-to-dc, ac-to-ac, and dc-to-dc power conversion whether two-level or multilevel. However, multilevel converters offer many benefits for higher power applications. Previous publications have shown the control of a Z-source neutral point clamped inverter using the carrier based modulation technique. This paper presents the control of a Z-source neutral point clamped inverter using the space vector modulation technique. This gives a number of benefits, both in terms of implementation and harmonic performance. The adopted approach enables the operation of the Z-source arrangement to be optimised and implemented digitally without introducing any extra commutations. The proposed techniques are demonstrated both in simulation and through experimental results from a prototype converter

Design and Application of Hybrid Multilevel Inverter for Voltage Boost

Today many efforts are made to research and use new energy sources because the potential for an energy crisis is increasing. Multilevel converters have gained much attention in the area of energy distribution and control due to its advantages in high power applications with low harmonics. They not only achieve high power ratings, but also enable the use of renewable energy sources. The general function of the multilevel converter is to synthesize a desired high voltage from several levels of dc voltages that can be batteries, fuel cells, etc. This dissertation presents a new hybrid multilevel inverter for voltage boost. The inverter consists of a standard 3-leg inverter (one leg for each phase) and H-bridge in series with each inverter leg. It can use only a single DC power source to supply a standard 3-leg inverter along with three full H-bridges supplied by capacitors or batteries. The proposed inverter could be applied in hybrid electric vehicles (HEVs) and fuel cell based hybrid electric vehicles (FCVs). It is of voltage boosting capability and eliminates the magnetics. This feature makes it suitable for the motor running from low to high power mode. In addition to hybrid electric vehicle applications, this paper also presents an application where the hybrid multilevel inverter acts as a renewable energy utility interface. In this dissertation, the structure, operation principle, and modulation control schemes of the proposed hybrid multilevel inverter are introduced. Simulation models and results are described and analyzed. An experimental 5 kW prototype inverter is built and tested