21 research outputs found

    Smart and high-performance digital-to-analog converters with dynamic-mismatch mapping

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    The trends of advanced communication systems, such as the high data rate in multi-channel base-stations and digital IF conversion in software-defined radios, have caused a continuously increasing demand for high performance interface circuits between the analog and the digital domain. A Digital-to-Analog converter (DAC) is such an interface circuit in the transmitter path. High bandwidth, high linearity and low noise are the main design challenges in high performance DACs. Current-steering is the most suitable architecture to meet these performance requirements. The aim of this thesis is to develop design techniques for high-speed high-performance Nyquist current-steering DACs, especially for the design of DACs with high dynamic performance, e.g. high linearity and low noise. The thesis starts with an introduction to DACs in chapter 2. The function in time/frequency domain, performance specifications, architectures and physical implementations of DACs are brie y discussed. Benchmarks of state-of-the-art published Nyquist DACs are also given. Chapter 3 analyzes performance limitations by various error sources in Nyquist current-steering DACs. The outcome shows that in the frequency range of DC to hundreds of MHz, mismatch errors, i.e. amplitude and timing errors, dominate the DAC linearity. Moreover, as frequencies increase, the effect of timing errors becomes more and more dominant over that of amplitude errors. Two new parameters, i.e. dynamic-INL and dynamic-DNL, are proposed to evaluate the matching of current cells. Compared to the traditional static-INL/DNL, the dynamic-INL/DNL can describe the matching between current cells more accurately and completely. By reducing the dynamic-INL/DNL, the non-linearities caused by all mismatch errors can be reduced. Therefore, both the DAC static and dynamic performance can be improved. The dynamic-INL/DNL are frequency-dependent parameters based on the measurement modulation frequency fm. This fm determines the weight between amplitude and timing errors in the dynamic-INL/DNL. Actually, this gives a freedom to optimize the DAC performance for different applications, e.g. low fm for low frequency applications and high fm for high frequency applications. Chapter 4 summarizes the existing design techniques for intrinsic and smart DACs. Due to technology limitations, it is diffcult to reduce the mismatch errors just by intrinsic DAC design with reasonable chip area and power consumption. Therefore, calibration techniques are required. An intrinsic DAC with calibration is called a smart DAC. Existing analog calibration techniques mainly focus on current source calibration, so that the amplitude error can be reduced. Dynamic element matching is a kind of digital calibration technique. It can reduce the non-linearities caused by all mismatch errors, but at the cost of an increased noise oor. Mapping is another kind of digital calibration technique and will not increase the noise. Mapping, as a highly digitized calibration technique, has many advantages. Since it corrects the error effects in the digital domain, the DAC analog core can be made clean and compact, which reduces the parasitics and the interference generated in the analog part. Traditional mapping is static-mismatch mapping, i.e. mapping only for amplitude errors, which many publications have already addressed on. Several concepts have also been proposed on mapping for timing errors. However, just mapping for amplitude or timing error is not enough to guarantee a good performance. This work focuses on developing mapping techniques which can correct both amplitude and timing errors at the same time. Chapter 5 introduces a novel mapping technique, called dynamic-mismatch mapping (DMM). By modulating current cells as square-wave outputs and measuring the dynamic-mismatch errors as vectors, DMM optimizes the switching sequence of current cells based on dynamic-mismatch error cancelation such that the dynamic-INL can be reduced. After reducing the dynamic-INL, the non-linearities caused by both amplitude and timing errors can be significantly reduced in the whole Nyquist band, which is confirmed by Matlab behavioral-level Monte-Carlo simulations. Compared to traditional static-mismatch mapping (SMM), DMM can reduce the non-linearities caused by both amplitude and timing errors. Compared to dynamic element matching (DEM), DMM does not increase the noise floor. The dynamic-mismatch error has to be accurately measured in order to gain the maximal benefit from DMM. An on-chip dynamic-mismatch error sensor based on a zero-IF receiver is proposed in chapter 6. This sensor is especially designed for low 1/f noise since the signal is directly down-converted to DC. Its signal transfer function and noise analysis are also given and con??rmed by transistor-level simulations. Chapter 7 gives a design example of a 14-bit current-steering DAC in 0.14mum CMOS technology. The DAC can be configured in an intrinsic-DAC mode or a smart-DAC mode. In the intrinsic-DAC mode, the 14-bit 650MS/s intrinsic DAC core achieves a performance of SFDR>65dBc across the whole 325MHz Nyquist band. In the smart-DAC mode, compared to the intrinsic DAC performance, DMM improves the DAC performance in the whole Nyquist band, providing at least 5dB linearity improvement at 200MS/s and without increasing the noise oor. This 14-bit 200MS/s smart DAC with DMM achieves a performance of SFDR>78dBc, IM

    Design and Characterization of 64K Pixels Chips Working in Single Photon Processing Mode

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    Progress in CMOS technology and in fine pitch bump bonding has made possible the development of high granularity single photon counting detectors for X-ray imaging. This thesis studies the design and characterization of three pulse processing chips with 65536 square pixels of 55 µm x 55 µm designed in a commercial 0.25 µm 6-metal CMOS technology. The 3 chips share the same architecture and dimensions and are named Medipix2, Mpix2MXR20 and Timepix. The Medipix2 chip is a pixel detector readout chip consisting of 256 x 256 identical elements, each working in single photon counting mode for positive or negative input charge signals. The preamplifier feedback provides compensation for detector leakage current on a pixel by pixel basis. Two identical pulse height discriminators are used to define an energy window. Every event falling inside the energy window is counted with a 13 bit pseudo-random counter. The counter logic, based in a shift register, also behaves as the input/output register for the pixel. Each cell also has an 8-bit configuration register which allows masking, test-enabling and 3-bit individual threshold adjust for each discriminator. The chip can be configured in serial mode and readout either serially or in parallel. Measurements show an electronic noise ~160 e- rms with a gain of ~9 mV/ke-. The threshold spread after equalization of ~120 e- rms brings the full chip minimum detectable charge to ~1100 e-. The analog static power consumption is ~8 µW per pixel with Vdda=2.2 V. The Mpix2MXR20 is an upgraded version of the Medipix2. The main changes in the pixel consist of: an improved tolerance to radiation, improved pixel to pixel threshold uniformity, and a 14-bit counter with overflow control. The chip periphery includes new threshold DACs with smaller step size, improved linearity, and better temperature dependence. Timepix is an evolution of the Mpix2MXR20 which provides independently in each pixel information of arrival time, time-over-threshold or event counting. Timepix uses as a time reference an external clock (Ref_Clk) up to 100 MHz which is distributed all over the pixel matrix during acquisition mode. The preamplifier is improved and there is a single discriminator with 4-bit threshold adjustment in order to reduce the minimum detectable charge limit. Measurements show an electrical noise ~100 e- rms and a gain of ~16.5 mV/ke-. The threshold spread after equalization of ~35 e- rms brings the full chip minimum detectable charge either to ~650 e- with a naked chip (i.e. gas detectors) or ~750 e- when bump-bonded to a detector. The pixel static power consumption is ~13.5 µW per pixel with Vdda=2.2 V and Ref_Clk=80 MHz. This family of chips have been used for a wide variety of applications. During these studies a number of limitations have come to light. Among those are limited energy resolution and surface area. Future developments, such as Medipix3, will aim to address those limitations by carefully exploiting developments in microelectronics

    Implémentation, ajustement laser et modélisation des convertisseurs numériques à analogique R2R

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    La conversion numérique à analogique -- Principales caractéristiques des CNA -- Algorithmes et architectures de conversion -- Techniques de linéarisation -- Le CNA R2R inversé -- Un CNA 14 bits ajusté au laser et fabriqué dans une technologie CMOS standard -- Puce -- Montage de test -- Notes et résultats de tests -- Une compensation améliorée pour les interrupteurs des CNA R2R inversés -- Modélisation des CNA R2R

    Fiscal year 1981 scientific and technical reports, articles, papers, and presentations

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    This bibliography lists approximately 503 formal NASA technical reports, papers published in technical journals, and presentations by MSFC personnel in FY-1981. It also includes papers of MSFC contractors. Citations announced in the NASA scientific and technical information system are noted

    The ALICE experiment at the CERN LHC

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    ALICE (A Large Ion Collider Experiment) is a general-purpose, heavy-ion detector at the CERN LHC which focuses on QCD, the strong-interaction sector of the Standard Model. It is designed to address the physics of strongly interacting matter and the quark-gluon plasma at extreme values of energy density and temperature in nucleus-nucleus collisions. Besides running with Pb ions, the physics programme includes collisions with lighter ions, lower energy running and dedicated proton-nucleus runs. ALICE will also take data with proton beams at the top LHC energy to collect reference data for the heavy-ion programme and to address several QCD topics for which ALICE is complementary to the other LHC detectors. The ALICE detector has been built by a collaboration including currently over 1000 physicists and engineers from 105 Institutes in 30 countries. Its overall dimensions are 161626 m3 with a total weight of approximately 10 000 t. The experiment consists of 18 different detector systems each with its own specific technology choice and design constraints, driven both by the physics requirements and the experimental conditions expected at LHC. The most stringent design constraint is to cope with the extreme particle multiplicity anticipated in central Pb-Pb collisions. The different subsystems were optimized to provide high-momentum resolution as well as excellent Particle Identification (PID) over a broad range in momentum, up to the highest multiplicities predicted for LHC. This will allow for comprehensive studies of hadrons, electrons, muons, and photons produced in the collision of heavy nuclei. Most detector systems are scheduled to be installed and ready for data taking by mid-2008 when the LHC is scheduled to start operation, with the exception of parts of the Photon Spectrometer (PHOS), Transition Radiation Detector (TRD) and Electro Magnetic Calorimeter (EMCal). These detectors will be completed for the high-luminosity ion run expected in 2010. This paper describes in detail the detector components as installed for the first data taking in the summer of 2008

    Topical Workshop on Electronics for Particle Physics

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    Topical Workshop on Electronics for Particle Physics

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    The purpose of the workshop was to present results and original concepts for electronics research and development relevant to particle physics experiments as well as accelerator and beam instrumentation at future facilities; to review the status of electronics for the LHC experiments; to identify and encourage common efforts for the development of electronics; and to promote information exchange and collaboration in the relevant engineering and physics communities

    The CMS experiment at the CERN LHC

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    The Compact Muon Solenoid (CMS) detector is described. The detector operates at the Large Hadron Collider (LHC) at CERN. It was conceived to study proton-proton (and leadlead) collisions at a centre-of-mass energy of 14 TeV (5.5 TeV nucleon-nucleon) and at luminosities up to 1034 cm-2s-1 (1027 cm-2s-1). At the core of the CMS detector sits a high-magnetic field and large-bore superconducting solenoid surrounding an all-silicon pixel and strip tracker, a lead-tungstate scintillating-crystals electromagnetic calorimeter, and a brass-scintillator sampling hadron calorimeter. The iron yoke of the flux-return is instrumented with four stations of muon detectors covering most of the 4π solid angle. Forward sampling calorimeters extend the pseudorapidity coverage to high values (|η| ≤ 5) assuring very good hermeticity. The overall dimensions of the CMS detector are a length of 21.6 m, a diameter of 14.6 m and a total weight of 12500 t

    ALICE: Physics Performance Report, Volume I

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    ALICE is a general-purpose heavy-ion experiment designed to study the physics of strongly interacting matter and the quark-gluon plasma in nucleus-nucleus collisions at the LHC. It currently includes more than 900 physicists and senior engineers, from both nuclear and high-energy physics, from about 80 institutions in 28 countries. The experiment was approved in February 1997. The detailed design of the different detector systems has been laid down in a number of Technical Design Reports issued between mid-1998 and the end of 2001 and construction has started for most detectors. Since the last comprehensive information on detector and physics performance was published in the ALICE Technical Proposal in 1996, the detector as well as simulation, reconstruction and analysis software have undergone significant development. The Physics Performance Report (PPR) will give an updated and comprehensive summary of the current status and performance of the various ALICE subsystems, including updates to the Technical Design Reports, where appropriate, as well as a description of systems which have not been published in a Technical Design Report. The PPR will be published in two volumes. The current Volume I contains: 1. a short theoretical overview and an extensive reference list concerning the physics topics of interest to ALICE, 2. relevant experimental conditions at the LHC, 3. a short summary and update of the subsystem designs, and 4. a description of the offline framework and Monte Carlo generators. Volume II, which will be published separately, will contain detailed simulations of combined detector performance, event reconstruction, and analysis of a representative sample of relevant physics observables from global event characteristics to hard processes
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