Characterization and compact modeling of printed electrolyte-gated thin film transistors and circuits

Die Herstellung konventioneller Elektronik ist ein hochkomplexer Prozess, der hohe Kosten erfordert. In diesem Zusammenhang gewinne die gedruckte Elektronik sowohl in der Wissenschaft als auch in der Industrie eine erhöhte Aufmerksamkeit. Der Hauptgrund dafür ist die Vereinfachung des Herstellungsprozesses durch additive Drucktechnologien wie Inkjet-Druck. Dies hat Vorteile wie die bedarfsgerechte Herstellung und minimaler Materialverbrauch. Außerdem wird eine vielfältige Auswahl verschiedener Substratmaterialien ermöglicht. Im Zentrum der Entwicklung von Schaltungen auf Basis gedruckter Elektronik stehen gedruckte Transistoren. In letzter Zeit sind Metalloxidhalbleiter wie Indiumoxid aufgrund ihrer hohen Ladungsbeweglichkeit zu vielversprechenden Materialien für die Herstellung gedruckter elektronischer Bauelemente geworden. Darüber hinaus bietet der Elektrolyt-Gate-Ansatz aufgrund der großen Gate-Kapazität, die durch die elektrischen Doppelschichten bereitgestellt wird, auch die Vorteile, einen Niederspannungsbetrieb im Sub-1 V-Bereich zu erreichen. Dies eröffnet neue Möglichkeiten für die Herstellung gedruckter Bauteile und Schaltungen in Nischenanwendungen. Um das Design und die Herstellung von gedruckten Schaltungen zu erleichtern, ist die Entwicklung kompakter Modelle erforderlich. Die meisten existierenden Arbeiten haben sich bisher auf die Untersuchung des statischen Verhaltens von Transistoren konzentriert. Hierbei wird das dynamische und das Rauschverhalten der Bauteile häufig vernachlässigt. Ziel dieser Arbeit ist es daher, die umfassende Untersuchung der Kapazitäts sowie Rauscheigenschaften Tintenstrahl-gedruckter Dünnschichttransistoren mit einem flüssig-prozessierbaren Feststoffelektrolyten als Isolator (EGT) und einem Indiumoxid-Halbleiter als Kanalmaterial durchzuführen.. Es werden geeignete Modellierungsansätze vorgeschlagen, um das elektrische Verhalten genau zu erfassen. Dies ermöglicht eine erweiterte Analyse analoger, digitaler sowie gemischter analog-digitaler Schaltungen. In dieser Arbeit wird die Kapazität von EGTs mittels spannungsabhängiger Impedanzspektroskopie charakterisiert. Intrinsische und extrinsische Effekte werden durch Verwendung von De-Embedding-Teststrukturen getrennt. Des Weiteren wird ein Ersatzschaltbild erstellt, um genaue Simulationen des gemessenen Frequenzgangs der Gate-Impedanz zu ermöglichen. Auf dieser Grundlage zeigt sich, dass Top-Gate EGTs das Potenzial haben, eine Schaltfrequenz im kHz-Bereich zu erreichen, wenn die Materialien und der Druckprozess weiter optimiert werden. Darüber hinaus wird ein Meyer-ähnliches Modell vorgeschlagen, um die Kapazitäts-Spannungs-Eigenschaften der Anschlusskapazität genau zu erfassen. Es werden sowohl parasitäre Kapazitäten als auch nicht-quasistatische Effekte berücksichtigt. Die resultierenden Modelle ermöglichen weitere AC- und transiente Simulationen komplexer Schaltungen in der EGT-Technologie. Im Folgenden werden Untersuchungen zu den Rauscheigenschaften gedruckter EGTs durchgeführt. Das Niederfrequenzrauschen wird anhand eines eigens dafür optimierten Versuchsaufbaus charakterisiert. Durch Untersuchung der gemessenen Rauschspektren im Transistor-Drainstrom bei verschiedenen Gate-Spannungen wurde die Ladungsträgerschwankung mit korrelierter Mobilitätsschwankung als primärer Rauschmechanismus bestimmt. Auf dieser Grundlage kann das normalisierte Flachband-Spannungsrauschen als Hauptleistungsmetrik berechnet werden, was im Vergleich zu anderen Dünnschichttechnologien, die auf Dielektrika und Halbleitern wie IZO und IGZO basieren, einen erheblich niedrigeren Wert aufweist.. Ein plausibler Grund könnte die große Gate-Kapazität sein, die durch die elektrische Doppelschicht erzeugt wird. Daher eigenen sich gedruckte EGTs für beispielsweise rauscharme Anwendungen in der Sensorik. Abschließend werden verschiedene Schaltungsdesigns vorgeschlagen, die auf EGT-Technologie basieren. Dies beinhaltet grundlegende digitale Schaltungen wie Inverter Strukturen und Ringoszillatoren. Ihre Leistungsmetriken, einschließlich der Gatterlaufzeit und dem Stromverbrauch, werden ausführlich charakterisiert. Des Weiteren wird das erste Design eines gedruckten Brückengleichrichters unter Verwendung von EGTs mit eine nahe-null-Volt-Schwellspannung in einer Dioden-Konfiguration vorgestellt. Der vorgestellte Gleichrichter ist in der Lage, Eingangsspannungen mit kleiner Amplitude von circa 100 mV effektiv zu verarbeiten. Dies ist besonders im Anwendungsbereich des Energy-Harvestings von Interesse. Zusätzlich werden die zuvor etablierten Kapazitätsmodelle auf diesen Schaltungen verifiziert. Ein Vergleich der Simulations- und Messdaten zeigt deren sehr gute Übereinstimmung und verifiziert die entwickelten Kapazitätsmodelle

A Study on SPICE Modeling of Non-Resonant Plasmonic Terahertz Detector

Department Of Electrical EngineeringThe terahertz (sub-millimeter wave) is the frequency resource, ranging from 100 GHz ~ 10 THz band, located in the middle region of the infrared and millimeter waves in the electromagnetic spectrum. Terahertz waves has unique physical characteristics, which is transparency of radio waves and straightness of light waves, simultaneously. The terahertz wave is applied to the basic science, such as device, spectroscopy, and imaging technology. And also adjust in the applied science, such as biomedical engineering, security, environment, information and communication. Which importance already verified. In the new shape of future market is expected to be formed broadly. For this application, operating in the THz frequency detecting device essential. Recently, Current elements operating in terahertz are present, such as compound semiconductor (???-???HBT, HEMT). But, there are disadvantage to use as a high price. Therefore, research have been made of silicon based THz detector in many research groups. Silicon-based nano-technology utilizes a plasma wave transistor technology. Which is using the space-time change of the channel charge density. That causes plasma wave oscillation in the MOSFET (Metal oxide semiconductor field effect transistor) channel and this effect available MOSET operating terahertz regime beyond MOSFET cut-off frequency. So, PWT (plasma wave transistor) is available terahertz detection and oscillation. For integrated possible post processing circuit development in these of terahertz applications system, silicon based PWT compact model is essential thing. For this compact model for spice simulation beyond cut-off frequency, we consider charge time variance model which is NQS (non-quasi-static) model, not quasi-static model. For NQS model two kinds of model exist, first is RC ladder model. That is seral connect MOSFET get rid of parasitic elements. And these complex circuit making the equivalent circuit model, it called New Elmore model. For post processing circuit simulation, fast simulation speed is essential, RC ladder model has a disadvantage (for simulating each segment). In this thesis we using New Elmore model based on Non-resonant plasmonic THz detector modeling, And verified physical validity of our NQS model using the our TCAD model based on Quasi-plasma 2DEG. And we propose fast and accurate compact modelingope

Modeling and Analysis of Plasmonic Terahertz Wave Detector Based on Field Effect Transistor

Department of Electrical EngineeringI propose accurate analysis and novel model of the nonresonant plasmonic terahertz (THz) wave detector based on the silicon (Si) field effect transistor (FET) with a technology computer-aided design (TCAD) platform and SPICE simulation. By introducing a quasi-plasma two-dimensional electron gas (2DEG) in the channel of the FET, the physical behavior of the plasma wave has been modeled with the TCAD platform. For accurate analysis of the modulation and propagation of the channel electron density as the plasma wave, I have characterized the quasi-plasma 2DEG model with two key parameters, such as quasi-plasma 2DEG length (lQP) and density (NQP). The lQP and NQP is defined exactly as extracting the average point of the electron density by using the normalization method. Through the quasi-plasma 2DEG modeling, I investigate the performance enhancement of the plasmonic terahertz wave detector based on Si FET according to scaling down the gate oxide thickness (tox), which is a significant parameter of FET-based plasmonic terahertz detector for the channel electron density modulation. By scaling down tox, the responsivity (Rv) and noise equivalent power (NEP), which are the important performance metrics of the THz wave detector, have been enhanced. In addition, I report the new NQS compact model for MOSFET-based THz wave detector using SPICE simulation. Because the FETs are intensively considered for THz detector due to their performance and applicability, it is essential to describe the physical behaviors of FET in the THz regime with non-quasi-static (NQS) analysis. However, most of the NQS MOSFET models (e.g., Elmore model) have the complexity of the formulation and fail to describe the device physics for the accurate analysis of fast switching and high-frequency operation. In this work, I have proposed novel NQS compact model of MOSFET, which is applicable for transient simulation of the plasmonic THz detectors. The new SPICE NQS model has been verified by comparing with TCAD device simulation as reference of the complete numerical NQS simulation. For simulation of MOSFET-based plasmonic THz detector with SPICE, I demonstrate the model validity by extracting the photoresponse simulation as the function of the gate voltage at 0.2 THz with the peak point in the sub-threshold region. The proposed novel methodologies will provide the advanced physical analysis and efficient structural design for developing the nonresonant plasmonic terahertz detectors operating in THz regime.ope

A Study on SPICE Modeling of Non-Resonant Plasmonic Terahertz Detector

Department Of Electrical EngineeringThe terahertz (sub-millimeter wave) is the frequency resource, ranging from 100 GHz ~ 10 THz band, located in the middle region of the infrared and millimeter waves in the electromagnetic spectrum. Terahertz waves has unique physical characteristics, which is transparency of radio waves and straightness of light waves, simultaneously. The terahertz wave is applied to the basic science, such as device, spectroscopy, and imaging technology. And also adjust in the applied science, such as biomedical engineering, security, environment, information and communication. Which importance already verified. In the new shape of future market is expected to be formed broadly. For this application, operating in the THz frequency detecting device essential. Recently, Current elements operating in terahertz are present, such as compound semiconductor (???-???HBT, HEMT). But, there are disadvantage to use as a high price. Therefore, research have been made of silicon based THz detector in many research groups. Silicon-based nano-technology utilizes a plasma wave transistor technology. Which is using the space-time change of the channel charge density. That causes plasma wave oscillation in the MOSFET (Metal oxide semiconductor field effect transistor) channel and this effect available MOSET operating terahertz regime beyond MOSFET cut-off frequency. So, PWT (plasma wave transistor) is available terahertz detection and oscillation. For integrated possible post processing circuit development in these of terahertz applications system, silicon based PWT compact model is essential thing. For this compact model for spice simulation beyond cut-off frequency, we consider charge time variance model which is NQS (non-quasi-static) model, not quasi-static model. For NQS model two kinds of model exist, first is RC ladder model. That is seral connect MOSFET get rid of parasitic elements. And these complex circuit making the equivalent circuit model, it called New Elmore model. For post processing circuit simulation, fast simulation speed is essential, RC ladder model has a disadvantage (for simulating each segment). In this thesis we using New Elmore model based on Non-resonant plasmonic THz detector modeling, And verified physical validity of our NQS model using the our TCAD model based on Quasi-plasma 2DEG. And we propose fast and accurate compact modelingope

ELECTRON DEVICE NONLINEAR MODELLING FOR MICROWAVE CIRCUIT DESIGN

The electron device modelling is a research topic of great relevance, since the performances required to devices are continuously increasing in terms of frequency, power and linearity: new technologies are affirming themselves, bringing new challenges for the modelling community. In addition, the use of monolithic microwave integrated circuits (MMIC) is also increasing, making necessary the availability, in the circuit design phase, of models which are computationally efficient and at the same more and more accurate. The importance of modelling is even more evident by thinking at the wide area covered by microwave systems: terrestrial broadband, satellite communications, automotive applications, but also military industry, emergency prevention systems or medical instrumentations. This work contains a review of the empirical modelling approach, providing the description of some well-known equivalent-circuit and black-box models. In addition, an original modelling approach is described in details, together with the various possible applications: modelling of nonquasi-static phenomena as well as of low-frequency dispersive effects. A wide experimental validation is provided, for GaAs- and GaN-based devices. Other modelling issues are faced up, like the extraction of accurate models for Cold-FET or the more convenient choice of the data-interpolator in table-based models. Finally, the device degradation is also treated: a new measurement setup will be presented, aimed to the characterization of the device breakdown walkout under actual operating conditions for power amplifiers

Compact modelling in RF CMOS technology

With the continuous downscaling of complementary metal-oxide-semiconductor (CMOS) technology, the RF performance of metal-oxide-semiconductor field transistors (MOSFETs) has considerably improved over the past years. Today, the standard CMOS technology has become a popular choice for realizing radio frequency (RF) applications. The focus of the thesis is on device compact modelling methodologies in RF CMOS. Compact models oriented to integrated circuit (ICs) computer automatic design (CAD) are the key component of a process design kit (PDK) and the bridge between design houses and foundries. In this work, a novel substrate model is proposed for accurately characterizing the behaviour of RF-MOSFETs with deep n-wells (DNW). A simple test structure is presented to directly access the substrate parasitics from two-port measurements in DNWs. The most important passive device in RFIC design in CMOS is the spiral inductor. A 1-pi model with a novel substrate network is proposed to characterize the broadband loss mechanisms of spiral inductors. Based on the proposed 1-pi model, a physics-originated fully-scalable 2-pi model and model parameter extraction methodology are also presented for spiral inductors in this work. To test and verify the developed active and passive device models and model parameter extraction methods, a series of RF-MOSFETs and planar on-chip spiral inductors with different geometries manufactured by employing standard RF CMOS processes were considered. Excellent agreement between the measured and the simulated results validate the compact models and modelling technologies developed in this work

Modélisation distribuée et évolutive du GaN HEMT

L’industrie de télécommunication et les satellites se base majoritairement sur les technologies Si et GaAs. La demande croissante des hauts débits de données entraine une facture élevée en énergie. En outre, la saturation de la bande des basses fréquences, le besoin des débits élevés et les exigences de la haute puissance imposait l’utilisation de la bande hautes fréquences. Dans le but de résoudre les problèmes cités auparavant, la technologie GaN est introduite comme un candidat prometteur qui peut offrir de la haute puissance, taille du circuit plus faible avec une meilleure stabilité mécanique aux environnements hostiles/milieux agressifs. À titre d’exemple, l‘agence spatiale européenne sont en cours de développement d’un circuit à base du GaN sur substrat en Si pour faible cout, une hautes performance et une grande fiabilité. La technologie GaN est assez mature pour proposer de nouveaux systèmes intégrés utilisés pour les puissances microonde ce qui permet une réduction considérable de la taille du système. Étant un semiconducteur à grande bande interdite, GaN peut offrir une haute puissance sous hautes températures (>225oC) avec une bonne stabilité mécanique. Elle présente un facteur de bruit faible, qui est intéressant notamment pour les circuits intégrés aux ondes millimétriques. À noter que la mobilité du GaN par rapport à la température est assez élevée pour proposer des amplificateurs dans la bande W. Avec le progrès du procédé de fabrication du GaN, notre objectif est l’introduction de cette technologie dans des applications industrielles. À cette fin, on désire avoir un modèle du dispositif qui correspond à la meilleure performance. Ensuite, on veut le valider dans une modélisation du circuit. Cette thèse, basée sur la technologie GaN unique développée au 3IT, a pour objectif l’amélioration de l’outil de conception en réduisant son erreur avec une validation de son utilisation dans la conception du circuit. Ce travail est réalisé pour la première fois au 3IT avec des résultats de simulation pour une conception idéale d’un circuit MMIC ainsi que sa démonstration. Une caractérisation des échantillons a été réalisée avec objectif d’extraction de données qui vont servir à l’alimentation de modélisation des transistors sur l’outil ADS. Une fois complétée, la modélisation a été validée par une modélisation des petits et grands signaux et a été testée par une mesure load-pull. Enfin, ce modèle a été utilisé lors de la conception d’un amplificateur pour les applications RF. L’innovation de ce travail réside dans la modélisation de la résistance d’une grille large sous forme de quadripôles parallèles à structure 3D (ou à résistances de grille distribuées) du transistor MOSHEMT GaN. La conception et la fabrication de l’amplificateur à haute puissance (HPA) aux fréquences microondes (≤4GHz) sont réalisés au LNN du 3IT et inclus une couche d’oxyde de grille afin de réduire le courant de fuite notamment pour les tensions Vgs élevées, la grille du transistor forme un serpentin pour fournir une puissance de sortie élevée avec un encombrement spatial minimal et une grille présentant une électrode de champ pour permettre d’augmenter la tension de claquage.Abstract : The telecommunication and satellite industry is mainly relying on Si and GaAs technologies as the demand for a high data rate is continuously growing, leading to higher power consumption. Moreover, the lower frequency band's saturation, the need for high data rate, and high-power force to utilize the high-frequency band. In pursuit of solving the issues mentioned earlier, GaN technology has been introduced as a promising candidate that can offer high power at a smaller circuit footprint and higher mechanical stability in harsh environments. For example, currently, the European space agency (ESA) is developing an integrated circuit with GaN on Si substrate for low cost, high performance, and high reliability. GaN technology is sufficiently mature to propose integrated new systems which are needed for microwave power range. This technology reduces the size of the system considerably. GaN is a wide bandgap semiconductor which can offer remarkably high power at high temperature (>225℃), and it is very stable mechanically. It presents a low noise factor, very interesting for a millimeter-wave integrated circuit. Finally, the mobility of GaN vs. temperature is sufficiently elevated to propose a power amplifier in W-Band. With the improvement of the GaN process, our objective is to introduce this technology for industrial applications. For this purpose, we wish to have a better model of the device that corresponds to the best performance and then validate it by using this model in a circuit. Based on the 3IT's GaN process, which is unique in its context, this thesis aims to improve the design kit by reducing the design model's error and validating it by using it in circuit design. This work is the first to realize in 3IT with simulation results to design an MMIC circuit for demonstration. I first characterized the new samples by performing different measurements than using these measurement data; transistor is modeled in ADS software. Once the model was completed, it is validated by small-signal modeling, and then the large-signal model is tested with non-linear capacitances, current source, and transconductance modeling. Finally, we used this model to design a power amplifier for RF application. The innovation comes from modeling large gate resistance as distributed gate resistance for GaN MOSHEMT transistor and then designing high-power amplifier (HPA) in the frequency range (≤ 4GHz) while using 3IT GaN process which includes first oxide layer to have low gate current and more voltage of Vgs, the second transistor is meander to have high power and third, field plate - gate for high breakdown voltage

Compact Models for Integrated Circuit Design

This modern treatise on compact models for circuit computer-aided design (CAD) presents industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor (MOS) field-effect-transistors (FETs), FinFETs, and tunnel field-effect transistors (TFETs), along with statistical MOS models. Featuring exercise problems at the end of each chapter and extensive references at the end of the book, the text supplies fundamental and practical knowledge necessary for efficient integrated circuit (IC) design using nanoscale devices. It ensures even those unfamiliar with semiconductor physics gain a solid grasp of compact modeling concepts

Efficient Procedure Improving Precision of High Conditioned Matrices in Electronic Circuits Analysis

In this article, we propose several improvements that could be done to SPICE simulator. The first is based on a functional implementation of device models. The advantages of functional implementation are demonstrated on basic Shichman-Hodges model of MOS transistor. It starts with a description of primary algorithms used in SPICE simulator for the solution of circuits with nonlinear devices and identify the problems that can occur during simulations.Main part of the article is devoted to improved factorization procedure for simulation of the nonlinear electronic circuits. The primary intention of the proposed method is to increase final precision of the result in a case of high condition linear systems. The procedure is based on a use of the iterative methods for solution of nonlinear and linear equations. Utilizing those methods for one iterative process helps to reduce memory consumption during simulation computation, and it can significantly improve simulation precision. The procedure allows to use enumeration with definable precision in a very efficient way