실시간 근거리 영상화를 위한 MIMO 역합성 개구 레이더 시스템

학위논문(박사) -- 서울대학교대학원 : 공과대학 전기·정보공학부, 2022. 8. 남상욱.Microwave and millimeter wave (micro/mmW) imaging systems have advantages over other imaging systems in that they have penetration properties over non-metallic structures and non-ionization. However, these systems are commercially applicable in limited areas. Depending on the quality and size of the images, a system can be expensive and images cannot be provided in real-time. To overcome the challenges of the current micro/mmW imaging system, it is critical to suggest a new system concept and prove its potential benefits and hazards by demonstrating the testbed. This dissertation presents Ku1DMIC, a wide-band micro/mmW imaging system using Ku-band and 1D-MIMO array, which can overcome the challenges above. For cost-effective 3D imaging capabilities, Ku1DMIC uses 1D-MIMO array configuration and inverse synthetic aperture radar (ISAR) technique. At the same time, Ku1DMIC supports real-time data acquisition through a system-level design of a seamless interface with frequency modulated continuous wave (FMCW) radar. To show the feasibility of 3D imaging with Ku1DMIC and its real-time capabilities, an accelerated imaging algorithm, 1D-MIMO-ISAR RSA, is proposed and demonstrated. The detailed contributions of the dissertation are as follows. First, this dissertation presents Ku1DMIC – a Ku-band MIMO frequency-modulated continuous-wave (FMCW) radar experimental platform with real-time 2D near-field imaging capabilities. The proposed system uses Ku-band to cover the wider illumination area given the limited number of antennas and uses a fast ramp and wide-band FMCW waveform for rapid radar data acquisition while providing high-resolution images. The key design aspect behind the platform is stability, reconfigurability, and real-time capabilities, which allows investigating the exploration of the system’s strengths and weaknesses. To satisfy the design aspect, a digitally assisted platform is proposed and realized based on an AMD-Xilinx UltraScale+ Radio Frequency System on Chip (RFSoC). The experimental investigation for real-time 2D imaging has proved the ability of video-rate imaging at around 60 frames per second. Second, a waveform digital pre-distortion (DPD) method and calibration method are proposed to enhance the image quality. Even if a clean FMCW waveform is generated with the aid of the optimized waveform generator, the signal will inevitably suffer from distortion, especially in the RF subsystem of the platform. In near-field imaging applications, the waveform DPD is not effective at suppressing distortion in wide-band FMCW radar systems. To solve this issue, the LO-DPD architecture and binary search based DPD algorithm are proposed to make the waveform DPD effective in Ku1DMIC. Furthermore, an image-domain optimization correction method is proposed to compensate for the remaining errors that cannot be eliminated by the waveform DPD. For robustness to various unwanted signals such as noise and clutter signals, two regularized least squares problems are applied and compared: the generalized Tikhonov regularization and the total variation (TV) regularization. Through various 2D imaging experiments, it is confirmed that both methods can enhance the image quality by reducing the sidelobe level. Lastly, the research is conducted to realize real-time 3D imaging by applying the ISAR technique to Ku1DMIC. The realization of real-time 3D imaging using 1D-MIMO array configuration is impactful in that this configuration can significantly reduce the costs of the 3D imaging system and enable imaging of moving objects. To this end, the signal model for the 1D-MIMO-ISAR configuration is presented, and then the 1D-MIMO-ISAR range stacking algorithm (RSA) is proposed to accelerate the imaging reconstruction process. The proposed 1D-MIMO-ISAR RSA can reconstruct images within hundreds of milliseconds while maintaining almost the same image quality as the back-projection algorithm, bringing potential use for real-time 3D imaging. It also describes strategies for setting ROI, considering the real-world situations in which objects enter and exit the field of view, and allocating GPU memory. Extensive simulations and experiments have demonstrated the feasibility and potential benefits of 1D-MIMO-IASR configuration and 1D-MIMO-ISAR RSA.마이크로파 및 밀리미터파(micro/mmW) 영상화 시스템은 비금속 구조 및 비이온화에 비해 침투 특성이 있다는 점에서 다른 이미징 시스템에 비해 장점이 있다. 그러나 이러한 시스템은 제한된 영역에서만 상업적으로 적용되고 있다. 이미지의 품질과 크기에 따라 시스템이 매우 고가일 수 있으며 이미지를 실시간으로 제공할 수 없는 현황이다. 현재의 micro/mmW 이미징 시스템의 문제를 극복하려면 새로운 시스템 개념을 제안하고 테스트베드를 시연하여 잠재적인 이점과 위험을 입증하는 것이 중요하다. 본 논문에서는 Ku-band와 1D-MIMO 어레이를 이용한 광대역 micro/mmW 이미징 시스템인 Ku1DMIC를 제안하여 위와 같은 문제점을 극복할 수 있다. 비용 효율적인 3차원 영상화 기능을 위해 Ku1DMIC는 1D-MIMO 배열 기술과 ISAR(Inverse Synthetic Aperture Radar) 기술을 사용한다. 동시에 Ku1DMIC는 주파수 변조 연속파 (FMCW) 레이더와의 원활한 인터페이스의 시스템 수준 설계를 통해 실시간 데이터 수집을 지원한다. Ku1DMIC를 사용한 3차원 영상화의 구현 및 실시간 기능의 가능성을 보여주기 위해, 2차원 영상화를 위한 1D-MIMO RSA과 3차원 영상화를 위한 1D-MIMO-ISAR RSA가 제안되고 Ku1DMIC에서 구현된다. 따라서, 본 학위 논문의 주요 기여는 Ku-band 1D-MIMO 배열 기반 영상화 시스템 프로토타입을 개발 및 테스트하고, ISAR 기반 3차원 영상화 기능을 검사하고, 실시간 3차원 영상화 가능성을 조사하는 것이다. 이에 대한 세부적인 기여 항목은 다음과 같다. 첫째, 실시간 2D 근거리장 이미징 기능을 갖춘 Ku 대역 MIMO 주파수 변조 연속파(FMCW) 레이더 실험 플랫폼인 Ku1DMIC를 제시한다. 제안하는 시스템은 제한된 수의 안테나에서 더 넓은 조명 영역을 커버하기 위해 Ku 대역을 사용하고 고해상도 이미지를 제공하면서 빠른 레이더 데이터 수집을 위해 고속 램프 및 광대역 FMCW 파형을 사용한다. 플랫폼의 핵심 설계 원칙은 안정성, 재구성 가능성 및 실시간 기능으로 시스템의 강점과 약점을 광범위하게 탐색한다. 설계 원칙을 만족시키기 위해 AMD-Xilinx UltraScale+ RFSoC(Radio Frequency System on Chip)를 기반으로 디지털 지원 플랫폼을 제안하고 구현한다. 실시간 2D 이미징에 대한 실험적 조사는 초당 약 60프레임에서 비디오 속도 이미징의 능력을 입증했다. 둘째, 영상 품질 향상을 위한 파형 디지털 전치왜곡(DPD) 방법과 보정 방법을 제안한다. 최적화된 파형 발생기의 도움으로 깨끗한 FMCW 파형이 생성되더라도 특히 플랫폼의 RF 하위 시스템에서 신호는 필연적으로 왜곡을 겪게된다. 근거리 영상화 응용 분야에서는 파형 DPD는 광대역 FMCW 레이더 시스템의 왜곡을 억제하는 데 효과적이지 않다. 이 문제를 해결하기 위해 Ku1DMIC에서 파형 DPD가 유효하도록 LO-DPD 아키텍처와 이진 탐색 기반 DPD 알고리즘을 제안한다. 또한, 파형 DPD로 제거할 수 없는 나머지 오류를 보상하기 위해 이미지 영역 최적화 보정 방법을 제안한다. 노이즈 및 클러터 신호와 같은 다양한 원치 않는 신호에 대한 견고성을 위해 일반화된 Tikhonov 정규화 및 전체 변동(TV) 정규화라는 두 가지 정규화된 최소 자승 문제를 적용 후 비교한다. 다양한 2차원 영상화 실험을 통해 두 방법 모두 부엽 레벨을 줄여 화질을 향상시킬 수 있음을 확인한다. 마지막으로, ISAR 기법을 2차원 영상 플랫폼에 적용하여 실시간 3차원 영상을 구현하기 위한 연구를 진행한다. 1D-MIMO-ISAR 구성에서 실시간 3D 이미징의 구현은 이러한 구성이 3D 이미징 시스템의 비용을 크게 줄일 수 있다는 점에서 영향력이 있다. 따라서 이 논문에서는 1D-MIMO-ISAR 구성에 대한 이미징 재구성을 가속화하기 위해 1D-MIMO-ISAR 범위 스태킹 알고리즘(RSA)을 제안한다. 제안된 1D-MIMO-ISAR RSA는 널리 알려진 Back-Projection 알고리즘과 거의 동일한 이미지 품질을 유지하면서도 수백 밀리초 이내에 이미지를 재구성함으로써 실시간 영상화에 대한 가능성을 보여준다. 또한 물체가 시야에 들어오고 나가는 실제 상황을 고려하기 위한 ROI 설정, 그리고 메모리 할당에 대한 전략을 설명한다. 광범위한 시뮬레이션과 실험을 통해 1D-MIMO-IASR 구성 및 1D-MIMO-ISAR RSA의 가능성과 잠재적 이점을 확인한다.1 INTRODUCTION 1 1.1 Microwave and millimeter-wave imaging 1 1.2 Imaging with radar system 2 1.3 Challenges and motivation 5 1.4 Outline of the dissertation 8 2 FUNDAMENTAL OF TWO-DIMENSIONAL IMAGING USING A MIMO RADAR 9 2.1 Signal model 9 2.2 Consideration of waveform 12 2.3 Image reconstruction algorithm 16 2.3.1 Back-projection algorithm 16 2.3.2 1D-MIMO range-migration algorithm 20 2.3.3 1D-MIMO range stacking algorithm 27 2.4 Sampling criteria and resolution 31 2.5 Simulation results 36 3 MIMO-FMCW RADAR IMPLEMENTATION WITH 16 TX - 16 RX ONE- DIMENSIONAL ARRAYS 46 3.1 Wide-band FMCW waveform generator architecture 46 3.2 Overall system architecture 48 3.3 Antenna and RF transceiver module 53 3.4 Wide-band FMCW waveform generator 55 3.5 FPGA-based digital hardware design 63 3.6 System integration and software design 71 3.7 Testing and measurement 75 3.7.1 Chirp waveform measurement 75 3.7.2 Range profile measurement 77 3.7.3 2-D imaging test 79 4 METHODS OF IMAGE QUALITY ENHANCEMENT 84 4.1 Signal model 84 4.2 Digital pre-distortion of chirp signal 86 4.2.1 Proposed DPD hardware system 86 4.2.2 Proposed DPD algorithm 88 4.2.3 Measurement results 90 4.3 Robust calibration method for signal distortion 97 4.3.1 Signal model 98 4.3.2 Problem formulation 99 4.3.3 Measurement results 105 5 THREE-DIMENSIONAL IMAGING USING 1-D ARRAY SYSTEM AND ISAR TECHNIQUE 110 5.1 Formulation for 1D-MIMO-ISAR RSA 111 5.2 Algorithm implementation 114 5.3 Simulation results 120 5.4 Experimental results 122 6 CONCLUSIONS AND FUTURE WORK 127 6.1 Conclusions 127 6.2 Future work 129 6.2.1 Effects of antenna polarization in the Ku-band 129 6.2.2 Forward-looking near-field ISAR configuration 130 6.2.3 Estimation of the movement errors in ISAR configuration 131 Abstract (In Korean) 145 Acknowlegement 148박

Efficient and Robust Simulation, Modeling and Characterization of IC Power Delivery Circuits

As the Moore’s Law continues to drive IC technology, power delivery has become one of the most difficult design challenges. Two of the major components in power delivery are DC-DC converters and power distribution networks, both of which are time-consuming to simulate and characterize using traditional approaches. In this dissertation, we propose a complete set of solutions to efficiently analyze DC-DC converters and power distribution networks by finding a perfect balance between efficiency and accuracy. To tackle the problem, we first present a novel envelope following method based on a numerically robust time-delayed phase condition to track the envelopes of circuit states under a varying switching frequency. By adopting three fast simulation techniques, our proposed method achieves higher speedup without comprising the accuracy of the results. The robustness and efficiency of the proposed method are demonstrated using several DCDC converter and oscillator circuits modeled using the industrial standard BSIM4 transistor models. A significant runtime speedup of up to 30X with respect to the conventional transient analysis is achieved for several DC-DC converters with strong nonlinear switching characteristics. We then take another approach, average modeling, to enhance the efficiency of analyzing DC-DC converters. We proposed a multi-harmonic model that not only predicts the DC response but also captures the harmonics of arbitrary degrees. The proposed full-order model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. Furthermore, by continuously monitoring state variables, our model seamlessly transitions between continuous conduction mode and discontinuous conduction mode. The proposed model, when tested with a system decoupling technique, obtains up to 10X runtime speedups over transistor-level simulations with a maximum output voltage error that never exceeds 4%. Based on the multi-harmonic averaged model, we further developed the small-signal model that provides a complete characterization of both DC averages and higher-order harmonic responses. The proposed model captures important high-frequency overshoots and undershoots of the converter response, which are otherwise unaccounted for by the existing techniques. In two converter examples, the proposed model corrects the misleading results of the existing models by providing the truthful characterization of the overall converter AC response and offers important guidance for converter design and closed-loop control. To address the problem of time-consuming simulation of power distribution networks, we present a partition-based iterative method by integrating block-Jacobi method with support graph method. The former enjoys the ease of parallelization, however, lacks a direct control of the numerical properties of the produced partitions. In contrast, the latter operates on the maximum spanning tree of the circuit graph, which is optimized for fast numerical convergence, but is bottlenecked by its difficulty of parallelization. In our proposed method, the circuit partitioning is guided by the maximum spanning tree of the underlying circuit graph, offering essential guidance for achieving fast convergence. The resulting block-Jacobi-like preconditioner maximizes the numerical benefit inherited from support graph theory while lending itself to straightforward parallelization as a partitionbased method. The experimental results on IBM power grid suite and synthetic power grid benchmarks show that our proposed method speeds up the DC simulation by up to 11.5X over a state-of-the-art direct solver

Efficient and Robust Simulation, Modeling and Characterization of IC Power Delivery Circuits

As the Moore’s Law continues to drive IC technology, power delivery has become one of the most difficult design challenges. Two of the major components in power delivery are DC-DC converters and power distribution networks, both of which are time-consuming to simulate and characterize using traditional approaches. In this dissertation, we propose a complete set of solutions to efficiently analyze DC-DC converters and power distribution networks by finding a perfect balance between efficiency and accuracy. To tackle the problem, we first present a novel envelope following method based on a numerically robust time-delayed phase condition to track the envelopes of circuit states under a varying switching frequency. By adopting three fast simulation techniques, our proposed method achieves higher speedup without comprising the accuracy of the results. The robustness and efficiency of the proposed method are demonstrated using several DCDC converter and oscillator circuits modeled using the industrial standard BSIM4 transistor models. A significant runtime speedup of up to 30X with respect to the conventional transient analysis is achieved for several DC-DC converters with strong nonlinear switching characteristics. We then take another approach, average modeling, to enhance the efficiency of analyzing DC-DC converters. We proposed a multi-harmonic model that not only predicts the DC response but also captures the harmonics of arbitrary degrees. The proposed full-order model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. Furthermore, by continuously monitoring state variables, our model seamlessly transitions between continuous conduction mode and discontinuous conduction mode. The proposed model, when tested with a system decoupling technique, obtains up to 10X runtime speedups over transistor-level simulations with a maximum output voltage error that never exceeds 4%. Based on the multi-harmonic averaged model, we further developed the small-signal model that provides a complete characterization of both DC averages and higher-order harmonic responses. The proposed model captures important high-frequency overshoots and undershoots of the converter response, which are otherwise unaccounted for by the existing techniques. In two converter examples, the proposed model corrects the misleading results of the existing models by providing the truthful characterization of the overall converter AC response and offers important guidance for converter design and closed-loop control. To address the problem of time-consuming simulation of power distribution networks, we present a partition-based iterative method by integrating block-Jacobi method with support graph method. The former enjoys the ease of parallelization, however, lacks a direct control of the numerical properties of the produced partitions. In contrast, the latter operates on the maximum spanning tree of the circuit graph, which is optimized for fast numerical convergence, but is bottlenecked by its difficulty of parallelization. In our proposed method, the circuit partitioning is guided by the maximum spanning tree of the underlying circuit graph, offering essential guidance for achieving fast convergence. The resulting block-Jacobi-like preconditioner maximizes the numerical benefit inherited from support graph theory while lending itself to straightforward parallelization as a partitionbased method. The experimental results on IBM power grid suite and synthetic power grid benchmarks show that our proposed method speeds up the DC simulation by up to 11.5X over a state-of-the-art direct solver

Scalable Analysis, Verification and Design of IC Power Delivery

Due to recent aggressive process scaling into the nanometer regime, power delivery network design faces many challenges that set more stringent and specific requirements to the EDA tools. For example, from the perspective of analysis, simulation efficiency for large grids must be improved and the entire network with off-chip models and nonlinear devices should be able to be analyzed. Gated power delivery networks have multiple on/off operating conditions that need to be fully verified against the design requirements. Good power delivery network designs not only have to save the wiring resources for signal routing, but also need to have the optimal parameters assigned to various system components such as decaps, voltage regulators and converters. This dissertation presents new methodologies to address these challenging problems. At first, a novel parallel partitioning-based approach which provides a flexible network partitioning scheme using locality is proposed for power grid static analysis. In addition, a fast CPU-GPU combined analysis engine that adopts a boundary-relaxation method to encompass several simulation strategies is developed to simulate power delivery networks with off-chip models and active circuits. These two proposed analysis approaches can achieve scalable simulation runtime. Then, for gated power delivery networks, the challenge brought by the large verification space is addressed by developing a strategy that efficiently identifies a number of candidates for the worst-case operating condition. The computation complexity is reduced from O(2^N) to O(N). At last, motivated by a proposed two-level hierarchical optimization, this dissertation presents a novel locality-driven partitioning scheme to facilitate divide-and-conquer-based scalable wire sizing for large power delivery networks. Simultaneous sizing of multiple partitions is allowed which leads to substantial runtime improvement. Moreover, the electric interactions between active regulators/converters and passive networks and their influences on key system design specifications are analyzed comprehensively. With the derived design insights, the system-level co-design of a complete power delivery network is facilitated by an automatic optimization flow. Results show significant performance enhancement brought by the co-design

The Astrophysical Multipurpose Software Environment

We present the open source Astrophysical Multi-purpose Software Environment (AMUSE, www.amusecode.org), a component library for performing astrophysical simulations involving different physical domains and scales. It couples existing codes within a Python framework based on a communication layer using MPI. The interfaces are standardized for each domain and their implementation based on MPI guarantees that the whole framework is well-suited for distributed computation. It includes facilities for unit handling and data storage. Currently it includes codes for gravitational dynamics, stellar evolution, hydrodynamics and radiative transfer. Within each domain the interfaces to the codes are as similar as possible. We describe the design and implementation of AMUSE, as well as the main components and community codes currently supported and we discuss the code interactions facilitated by the framework. Additionally, we demonstrate how AMUSE can be used to resolve complex astrophysical problems by presenting example applications.Comment: 23 pages, 25 figures, accepted for A&

Design control and implementation of a four-leg matrix converter for ground power supply application

The technology of direct AC/AC power conversion (Matrix Converters) is gaining increasing interest in the scientific community, particularly for aerospace applications. The aim of this research project is to investigate the use of direct AC/AC three phase four-leg Matrix Converter as ground power unit to supply aircraft with power during stopover or maintenance in airports. The converter fourth leg is used to provide a path for the zero sequence components when feeding unbalanced or non-linear loads. A high bandwidth controller is required to regulate the output voltage of Matrix Converter with a 400Hz output frequency. However, the controller bandwidth is limited due to the reduced ratio between the converter switching frequency and the fundamental frequency. In this case undesirable, periodic errors and distortion will exist in the output voltage above all in the presence of a non-linear or unbalanced load. Digital repetitive control system is proposed to regulate the output voltage of a four-leg Matrix Converter in an ABC reference frame. The proposed control structure introduces a high gain at the fundamental and its integer multiple frequencies. Using the proposed repetitive controller will reduce the tracking error between the output and the reference voltage, as well as increasing the stability of the converter under balanced and unbalanced load conditions. Simulation studies using SABER and MATLAB software packages show that the proposed controller is able to regulate the output voltage during balanced and unbalanced load conditions and during the presence of non-linear load. In order to validate the effectiveness of the proposed controller, an experimental prototype of a 7.5KW has been implemented in PEMC laboratory using DSP/FPGA platform to control the converter prototype. The steady state and the dynamic performance of the proposed control strategy are investigated in details, and extensive experimental tests have showed that the proposed controller was able to offer high tracking accuracy, fast transient response and able to regulate the output voltage during balanced, unbalanced and non-linear loading

Design control and implementation of a four-leg matrix converter for ground power supply application

The technology of direct AC/AC power conversion (Matrix Converters) is gaining increasing interest in the scientific community, particularly for aerospace applications. The aim of this research project is to investigate the use of direct AC/AC three phase four-leg Matrix Converter as ground power unit to supply aircraft with power during stopover or maintenance in airports. The converter fourth leg is used to provide a path for the zero sequence components when feeding unbalanced or non-linear loads. A high bandwidth controller is required to regulate the output voltage of Matrix Converter with a 400Hz output frequency. However, the controller bandwidth is limited due to the reduced ratio between the converter switching frequency and the fundamental frequency. In this case undesirable, periodic errors and distortion will exist in the output voltage above all in the presence of a non-linear or unbalanced load. Digital repetitive control system is proposed to regulate the output voltage of a four-leg Matrix Converter in an ABC reference frame. The proposed control structure introduces a high gain at the fundamental and its integer multiple frequencies. Using the proposed repetitive controller will reduce the tracking error between the output and the reference voltage, as well as increasing the stability of the converter under balanced and unbalanced load conditions. Simulation studies using SABER and MATLAB software packages show that the proposed controller is able to regulate the output voltage during balanced and unbalanced load conditions and during the presence of non-linear load. In order to validate the effectiveness of the proposed controller, an experimental prototype of a 7.5KW has been implemented in PEMC laboratory using DSP/FPGA platform to control the converter prototype. The steady state and the dynamic performance of the proposed control strategy are investigated in details, and extensive experimental tests have showed that the proposed controller was able to offer high tracking accuracy, fast transient response and able to regulate the output voltage during balanced, unbalanced and non-linear loading

A two teraflop swarm

© 2018 Jones, Studley, Hauert and Winfield. We introduce the Xpuck swarm, a research platform with an aggregate raw processing power in excess of two teraflops. The swarm uses 16 e-puck robots augmented with custom hardware that uses the substantial CPU and GPU processing power available from modern mobile system-on-chip devices. The augmented robots, called Xpucks, have at least an order of magnitude greater performance than previous swarm robotics platforms. The platform enables new experiments that require high individual robot computation and multiple robots. Uses include online evolution or learning of swarm controllers, simulation for answering what-if questions about possible actions, distributed super-computing for mobile platforms, and real-world applications of swarm robotics that requires image processing, or SLAM. The teraflop swarm could also be used to explore swarming in nature by providing platforms with similar computational power as simple insects. We demonstrate the computational capability of the swarm by implementing a fast physics-based robot simulator and using this within a distributed island model evolutionary system, all hosted on the Xpucks