Cache designs for reliable hybrid high and ultra-low voltage operation

Increasing demand for implementing highly-miniaturized battery-powered ultra-low-cost systems (e.g., below 1 USD) in emerging applications such as body, urban life and environment monitoring, etc., has introduced many challenges in the chip design. Such applications require high performance occasionally, but very little energy consumption during most of the time in order to extend battery lifetime. In addition, they require real-time guarantees. The most suitable technological solution for those devices consists of using hybrid processors able to operate at: (i) high voltage to provide high performance and (ii) near-/sub-threshold (NST) voltage to provide ultra-low energy consumption. However, the most efficient SRAM memories for each voltage level differ and it is mandatory trading off different SRAM designs, especially in cache memories, which occupy most of the processor¿s area. In this Thesis, we analyze the performance/power tradeoffs involved in the design of SRAM L1 caches for reliable hybrid high and NST Vcc operation from a microarchitectural perspective. We develop new, simple, single-Vcc domain hybrid cache architectures and data management mechanisms that satisfy all stringent needs of our target market. Proposed solutions are shown to have high energy efficiency with negligible impact on average performance while maintaining strong performance guarantees as required for our target market

PERCEPTION OF ENTREPRENEURS REGARDING BUSINESS ENVIRONMENT IN MONTENEGRO: REGIONAL ANALYSIS

The goal of this work is to analyze the economic ambient by entrepreneurs through the identification of the most significant barriers exerting influences on the development of business in Montenegro. For the needs of researching, the questionnaire was created consisting of 30 questions, including five groups of barriers. The questionnaire was filled in by 102 business people with their main offices in Montenegro. Collected data were processed by means of the statistical processing data program SPSS20. The descriptive analysis was used with a view of getting the hierarchy of observed barriers, while the one-way analysis of variance (ANOVA) was used for determining statistically significant differences regarding to observed barriers by entrepreneurs classified into three geographical regions (maritime, central and northern). Financial resources, procedures in the local competence and centralized procedures were recognized by entrepreneurs as barriers of the greatest importance on entrepreneurial development. Statistically significant differences between the observed barriers by entrepreneurs in three geographical regions appeared in case of development inequality of regions and administrative procedures in employment

Efficient cache architectures for reliable hybrid voltage operation using EDC codes

Semiconductor technology evolution enables the design of sensor-based battery-powered ultra-low-cost chips (e.g., below 1 p) required for new market segments such as body, urban life and environment monitoring. Caches have been shown to be the highest energy and area consumer in those chips. This paper proposes a novel, hybrid-operation (high Vcc, ultra-low Vcc), single-Vcc domain cache architecture based on replacing energy-hungry bitcells (e.g., 10T) by more energy-efficient and smaller cells (e.g., 8T) enhanced with Error Detection and Correction (EDC) features for high reliability and performance predictability. Our architecture is proven to largely outperform existing solutions in terms of energy and area.Postprint (author’s final draft

Synthesis of vinyldihydropyran by cooperative catalysis

Delta(5)-Unsaturated aldehydes with a suitably positioned allylic halide, or phosphate, leaving group undergo doubly-catalyzed cyclization to give dihydropyran derivatives. The cyclization proceeds under the synergetic action of diazabicycloundecene and Pd(PPh3)(4). This type of transformation was also accomplished with an aryl ketone

Typical course of cystinuria leading to untypical complications in pregnancy: A case report and review of literature

Cystinuria is a rare genetic disorder inherited by an autosomal recessive pattern which affects the transmembrane transporter for the base amino acid cystine. It has a general prevalence of 1 in 7000 with demographic variations. Patients with cystinuria have excessive urinary excretion of cystine, which can lead to the formation of stones. Up to 70% of patients will develop chronic kidney disease that can progress even to end-stage renal disease. Symptoms usually start in the first two decades of life with a typical presentation consisting of flank pain and renal colic, usually accompanied by urinary tract infection and deterioration of kidney function. Men are typically affected twice as often as women and have a more severe clinical course. Diagnosis is made by spectrophotometric analysis of the stones that are collected after spontaneous expulsion or medical intervention. Genetic testing is not mandatory but is recommended in uncertain cases or as a part of genetic counseling. Treatment consists of diet modification, alkalization of urine, and thiol-based therapies if other measures fail to prevent stone formation. In pregnancy, cystinuria with the formation of cystine stones represents a therapeutic challenge and requires a multidisciplinary approach consisting of an uro-nephrology team and a gynecologist. We present the case of a 34-year-old woman with cystinuria on whom the diagnosis was made by analysis of the expulsed stone. While her previous pregnancies were without complications, her third pregnancy was accompanied by frequent urinary tract infections, acute worsening of kidney function, and urological interventions during pregnancy due to the formation of new stones. Despite the complicated course, the pregnancy was successfully carried to term with the delivery of a healthy female child

PESFOR-W: Improving the design and environmental effectiveness of woodlands for water Payments for Ecosystem Services

ABSTRACT: The EU Water Framework Directive aims to ensure restoration of Europe?s water bodies to ?good ecological status? by 2027. Many Member States will struggle to meet this target, with around half of EU river catchments currently reporting below standard water quality. Diffuse pollution from agriculture represents a major pressure, affecting over 90% of river basins. Accumulating evidence shows that recent improvements to agricultural practices are benefiting water quality but in many cases will be insufficient to achieve WFD objectives. There is growing support for land use change to help bridge the gap, with a particular focus on targeted tree planting to intercept and reduce the delivery of diffuse pollutants to water. This form of integrated catchment management offers multiple benefits to society but a significant cost to landowners and managers. New economic instruments, in combination with spatial targeting, need to be developed to ensure cost effective solutions - including tree planting for water benefits - are realised. Payments for Ecosystem Services (PES) are flexible, incentive-based mechanisms that could play an important role in promoting land use change to deliver water quality targets. The PESFOR-W COST Action will consolidate learning from existing woodlands for water PES schemes in Europe and help standardize approaches to evaluating the environmental effectiveness and cost-effectiveness of woodland measures. It will also create a European network through which PES schemes can be facilitated, extended and improved, for example by incorporating other ecosystem services linking with aims of the wider forestscarbon policy nexus

Efficient cache architectures for reliable hybrid voltage operation using EDC codes

Semiconductor technology evolution enables the design of sensor-based battery-powered ultra-low-cost chips (e.g., below 1 p) required for new market segments such as body, urban life and environment monitoring. Caches have been shown to be the highest energy and area consumer in those chips. This paper proposes a novel, hybrid-operation (high Vcc, ultra-low Vcc), single-Vcc domain cache architecture based on replacing energy-hungry bitcells (e.g., 10T) by more energy-efficient and smaller cells (e.g., 8T) enhanced with Error Detection and Correction (EDC) features for high reliability and performance predictability. Our architecture is proven to largely outperform existing solutions in terms of energy and area

APPLE: Adaptive performance-predictable low-energy caches for reliable hybrid voltage operation

Semiconductor technology evolution enables the design of resource-constrained battery-powered ultra-low-cost chips required for new market segments such as environment, urban life and body monitoring. Caches have been shown to be the main energy and area consumer in those chips. This paper proposes simple, hybrid-operation (high Vcc, ultra-low Vcc), single-Vcc domain Adaptive Performance- Predictable Low-Energy (APPLE) L1 cache designs based on replacing energy-hungry SRAM cells by more energy-efficient and smaller cells enhanced with extra cache lines set up in an adapted victim cache to still enable strong performance guarantees. APPLE caches are proven to largely outperform existing solutions in terms of energy and area efficiency.Postprint (published version