Impacto del tratamiento sustitutivo renal en la atención especializada como modelo de análisis integrado en la gestión de pacientes crónicos

Tesis doctoral inédita leída en la Universidad Autónoma de Madrid, Facultad de Medicina, Departamento de Medicina. Fecha de lectura: 18-11-201

Exploring the relationship between interparental conflict and emotional security: what happens with adolescents in residential care compared to those living with their families?

[Abstract] The effect of interparental conflict (IPC) on adolescents has captured the attention of researchers for the last decades, but the study of the effect of IPC on the emotional security of adolescents in residential care (RC) based on Emotional Security Theory (EST) is limited. In this study, we examined adolescents' emotional security and insecurity (preoccupation and disengagement) determined by dimensions of IPC. Participants were 917 Spanish adolescents (Mean age = 15.07 years, SD = 1.75), 51% girls and 49% boys, divided in two subsamples: 171 adolescents living in RC and 746 adolescents living with their families (F). We used the Children's Perception of Interparental Conflict Scale (CPIC) to explore interparental conflict dimensions, and the Security in the Family System Scale (SIFS) to analyze adolescents' emotional security in the family. Results showed that females perceived higher conflict and threat, and were more disengaged than males. Males self-blamed more and were more emotionally secure than females. Adolescents in RC perceived higher IPC, threat, and self-blame and were more insecure than adolescents F. Multigroup structural equation modeling comparing RC and F adolescents, and females and males showed similar causal negative relationships between conflict properties and security, and positive relationships between threat, disengagement and preoccupation. These results have implications for researchers and for practitioners when addressing family reunification for adolescents in RC or risks in community samples

Two-sample PLL with improved frequency response applied to single-phase current sensorless bridgeless PFCs

A new implementation of the recently proposed fixed-frequency two-sample (2S) quadrature generation subsystem (QSG) digital Phase Locked Loop PLL, applicable to single-phase Power Factor Correction (PFC), is proposed. Its characteristics are high accuracy and low computational burden. The proposed PLL includes a frequency feedback loop to improve the synchronization under line frequency variations. Its performance within a digital controller of a current sensorless bridgeless PFC is evaluated by simulations and experimentally. The obtained results are compared with previously published PLLs in the literature.This work has been supported by the Spanish Ministry of Economy and Competitiveness under grant TEC2014-52316-R ECOTREND Estimation and Optimal Control for Energy Conversion with Digital Devices

Performance analysis of 1ϕ T/4 PLLs with secondary control path in current sensorless bridgeless PFCs

New power factor correction (PFC) stages such as bridgeless converters and the associated current shaping techniques require grid synchronization to ensure unity Displacement Power Factor (DPF). Sensorless line current rebuilding algorithms also need synchronization with the line voltage to compensate at least for part of the current estimation error. The application of a secondary control path to reach faster and more robustly the proper operation point previously applied in single/three-phase PLLs in grid connected converters is here proposed for the current sensorless bridgeless PFCs. This work analyzes the performance of three single-phase T/4 PLL structures, first without secondary control path, and later with feedforward and feedback secondary control paths, both in simulation and experimentally, and evaluates their applicability to current sensorless digitally controlled single phase bridgeless PFCs based on the current rebuilding technique.This work has been supported by the Spanish Ministry of Economy and Competitiveness under grant TEC2014-52316-R ECOTREND Estimation and Optimal Control for Energy Conversion with Digital Devices

Improved noise immunity for two-sample PLL applicable to single-phase PFCs

Synchronization in a single-phase Power Factor Correction (PFC) is deteriorated, among others, by the combination of the noise introduced by the grid voltage sensing, conducted EMI, the ADC resolution and the sampling frequency used. Low signal-to-noise ratios (SNR) reduce the performance of the Two-Sample (2S) Phase Locked Loop (PLL). This effect can be compensated by including a smoothing filter action without increasing the overall complexity significantly. The resulting 2S with smoothing (2SS) is evaluated and validated by simulation and experimentally over a Totem Pole PFC.This work has been supported by the Spanish Ministry of Science and Innovation under Project RTI2018-095138-BC31 PEGIA - Power Electronics for the Grid and Industry Applications

Evaluation of quadrature signal generation methods with reduced computational resources for grid synchronization of single-phase power converters through phase-locked loops

Low-cost single-phase grid connected converters require synchronization with the grid voltage to obtain a better response and protection under diverse conditions, such as frequency perturbations and distortion. Phase-locked loops (PLLs) have been used in this scenario. This paper describes a set of quadrature signal generators for single-phase PLLs; compares the performances by means of simulation tests considering diverse operation conditions of the electrical grid; proposes strategies to reduce the computational burden, considering fixed-point digital implementations; and provides both descriptive and quantitative comparisons of the required mathematical operations and memory units for implementation of the analyzed single-phase PLLs.This work has been supported by the Spanish Ministry of Science and Innovation under Project RTI2018-095138-B-C31 PEGIA—Power Electronics for the Grid and Industry Applications

Two-sample PLL with harmonic filtering capability applicable to single-phase grid-connected converters

The two-sample phase locked loop (2S PLL) in single-phase digitally controlled grid-connected power converters provide synchronization with a minimal computational burden. However, the distortion of the grid voltage deteriorates the performance of the 2S quadrature signal generator. To solve this issue, this article introduces a harmonic filtering (HF) structure based on observers of the input voltage for the fundamental and selected harmonics. The stability and sensitivity of the 2S PLL with HF is analyzed. In comparison with second-order generalized integrator (SOGI)-based HF, the observers provide a narrower bandpass, and the subsequent deterioration of the response time is compensated by adapting the filter gains dynamically. The results obtained, both in simulation and experimentally, validate the proposal and compare its performance with other widely adopted PLLs providing harmonic rejection capability. The computational burden is analyzed and in the case of the proposals depends on the number of observers and the use or not of the adaptive strategy based on steepest descent.This work has been supported by the Spanish Ministry of Science and Innovation under Project RTI2018-095138-B-C31 PEGIA Power Electronics for the Grid and Industry Applications

Academic use of rapid prototyping in digitally controlled power factor correctors

The growing use of power converters connected to the grid motivates their study in power electronics courses and the prototype development in the degree final project (DFP). However, the practical realization of using state-of-the-art components and conversion techniques is complex due to the numerous multidisciplinary aspects that students must consider in its design and development and the workload associated with the DFP. An example of this is that, unlike a conventional power factor correction (PFC) design, the individual dedication of students to complete the design and validation of modern bridgeless PFC stages exceeds the number of credits of the DFP. The reason for this is that it includes system modeling, becoming familiar with the devices used, discrete selection, circuit design, control development, and programming, to build the converter and verify the operation of the complete system. To reinforce the individual skills needed for the DFP and reduce this time, a novel strategy is proposed. It allows the student to focus their efforts on integrating the individual skills achieved in the degree at the appropriate competence level during the modeling and construction of the power converter while carrying out part of the tasks out of the lab, if necessary, as was the case during the pandemic restrictions. For this, the rapid prototyping technique is introduced to speed up the overall design and speed up the tuning of digital controllers. This manuscript presents a teaching experience in which students build digitally controlled power converters using Texas Instruments microcontroller boards and PLECS®. The example of a bridgeless totem-pole power factor corrector is shown. Although it began to develop and was motivated due to the restrictions during the COVID-19 pandemic, the experience has been verified and is maintained over time, successfully consolidating.This research was funded by the Spanish Ministry of Science and Innovation under Project PID2021-128941OB-I00 TRENTI–Efficient Energy Transformation in Industrial Environment

Türkiye: macro-financial situation

Rationale Türkiye is identified annually as a material country for the Spanish and euro area banking systems. Moreover, both are linked to Türkiye by major trade and financial flows. It is therefore important to monitor the country’s macro-financial situation and main weaknesses. Takeaways •The Turkish economy has continued to post very high, albeit slowing, inflation rates since late 2022, and economic activity has slowed, against a background of sizeable external financing needs, foreign currency debt and low international reserves. •Fiscal policy kept the country’s accounts healthy in 2022, although a significant downturn is expected in 2023. In terms of monetary policy, the Central Bank of the Republic of Türkiye cut the policy interest rate again in February, with the real interest rate standing at -35.2% in April. •The banking system remains healthy, although some indicators have worsened. Furthermore, to keep credit growth in check and encourage more widespread use of the lira in the financial system, the macroprudential and regulatory measures introduced in 2021 and 2022 remained in place and were strengthened

Medium-frequency electrical resistance sintering of oxidized C.P. iron powder

Commercially pure (C.P.) iron powders with a deliberate high degree of oxidation were consolidated by medium-frequency electrical resistance sintering (MF-ERS). This is a consolidation technique where pressure, and heat coming from a low-voltage and high-intensity electrical current, are simultaneously applied to a powder mass. In this work, the achieved densification rate is interpreted according to a qualitative microscopic model, based on the compacts global porosity and electrical resistance evolution. The effect of current intensity and sintering time on compacts was studied on the basis of micrographs revealing the porosity distribution inside the sintered compact. The microstructural characteristics of compacts consolidated by the traditional cold-press and furnace-sinter powder metallurgy route are compared with results of MF-ERS consolidation. The goodness of MF-ERS versus the problems of conventional sintering when working with oxidized powders is analyzed. The electrical consolidation can obtain higher densifications than the traditional route under non-reducing atmospheres.Ministerio de Economía y Competitividad DPI2015-69550-C2-1-PMinisterio de Economía y Competitividad DPI2015-69550-C2-2-