CABE : a cloud-based acoustic beamforming emulator for FPGA-based sound source localization

Microphone arrays are gaining in popularity thanks to the availability of low-cost microphones. Applications including sonar, binaural hearing aid devices, acoustic indoor localization techniques and speech recognition are proposed by several research groups and companies. In most of the available implementations, the microphones utilized are assumed to offer an ideal response in a given frequency domain. Several toolboxes and software can be used to obtain a theoretical response of a microphone array with a given beamforming algorithm. However, a tool facilitating the design of a microphone array taking into account the non-ideal characteristics could not be found. Moreover, generating packages facilitating the implementation on Field Programmable Gate Arrays has, to our knowledge, not been carried out yet. Visualizing the responses in 2D and 3D also poses an engineering challenge. To alleviate these shortcomings, a scalable Cloud-based Acoustic Beamforming Emulator (CABE) is proposed. The non-ideal characteristics of microphones are considered during the computations and results are validated with acoustic data captured from microphones. It is also possible to generate hardware description language packages containing delay tables facilitating the implementation of Delay-and-Sum beamformers in embedded hardware. Truncation error analysis can also be carried out for fixed-point signal processing. The effects of disabling a given group of microphones within the microphone array can also be calculated. Results and packages can be visualized with a dedicated client application. Users can create and configure several parameters of an emulation, including sound source placement, the shape of the microphone array and the required signal processing flow. Depending on the user configuration, 2D and 3D graphs showing the beamforming results, waterfall diagrams and performance metrics can be generated by the client application. The emulations are also validated with captured data from existing microphone arrays.</jats:p

Emulation of Circuits under Test Using Low-Cost Embedded Platforms

Electrical engineering education requires the development of the specific ability and skills to address the design and assembly of practical electronic circuits, as well as the use of advanced electronic instrumentation. However, for electronic instrumentation courses or any other related specialty that pursues to gain expertise testing a physical system, the circuit assembly process itself can represent a bottleneck in a practical session. The time dedicated to the circuit assembly is subtracted both to the measurements and the final decision-making time. Therefore, the student's practical experience is limited. This article presents a reconfigurable physical system based on the Arduino (TM) shield pin-out, which (after specific programming) can virtually behave as a device under test to carry out measurement procedures on it, emulating any system or process. Although it has been mainly oriented to the Arduino boards, it is possible to add different control devices with a connector compatible. The user does not need to assemble any circuit. Our approach does not only pursue the correct instrument handling as a goal, but it also immerses the student in the context of the functional theory of the proposed circuit under test. Consequently, the same emulation platform can be utilized for other techno-scientific specialties, such as electrical engineering, automatic control systems or physics courses. Besides that, it is a compact product that can be adapted to the needs of any teaching institution.This work was performed as an innovation and teaching improvement project and supported by grant SOL-201700083174-TRA from Vicerrectorado de Recursos Docentes y de la Comunicacion, University of Cadiz

An Efficient Beam Steerable Antenna Array Concept for Airborne Applications

Deployment of a satellite borne, steerable antenna array with higher directivity and gain in Low Earth Orbit makes sense to reduce ground station complexity and cost, while still maintaining a reasonable link budget. The implementation comprises a digitally beam steerable phased array antenna integrated with a complete system, comprising the antenna, hosting platform, ground station, and aircraft based satellite emulator to facilitate convenient aircraft based testing of the antenna array and ground-space communication link. This paper describes the design, development and initial successful interim testing of the various subsystems. A two element prototype used in this increases the signal-to-noise ratio (SNR) by 3 dB which is corresponding to more than 10 times better bit error rate (BER)

Characterization and Emulation of Low-Voltage Power Line Channels for Narrowband and Broadband Communication

The demand for smart grid and smart home applications has raised the recent interest in power line communication (PLC) technologies, and has driven a broad set of deep surveys in low-voltage (LV) power line channels. This book proposes a set of novel approaches, to characterize and to emulate LV power line channels in the frequency range from0.15to 10 MHz, which closes gaps between the traditional narrowband (up to 500 kHz) and broadband (above1.8 MHz) ranges

Characterization and Emulation of Low-Voltage Power Line Channels for Narrowband and Broadband Communication

The demand for smart grid and smart home applications has raised the recent interest in power line communication (PLC) technologies, and has driven a broad set of deep surveys in low-voltage (LV) power line channels. This book proposes a set of novel approaches, to characterize and to emulate LV power line channels in the frequency range from0.15to 10 MHz, which closes gaps between the traditional narrowband (up to 500 kHz) and broadband (above1.8 MHz) ranges

A Scalable Correlator Architecture Based on Modular FPGA Hardware, Reuseable Gateware, and Data Packetization

A new generation of radio telescopes is achieving unprecedented levels of sensitivity and resolution, as well as increased agility and field-of-view, by employing high-performance digital signal processing hardware to phase and correlate large numbers of antennas. The computational demands of these imaging systems scale in proportion to BMN^2, where B is the signal bandwidth, M is the number of independent beams, and N is the number of antennas. The specifications of many new arrays lead to demands in excess of tens of PetaOps per second. To meet this challenge, we have developed a general purpose correlator architecture using standard 10-Gbit Ethernet switches to pass data between flexible hardware modules containing Field Programmable Gate Array (FPGA) chips. These chips are programmed using open-source signal processing libraries we have developed to be flexible, scalable, and chip-independent. This work reduces the time and cost of implementing a wide range of signal processing systems, with correlators foremost among them,and facilitates upgrading to new generations of processing technology. We present several correlator deployments, including a 16-antenna, 200-MHz bandwidth, 4-bit, full Stokes parameter application deployed on the Precision Array for Probing the Epoch of Reionization.Comment: Accepted to Publications of the Astronomy Society of the Pacific. 31 pages. v2: corrected typo, v3: corrected Fig. 1

Impact of the noise on the emulated grid voltage signal in hardware-in-the-loop used in power converters

This work evaluates the impact of the input voltage noise on a Hardware-In-the-Loop (HIL) system used in the emulation of power converters. A poor signal-to-noise ratio (SNR) can compromise the accuracy and precision of the model, and even make certain techniques for building mathematical models unfeasible. The case study presents the noise effects on a digitally controlled totem-pole converter emulated with a low-cost HIL system using an FPGA. The effects on the model outputs, and the cost and influence of different hardware implementations, are evaluated. The noise of the input signals may limit the benefits of increasing the resolution of the model.This research was funded by the Spanish Ministry of Science and Innovation under Project PID2021-128941OB-I00 TRENTI–Efficient Energy Transformation in Industrial Environment