99 research outputs found

    Network emulation focusing on QoS-Oriented satellite communication

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    This chapter proposes network emulation basics and a complete case study of QoS-oriented Satellite Communication

    Hardware simulator design for LTE applications with time-varying MIMO channels

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    International audienceA hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents new frequency domain and time domain architectures of the digital block of a hardware simulator of MIMO propagation channels. The two architectures are tested with LTE standard, in outdoor environment, using time-varying channels. The new architectures of the digital block are presented and designed on a Xilinx Virtex-IV FPGA. Their accuracy and latency are analyzed. The result shows that the architectures produce low occupation on the FPGA and have a small relative error of the output signals

    FPGA based technical solutions for high throughput data processing and encryption for 5G communication: A review

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    The field programmable gate array (FPGA) devices are ideal solutions for high-speed processing applications, given their flexibility, parallel processing capability, and power efficiency. In this review paper, at first, an overview of the key applications of FPGA-based platforms in 5G networks/systems is presented, exploiting the improved performances offered by such devices. FPGA-based implementations of cloud radio access network (C-RAN) accelerators, network function virtualization (NFV)-based network slicers, cognitive radio systems, and multiple input multiple output (MIMO) channel characterizers are the main considered applications that can benefit from the high processing rate, power efficiency and flexibility of FPGAs. Furthermore, the implementations of encryption/decryption algorithms by employing the Xilinx Zynq Ultrascale+MPSoC ZCU102 FPGA platform are discussed, and then we introduce our high-speed and lightweight implementation of the well-known AES-128 algorithm, developed on the same FPGA platform, and comparing it with similar solutions already published in the literature. The comparison results indicate that our AES-128 implementation enables efficient hardware usage for a given data-rate (up to 28.16 Gbit/s), resulting in higher efficiency (8.64 Mbps/slice) than other considered solutions. Finally, the applications of the ZCU102 platform for high-speed processing are explored, such as image and signal processing, visual recognition, and hardware resource management

    MIMO hardware simulator design for heterogeneous indoor environments using TGn channel models

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    10 pagesInternational audienceA wireless communication system can be tested either in actual conditions or by using a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel. This paper presents new frequency domain and time domain architectures for the digital block of a hardware simulator of Multiple-Input Multiple-Output (MIMO) propagation channels. This simulator can be used for Wireless Local Area Networks (WLAN) 802.11ac applications. It characterizes an indoor scenario using TGn channel models. After the description of the general characteristics of the hardware simulator, the new architectures of the digital block are presented and designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Their accuracy, occupation on the FPGA and latency are analyzed

    Hardware Simulator Design for MIMO Propagation Channel on Shipboard at 2.2 GHz

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    27 pagesInternational audienceA wireless communication system can be tested either in actual conditions or with a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired radio channel, making it possible to test "on table" mobile radio equipments. This paper presents new architectures for the digital block of a hardware simulator ofMIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. However, in this paper, specific architectures of the digital block of the simulator for shipboard environment are presented. A hardware simulator must reproduce the behavior of the radio propagation channel. Thus, ameasurements campaign has been conducted to obtain the impulse responses of the shipboard channel using a channel sounder designed and realized at IETR. After the presentation of the channel sounder, the channel impulse responses are described and implemented. Then, the new architectures of the digital block of the hardware simulator, implemented on a Xilinx Virtex-IV FPGA are presented. The accuracy, the occupation on the FPGA and the latency of the architectures are analyzed

    Advanced Applications of Rapid Prototyping Technology in Modern Engineering

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    Rapid prototyping (RP) technology has been widely known and appreciated due to its flexible and customized manufacturing capabilities. The widely studied RP techniques include stereolithography apparatus (SLA), selective laser sintering (SLS), three-dimensional printing (3DP), fused deposition modeling (FDM), 3D plotting, solid ground curing (SGC), multiphase jet solidification (MJS), laminated object manufacturing (LOM). Different techniques are associated with different materials and/or processing principles and thus are devoted to specific applications. RP technology has no longer been only for prototype building rather has been extended for real industrial manufacturing solutions. Today, the RP technology has contributed to almost all engineering areas that include mechanical, materials, industrial, aerospace, electrical and most recently biomedical engineering. This book aims to present the advanced development of RP technologies in various engineering areas as the solutions to the real world engineering problems

    MIMO Hardware Simulator Using Standard Channel Models and Measurement Data at 2.2 and 3.5 GHz

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    20 pagesInternational audienceA wireless communication system can be tested either in actual conditions or by using a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel. This paper presents architectures for the digital block of a hardware simulator of MIMO (multiple-input multiple-output) propagation channels. This simulator can be used for LTE (long term evolution system) and WLAN (wireless local area networks) 802.11ac applications, in indoor and outdoor environments. The first architecture is appropriate for shipboard environments, while the second corresponds to outdoor-to-indoor environments and considers the wave propagation penetration within buildings. Measurements campaigns carried out at 2.2 and 3.5 GHz have been conducted to obtain the impulse responses of the channel using a MIMO channel sounder designed at IETR. The measurements are processed with an algorithm extracting the dominant paths. The architectures of the digital block are implemented on a Xilinx Virtex-IV FPGA (field programmable gate array). After the implementation of the impulse responses, the accuracy, the occupation on the FPGA and the latency of the architectures are analyzed

    IR-UWB and OFDM-UWB Transceiver Nodes for Communication and Positioning Purposes

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    RĂ©sumĂ© Ultra-wideband (UWB) a suscitĂ© l'intĂ©rĂȘt de chercheurs et de l'industrie en raison de ses nombreux avantages tels que la faible probabilitĂ© d'interception et de la possibilitĂ© de combiner la communication des donnĂ©es de positionnement dans un seul systĂšme. Il existe plusieurs UWB couche physique (PHY) prĂ©sentĂ©es initialement Ă  la norme IEEE qui convergent en deux propositions principales: des porte-UWB ou Orthogonal Frequency-Division Multiplexing (OFDM-UWB), et Ă  court d'impulsion porteuse Ă -UWB ou Impulse Radio-(IR-UWB). Une des plus grandes tĂąches difficiles pour les chercheurs est de nos jours la conception d'Ă©metteurs-rĂ©cepteurs UWB optimisĂ©s qui satisfont Ă  des conditions rigoureuses, dont la simplicitĂ© caractĂ©ristiques large bande, Ă  faible coĂ»t et de conception. Des Ă©tudes antĂ©rieures ont montrĂ© que les rĂ©cepteurs Ă  conversion directe basĂ©e sur Wave-radio interfĂ©romĂštre (WRI) circuits reprĂ©sentent un bon candidat pour les applications UWB. Circuits IRG ont plusieurs avantages tels que l'exploitation Ă  large bande, Ă  faible coĂ»t et la simplicitĂ©. Des travaux antĂ©rieurs sur l'IRG circuit, cependant, a enquĂȘtĂ© sur le circuit de l'IRG sur la base du concept de porteuse unique signaux (par exemple, les signaux sinusoĂŻdaux). L'objectif de ce projet est de fournir les rĂ©sultats de conception, de simulation, de mise en oeuvre et le test d'un Ă©metteur-rĂ©cepteur WRI basĂ© sur ce que peut ĂȘtre utilisĂ© comme un noeud ou un pico-rĂ©seau dans un dĂ©tecteur sans fil / rĂ©seau de donnĂ©es. Nous allons passer par les Ă©tapes de conception et de mise en oeuvre de propositions UWB deux: IR-UWB et OFDM-UWB. Pour la proposition porteuse Ă  nous concentrer sur la conception et la mise en oeuvre de l'Ă©metteur-rĂ©cepteur en intĂ©grant les opĂ©rations de transmission / rĂ©ception dans un prototype unique, alors que pour la proposition des porte-nous concevoir et mettre en oeuvre l'Ă©metteur-rĂ©cepteur avec le circuit de l'IRG dans le rĂ©cepteur seulement utilisĂ© en tant que convertisseur abaisseur directe. RĂ©sultats expĂ©rimentaux, de simulation et d'analyse ont Ă©tĂ© obtenus et sont prĂ©sentĂ©s dans cette thĂšse.----------Abstract Ultra-wideband (UWB) technology has attracted interest from both researchers and the industry due to its numerous advantages such as low probability of interception and the possibility of combining data communication with positioning in a single system. There are several different UWB physical layer (PHY) proposals originally submitted to IEEE which converged into two main proposals: carrier‐based UWB or Orthogonal-Frequency Division Multiplexing (OFDM‐UWB), and short‐pulse carrierless‐UWB or Impulse-Radio (IR-UWB). One of the biggest challenging tasks for researchers nowadays is the design of optimized UWB transceivers that would satisfy rigorous conditions, among which wideband characteristics, low-cost and design simplicity. Previous studies have shown that direct-conversion receivers based on Wave-Radio Interferometer (WRI) circuits represent a suitable candidate for UWB applications. WRI circuits have several advantages such as wideband operation, low cost, and simplicity. Previous works on WRI circuit, however, investigated the WRI circuit based on the concept of single-carrier signals (i.e., sinusoidal signals). The objective of this project is to provide the design, simulation, implementation and testing results of a WRI-based transceiver that can be utilized as a node or a piconet in a wireless sensor/data network. We will go through the design and implementation steps for both UWB proposals: IR-UWB and OFDM-UWB. For the carrierless proposal we will focus on designing and implementing the transceiver by integrating the transmitter/receiver operations in a single prototype, while for the carrier‐based proposal we will design and implement the transceiver with the WRI circuit in the receiver only utilized as a direct downconverter

    MIMO-OFDMA Measurements; Reception, Testing, and Evaluation of WiMAX-MIMO Signals with a Single Channel Receiver

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    Abstract-The number of MIMO-OFDMA systems is expected to increase sharply in the near future. Engineers who need to test these systems face two difficulties. First, the lack of descriptive instructions to conduct reliable measurements. Second, the increased hardware cost due to the need for multiple transmitters and receivers. This paper first introduces all measurable parameters of MIMO-OFDMA systems and provides a clear guide to perform the measurements specific to various parts of the system. Then, it proposes to implement reception of MIMO-OFDMA signals using a single receiver rather than multiple receivers. For this purpose, impairments related to each of the RF front-end components are investigated. Challenges of MIMO-OFDMA measurements are addressed in comparison with SISO. A complete procedure is provided to receive and do impairment estimation for WiMAX MIMO signals using a single receiver according to the IEEE 802.16 standards
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