Homogeneous and heterogeneous MPSoC architectures with network-on-chip connectivity for low-power and real-time multimedia signal processing

Two multiprocessor system-on-chip (MPSoC) architectures are proposed and compared in the paper with reference to audio and video processing applications. One architecture exploits a homogeneous topology; it consists of 8 identical tiles, each made of a 32-bit RISC core enhanced by a 64-bit DSP coprocessor with local memory. The other MPSoC architecture exploits a heterogeneous-tile topology with on-chip distributed memory resources; the tiles act as application specific processors supporting a different class of algorithms. In both architectures, the multiple tiles are interconnected by a network-on-chip (NoC) infrastructure, through network interfaces and routers, which allows parallel operations of the multiple tiles. The functional performances and the implementation complexity of the NoC-based MPSoC architectures are assessed by synthesis results in submicron CMOS technology. Among the large set of supported algorithms, two case studies are considered: the real-time implementation of an H.264/MPEG AVC video codec and of a low-distortion digital audio amplifier. The heterogeneous architecture ensures a higher power efficiency and a smaller area occupation and is more suited for low-power multimedia processing, such as in mobile devices. The homogeneous scheme allows for a higher flexibility and easier system scalability and is more suited for general-purpose DSP tasks in power-supplied devices

Autonomous Mapping Robot

The purpose of this Major Qualifying Project was to design and build a prototype of an autonomous mapping robot capable of producing a floor plan of the interior of a building. In order to accomplish this, several technologies were combined including, a laser rangefinder, ultrasonic sensors, optical encoders, an inertial sensor, and wireless networking to make a small, self-contained autonomous robot controlled by an ARM9 processor running embedded Linux. This robot was designed with future expansion in mind

Wireless Sensor System for Monitoring and Control

With the fast development of wireless sensor network (WSN) technology, a large number of applications have been widely used over the past few years. As a matter of fact, wireless monitoring and control system is unavoidable one of the applications that consist of WSN nodes. A generic, modular and stackable WSN node, named UWASA Node has been developed by the University of Vaasa and Aalto University lately. Besides, SurfNet node, developed by Seinäjoki University of Applied Science, is designed as low-power consumption, high-data rate, small and powerful sensor node that is suitable to implement the monitoring and control tasks under multiple conditions. In this work, a wireless sensor system for monitoring and control is integrated and developed by one UWASA Node, one Linux board, and SurfNet nodes. Firstly, the basics of WSN including IEEE 802.15.4 and ZigBee standard are introduced. Secondly, a new design and development of the hardware and software for the wireless sensor system is explained in detail. After that, several experiments are performed to verify the system performance due to the limited computational and power source of the sensor nodes in the WSN. In one word, this developed wireless sensor system provides a wireless solution for remote monitoring and control of the deployed environment.fi=Opinnäytetyö kokotekstinä PDF-muodossa.|en=Thesis fulltext in PDF format.|sv=Lärdomsprov tillgängligt som fulltext i PDF-format

System-Level Power Estimation Methodology for MPSoC based Platforms

Avec l'essor des nouvelles technologies d'intégration sur silicium submicroniques, la consommation de puissance dans les systèmes sur puce multiprocesseur (MPSoC) est devenue un facteur primordial au niveau du flot de conception. La prise en considération de ce facteur clé dès les premières phases de conception, joue un rôle primordial puisqu'elle permet d'augmenter la fiabilité des composants et de réduire le temps d'arrivée sur le marché du produit final.Shifting the design entry point up to the system-level is the most important countermeasure adopted to manage the increasing complexity of Multiprocessor System on Chip (MPSoC). The reason is that decisions taken at this level, early in the design cycle, have the greatest impact on the final design in terms of power and energy efficiency. However, taking decisions at this level is very difficult, since the design space is extremely wide and it has so far been mostly a manual activity. Efficient system-level power estimation tools are therefore necessary to enable proper Design Space Exploration (DSE) based on power/energy and timing.VALENCIENNES-Bib. électronique (596069901) / SudocSudocFranceF

A coarse-grained dynamically reconfigurable MAC processor for power-sensitive multi-standard devices

DRMP, a Dynamically Reconfigurable MAC Processor, is an innovative, dynamically reconfigurable System-on-Chip architecture. The architecture exploits substantial overlaps in the functionality of different wireless MAC layers. Its flexibility is specialized for addressing the requirements of the MAC layer of wireless standards. It is targeted at consumer, multi-standard, handheld devices, and its design is meant to address the balance of flexibility and power-efficiency that this target market demands. The DRMP reconfigures packet-by-packet on the fly, allowing execution of concurrent protocol modes on a single hardware co-processor. An interrupt-driven programming model has also been presented and shown to implement the protocol state-machine of the three protocols on a CPU. These features will allow the DRMP to replace three MAC processors in a hand-held device. The most innovative component of the DRMP architecture is its Interface and Reconfiguration Controller. It uses a combination of asynchronous controllers to dynamically reconfigure the functional units in the architecture and delegate MAC tasks to them. The architecture has been modeled in Simulink at cycle-approximate abstraction. Results of simulations involving transmission and reception of packets have been presented, showing that the platform concurrently handles three protocol streams, reconfigures dynamically, yet meets and exceeds the protocol timing constraints, all at a moderate frequency. Its heterogeneous and coarse-grained functional units, limited connectivity requirements between these units, and proportionally large time that these resources are idle, promise a very modest power-consumption, suitable for mobile devices, while offering flexibility to implement different MAC protocols

Politecast - a new communication primitive for wireless sensor networks

Wireless sensor networks have the potential for becoming a huge market. Ericsson predicts 50 billion devices interconnected to the Internet by the year 2020. Before that, the devices must be made to be able to withstand years of usage without having to change power source as that would be too costly. These devices are typically small, inexpensive and severally resource constrained. Communication is mainly wireless, and the wireless transceiver on the node is typically the most power hungry component. Therefore, reducing the usage of radio is key to long lifetime. In this thesis I identify four problems with the conventional broadcast primitive. Based on those problems, I implement a new communication primitive. This primitive is called Politecast. I evaluate politecast in three case studies: the Steal the Light toy example, a Neighbor Discovery simulation and a full two-month deployment of the Lega system in the art gallery Liljevalchs. With the evaluations, Politecast is shown to be able to massively reduce the amount of traffic being transmitted and thus reducing congestion and increasing application performance. It also prolongs node lifetime by reducing the overhearing by waking up neighbors

Design of a Personal Health Monitor Interface for Wireless, IP-based, Data Logging

Collaborating with the Enterprise Research Centre at the University of Limerick (UL) in Ireland, we designed, developed, and implemented a proof-of-concept glucose meter adapter that allows blood glucose level readings to be securely transmitted to a remote database via existing WiFi technology. By using open source software and embedded components, we have created a highly flexible platform that allows healthcare professionals to monitor patients in near real-time. Our device aims to simplify the lifestyle of diabetics while providing new opportunities for statistical research and analysis of diabetes