The 2018 GaN Power Electronics Roadmap

Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here

Gallium nitride high electron mobility transistors in chip scale packaging: evaluation of performance in radio frequency power amplifiers and thermomechanical reliability characterization

2017 Summer.Includes bibliographical references.Wide bandgap semiconductors such as Gallium Nitride (GaN) have many advantages over their Si counterparts, such as a higher energy bandgap, critical electric field, and saturated electron drift velocity. These parameters translate into devices which operate at higher frequency, voltage, and efficiency than comparable Si devices, and have been utilized in varying degrees for power amplification purposes at >1 MHz for years. Previously, these devices required costly substrates such as sapphire (Al2O3), limiting applications to little more than aerospace and military. Furthermore, the typical breakdown voltage ratings of these parts have historically been below ~200 V, with many targeted as replacements for 50 V Si LDMOS as used in cellular infrastructure and industrial, scientific, and medical (ISM) applications between 1 MHz and 1 GHz. Fortunately within the past five years, devices have become commercially available with attractive key specifications: GaN on Si subtrates, with breakdown voltages of over 600 V, realized in cost effective chip scale packages, and with inherently low parasitic capacitances and inductances. In this work, two types of inexpensive commercially available AlGaN/GaN high electron mobility transistors (HEMTs) in chip scale packages are evaluated in a set of three interconnected experiments. The first explores the feasibility of creating a radio frequency power amplifier for use in the ISM bands of 2 MHz and 13.56 MHz, at power levels of up to 1 kW, using a Class E topology. Experiments confirm that a DC to RF efficiency of 94% is easily achievable using these devices. The second group of experiments considers both the steady state and transient thermal characterization of the HEMTs when installed in a typical industrial application. It is shown that both types of devices have acceptable steady state thermal resistance performance; approximately 5.27 °C/W and 0.93 °C/W are achievable for the source pad (bottom) cooled and top thermal pad cooled device types, respectively. Transient thermal behavior was found to exceed industry recommended maximum dT/dt by over 80x for the bottom cooled devices; a factor of 20x was noted with the top cooled devices. Extrapolations using the lumped capacitance method for transient conduction support even higher initial channel dT/dt rates. Although this rate of change decays to recommended levels within one second, it was hypothesized that the accumulated mechanical strain on the HEMTs would cause early life failures if left uncontrolled. The third set of experiments uses the thermal data to design a set of experiments with the goal of quantifying the cycles to failure under power cycling. It is confirmed that to achieve a high number of thermal cycles to failure as required in high reliability industrial systems, the devices under test require significant thermal parameter derating to levels on the order of 50%

GaN-based power devices: Physics, reliability, and perspectives

Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semicon- ductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spon- taneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high- voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench- structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main proper- ties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics

Wide Bandgap Based Devices

Emerging wide bandgap (WBG) semiconductors hold the potential to advance the global industry in the same way that, more than 50 years ago, the invention of the silicon (Si) chip enabled the modern computer era. SiC- and GaN-based devices are starting to become more commercially available. Smaller, faster, and more efficient than their counterpart Si-based components, these WBG devices also offer greater expected reliability in tougher operating conditions. Furthermore, in this frame, a new class of microelectronic-grade semiconducting materials that have an even larger bandgap than the previously established wide bandgap semiconductors, such as GaN and SiC, have been created, and are thus referred to as “ultra-wide bandgap” materials. These materials, which include AlGaN, AlN, diamond, Ga2O3, and BN, offer theoretically superior properties, including a higher critical breakdown field, higher temperature operation, and potentially higher radiation tolerance. These attributes, in turn, make it possible to use revolutionary new devices for extreme environments, such as high-efficiency power transistors, because of the improved Baliga figure of merit, ultra-high voltage pulsed power switches, high-efficiency UV-LEDs, and electronics. This Special Issue aims to collect high quality research papers, short communications, and review articles that focus on wide bandgap device design, fabrication, and advanced characterization. The Special Issue will also publish selected papers from the 43rd Workshop on Compound Semiconductor Devices and Integrated Circuits, held in France (WOCSDICE 2019), which brings together scientists and engineers working in the area of III–V, and other compound semiconductor devices and integrated circuits

Development of InAlN HEMTs for space application

This thesis investigates the emerging InAlN high electron mobility transistor (HEMT) technology with respect to its application in the space industry. The manufacturing processes and device performance of InAlN HEMTs were compared to AlGaN HEMTs, also produced as part of this work. RF gain up to 4 GHz was demonstrated in both InAlN and AlGaN HEMTs with gate lengths of 1 μm, with InAlN HEMTs generally showing higher channel currents (~150 c.f. 60 mA/mm) but also degraded leakage properties (~ 1 x 10-4 c.f. < 1 x 10-8 A/mm) with respect to AlGaN. An analysis of device reliability was undertaken using thermal stability, radiation hardness and off-state breakdown measurements. Both InAlN and AlGaN HEMTs showed excellent stability under space-like conditions, with electrical operation maintained after exposure to 9.2 Mrad of gamma radiation at a dose rate of 6.6 krad/hour over two months and after storage at 250°C for four weeks. Furthermore a link was established between the optimisation of device performance (RF gain, power handling capabilities and leakage properties) and reliability (radiation hardness, thermal stability and breakdown properties), particularly with respect to surface passivation. Following analysis of performance and reliability data, the InAlN HEMT device fabrication process was optimised by adjusting the metal Ohmic contact formation process (specifically metal stack thicknesses and anneal conditions) and surface passivation techniques (plasma power during dielectric layer deposition), based on an existing AlGaN HEMT process. This resulted in both a reduction of the contact resistivity to around 1 x 10-4 Ω.cm2 and the suppression of degrading trap-related effects, bringing the measured gate-lag close to zero. These discoveries fostered a greater understanding of the physical mechanisms involved in device operation and manufacture, which is elaborated upon in the final chapter

The 2018 GaN power electronics roadmap

GaN is a compound semiconductor that has a tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here

Fabrication and Characterization of AlGaN/GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors for High Power Applications

AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) are promising candidates for next generation high-efficiency and high-voltage power applications. The excellent physical properties of GaN-based materials, featuring high critical electric field and large carrier saturation velocity, combined to the high carrier density and large mobility of the two-dimensional electron gas confined at the AlGaN/GaN interface, enable higher power density minimizing power losses and self-heating of the device. However, the advent of the GaN-based MIS-HEMT to the industrial production is still hindered by technological challenges that are being faced in parallel. Among them, one of the biggest challenge is represented by the insertion of a gate dielectric in MIS-HEMTs compared to Schottky-gate HEMTs, which causes operational instability due to the presence of high-density trap states located at the dielectric/III-nitride interface or within the dielectric. The development of a gold-free ohmic contact technology is another important concern since the high-volume and cost-effective production of GaN-based transistors also depends on the cooperative manufacturing of GaN-based devices in Si production facilities, where gold represents an undesidered source of contamination. In fact, even though over the past years there have been multiple attemps to develop gold-free ohmic contacts, there is still no full understanding of the contact formation and current transport mechanism. The first objective of this work was the investigation of a gold-free and low-resistive ohmic contact technology to AlGaN/GaN based on sputtered Ta/Al-based metal stacks annealed at low temperatures. A low contact resistance below 1 Ω mm was obtained using Ta/Al-based metal stacks annealed at temperatures below 600 °C. The ohmic behavior and the contact properties of contact resistance, optimum annealing temperature and thermal stability of Ta/Al-based contacts were studied. The nature of the current transport was also investigated indicating a contact mechanism governed by thermionic field emission tunneling through the AlGaN barrier. Finally, gold-free Ta/Al-based ohmic contacts were integrated in MIS-HEMTs fabricated on a 150 mm GaN-on- Si substrate, demonstrating to be a promising contact technology for AlGaN/GaN devices and revealing to be beneficial for devices operating at high temperatures. The optimization of the MIS-gate structure in terms of trap states at the dielectric/III-nitride interface and inside the dielectric in MIS-HEMTs using atomic layer deposited (ALD) Al2O3 as gate insulator was the second focus of this work. First, the MIS-gate structure was improved by an O2 plasma surface preconditioning applied before the Al2O3 deposition and by an N2 postmetallization anneal applied after gate metallization, which significantly reduced trap states at the Al2O3/GaN interface and within the dielectric. Afterwards, the effectiveness of these treatments was demonstrated in Al2O3-AlGaN/GaN MIS-HEMTs by pulsed current–voltage measurements revealing improved threshold voltage stability. Lastly, it was shown that also the lower annealing temperatures used for the formation of Ta/Al-based ohmic contacts, processed before gate dielectric deposition, are beneficial in terms of trap states at the ALD-Al2O3/GaN interface, representing a new aspect to be considered when using an ohmic first fabrication approach

Conception et fabrication de FinFET GaN verticaux de puissance normalement bloqués

Abstract: The tremendous demands for high-performance systems driven by economic constraints forced the semiconductor industry to considerably scale the device's dimensions to compensate for the relatively modest Silicon physical properties. Those limitations pave the way for III-V semiconductors, which are excellent alternatives to Silicon and can be declined in many compositions. For example, Gallium Nitride (GaN) has been considered a fabulous competitor to facilitate the semiconductor industry's horizon beyond the performance limitations of Silicon due to its high mobility, wide bandgap, and high thermal conductivity properties for T>300K (Bulk GaN). It promises to trim the losses in power conversion circuits and drive a 10 % reduction in power consumption. Both lateral and vertical structures have been considered for GaN power devices. The AlGaN/GaN HEMT device's immense potential comes from the high density, high mobility electron gas formed at its heterojunction. The device is vulnerable to reliability issues resulting from the frequent exposure to high electric field collapse, temperature, and stress conditions, thus limiting its performance and reliability. Contrariwise, the vertical GaN power devices have attracted much attention because of the potential to reach high voltage and current levels without enlarging the chip's size. Furthermore, such vertical devices show superior thermal performance to their lateral counterparts. Meanwhile, Vertical GaN devices have the challenges of high leakage current and the breakdown occurring at the corners of the channel. Another challenge associated with Normally off devices is the lack of an optimized method for eliminating the magnesium diffusion from the p-GaN layer. This thesis has two strategic objectives; Firstly, a Normally-OFF GaN Power FinFET has been designed and optimized to overcome the vertical GaN FinFET challenges. It was done by optimizing the performance parameters such as threshold voltage VTH, high breakdown VBR, and the specific ON-state-resistance RON. Accordingly, the impact of both structural and physical parameters should be incorporated to have an exact optimization process. Afterward, the identification and optimization of a low-cost and high-quality fabrication process for the proposed structure underlined this thesis as the second objective.Les énormes demandes de systèmes à hautes performances motivées par des contraintes économiques ont forcé l'industrie des semi-conducteurs à réduire considérablement les dimensions des dispositifs pour compenser les propriétés physiques relativement modestes du silicium. Ces limitations ouvrent la voie aux semi-conducteurs III-V, qui sont d'excellentes alternatives au silicium et peuvent être déclinés dans de nombreuses compositions. Par exemple, le nitrure de gallium (GaN) a été considéré comme un concurrent fabuleux pour faciliter l'horizon de l'industrie des semi-conducteurs au-delà des limitations de performances du silicium en raison de sa grande mobilité, de sa large bande interdite et de ses propriétés de conductivité thermique élevées pour T>300K (Bulk GaN). Il promet de réduire les pertes dans les circuits de conversion de puissance et de réduire de 10 % la consommation d'énergie. À l'heure actuelle, les structures latérales et verticales ont été considérées pour les dispositifs de puissance en GaN. L'immense potentiel du dispositif HEMT AlGaN/GaN provient du gaz d'électrons à haute densité et à haute mobilité formé au niveau de son hétérojonction. Le dispositif est vulnérable aux problèmes de fiabilité résultant de l'exposition fréquente à des conditions d'effondrement de champ électrique, de température et de contrainte élevés, limitant ainsi ses performances et sa fiabilité. En revanche, les dispositifs de puissance verticaux en GaN ont attiré beaucoup d'attention en raison de leur capacité à atteindre des niveaux de tension et de courant élevés sans augmenter la taille de la puce. De plus, ces dispositifs verticaux présentent des performances thermiques supérieures à leurs homologues latéraux. Par ailleurs, les dispositifs GaN verticaux sont confrontés aux défis d'un courant de fuite élevée et de claquage se produisant aux coins du canal. Un autre défi associé aux dispositifs normalement bloqués est l'absence d'une méthode optimisée pour éliminer la diffusion de magnésium de la couche p-GaN. Cette thèse a deux objectifs stratégiques ; premièrement, un dispositif de puissance FinFET GaN normalement bloqué a été conçu et optimisé pour surmonter les défis du FinFET vertical en GaN. Cela a été fait en optimisant les paramètres de performance tels que la tension de seuil VTH, la tension de claquage VBR et la résistance spécifique à l'état passant RON. En conséquence, l'impact des paramètres structurels et physiques doit être incorporé pour avoir un processus d'optimisation précis. Par la suite, l'identification et l'optimisation d'un processus de fabrication à faible coût et de haute qualité pour la structure proposée à souligner cette thèse comme deuxième objectif