Mitigating smart card fault injection with link-time code rewriting: a feasibility study

We present a feasibility study to protect smart card software against fault-injection attacks by means of binary code rewriting. We implemented a range of protection techniques in a link-time rewriter and evaluate and discuss the obtained coverage, the associated overhead and engineering effort, as well as its practical usability

Validating a timing simulator for the NGMP multicore processor

Timing simulation is a key element in multicore systems design. It enables a fast and cost effective design space exploration, allowing to simulate new architectural improvements without requiring RTL abstraction levels. Timing simulation also allows software developers to perform early testing of the timing behavior of their software without the need of buying the actual physical board, which can be very expensive when the board uses non-COTS technology. In this paper we present the validation of a timing simulator for the NGMP multicore processor, which is a 4 core processor being developed to become the reference platform for future missions of the European Space Agency.The research leading to these results has received funding from the European Space Agency under contract NPI 4000102880 and the Ministry of Science and Technology of Spain under contract TIN-2015-65316-P. Jaume Abella has been partially supported by the Ministry of Economy and Competitiveness under Ramon y Cajal postdoctoral fellowship number RYC-2013-14717.Peer ReviewedPostprint (author's final draft

Reducing the complexity of virtual machine networking

Virtualization is an enabling technology that improves scalability, reliability, and flexibility. Virtualized networking is tackled by emulating or paravirtualizing network interface cards. This approach, however, leads to complexities (implementation and management) and has to conform to some limitations imposed by the Ethernet standard. RINA turns the current approach to virtualized networking on its head: instead of emulating networks to perform inter-process communication on a single processing system, it sees networking as an extension to local inter-process communication. In this article, we show how RINA can leverage a paravirtualization approach to achieve a more manageable solution for virtualized networking. We also present experimental results performed on IRATI, the reference open source implementation of RINA, which shows the potential performance that can be achieved by deploying our solution

Predicting financial markets with Google Trends and not so random keywords

We check the claims that data from Google Trends contain enough data to predict future financial index returns. We first discuss the many subtle (and less subtle) biases that may affect the backtest of a trading strategy, particularly when based on such data. Expectedly, the choice of keywords is crucial: by using an industry-grade backtesting system, we verify that random finance-related keywords do not to contain more exploitable predictive information than random keywords related to illnesses, classic cars and arcade games. We however show that other keywords applied on suitable assets yield robustly profitable strategies, thereby confirming the intuition of Preis et al. (2013)Comment: 8 pages, 4 figures. First names and last names swappe

Designing a CPU model: from a pseudo-formal document to fast code

For validating low level embedded software, engineers use simulators that take the real binary as input. Like the real hardware, these full-system simulators are organized as a set of components. The main component is the CPU simulator (ISS), because it is the usual bottleneck for the simulation speed, and its development is a long and repetitive task. Previous work showed that an ISS can be generated from an Architecture Description Language (ADL). In the work reported in this paper, we generate a CPU simulator directly from the pseudo-formal descriptions of the reference manual. For each instruction, we extract the information describing its behavior, its binary encoding, and its assembly syntax. Next, after automatically applying many optimizations on the extracted information, we generate a SystemC/TLM ISS. We also generate tests for the decoder and a formal specification in Coq. Experiments show that the generated ISS is as fast and stable as our previous hand-written ISS.Comment: 3rd Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools (2011

Rumba : a Python framework for automating large-scale recursive internet experiments on GENI and FIRE+

It is not easy to design and run Convolutional Neural Networks (CNNs) due to: 1) finding the optimal number of filters (i.e., the width) at each layer is tricky, given an architecture; and 2) the computational intensity of CNNs impedes the deployment on computationally limited devices. Oracle Pruning is designed to remove the unimportant filters from a well-trained CNN, which estimates the filters’ importance by ablating them in turn and evaluating the model, thus delivers high accuracy but suffers from intolerable time complexity, and requires a given resulting width but cannot automatically find it. To address these problems, we propose Approximated Oracle Filter Pruning (AOFP), which keeps searching for the least important filters in a binary search manner, makes pruning attempts by masking out filters randomly, accumulates the resulting errors, and finetunes the model via a multi-path framework. As AOFP enables simultaneous pruning on multiple layers, we can prune an existing very deep CNN with acceptable time cost, negligible accuracy drop, and no heuristic knowledge, or re-design a model which exerts higher accuracy and faster inferenc

BitVisorのためのOSの状態復元機能

マルウェアによる脅威が多く発見されており，それに対する対抗策として，アンチウイルスソフトウェア等のセキュリティシステムによって OS のセキュリティを高める手法が一般的となっている．しかし，セキュリティシステム自体を無効化するマルウェアも存在し，OS 上での対策は限界がある．この問題を解決方法として，仮想マシンモニタ (VMM) を用いてセキュリティ処理を施す方法が存在する．VMM を用いてセキュリティ処理を施す方法では，仮想マシン (VM) 上で OS を動かし，VMM層で OS の挙動を解析して OS のセキュリティを高める．この方法を用いたシステムは，元々は OSのセキュリティを高めるために作られた一般ユーザが対象のシステムであったが，VM 上でマルウェアと思われるプログラムを実際に動かし，その挙動を監視する VM 上でのマルウェアの動的解析に使用するというマルウェア解析者が対象のシステムにも応用でき，研究されている．マルウェアの動的解析に利用する場合，実環境とはかけ離れた環境の場合に動作を止めるマルウェアも存在するため，マルウェアの動的解析に用いる VMM はより実環境に近い環境であることが望ましい．より実環境に近い環境を提供する VMMとしては，BitVisor がある．BitVisor は実環境に近い環境を提供しつつ，デバイスへの I/O を監視できる機能をもつ．しかし，BitVisor はマルウェアの動的解析をするのに相応しい環境を提供しているが，マルウェアによって壊された環境を元の状態に戻す機能は提供していない．そこで本研究では，BitVisor に対して OS の状態をチェックポイントとして保存，復元できる機能を提案する．チェックポイントとして保存，復元するものはディスク内にあるデータであるディスクデータとメモリ上にあるデータであるメモリデータである．また，OS の状態の保存，復元の適切なタイミングは，使用するユーザが一番知っていると考え，OS の状態の保存，復元のトリガーは，任意のタイミングで OS のユーザレベルから引くことができるといった手法を用いる．我々はこの機能を BitVisor に実装してベンチマークによる実行時間のオーバヘッドを測定，評価し，提案システム導入後のオーバヘッドが実用に耐えられるレベルであることを確認した．電気通信大学201