Remotely interrogated MEMS pressure sensor

This thesis considers the design and implementation of passive wireless microwave readable pressure sensors on a single chip. Two novel-all passive devices are considered for wireless pressure operation. The first device consists of a tuned circuit operating at 10 GHz fabricated on SiO2 membrane, supported on a silicon wafer. A pressure difference across the membrane causes it to deflect so that a passive resonant circuit detunes. The circuit is remotely interrogated to read off the sensor data. The chip area is 20 mm2 and the membrane area is 2mm2 with thickness of 4 µm. Two on chip passive resonant circuits were investigated: a meandered dipole and a zigzag antenna. Both have a physical length of 4.25 mm. the sensors show a shift in their resonant frequency in response to changing pressure of 10.28-10.27 GHz for the meandered dipole, and 9.61-9.58 GHz for the zigzag antenna. The sensitivities of the meandered dipole and zigzag sensors are 12.5 kHz and 16 kHz mbar, respectively. The second device is a pressure sensor on CMOS chip. The sensing element is capacitor array covering an area of 2 mm2 on a membrane. This sensor is coupled with a dipole antenna operating at 8.77 GHz. The post processing of the CMOS chip is carried out only in three steps, and the sensor on its own shows a sensitivity of 0.47fF/mbar and wireless sensitivity of 27 kHz/mbar. The MIM capacitors on membrane can be used to detune the resonant frequency of an antenna

Contribution to time domain readout circuits design for multi-standard sensing system for low voltage supply and high-resolution applications

Mención Internacional en el título de doctorThis research activity has the purpose of open new possibilities in the design of capacitance-to-digital converters (CDCs) by developing a solution based on time domain conversion. This can be applied to applications related with the Internet-of-Things (IoT). These applications are present in any electronic devices where sensing is needed. To be able to reduce the area of the whole system with the required performance, micro-electromechanical systems (MEMS) sensors are used in these applications. We propose a new family of sensor readout electronics to be integrated with MEMS sensors. Within the time domain converters, Dual Slope (DS) topology is very interesting to explore a new compromise between performances, area and power consumption. DS topology has been extensively used in instrumentation. The simplicity and robustness of the blocks inside classical DS converters it is the main advantage. However, they are not efficient for applications where higher bandwidth is required. To extend the bandwidth, DS converters have been introduced into ΔΣ loops. This topology has been named as integrating converters. They increase the bandwidth compare to classical DS architecture but at the expense of higher complexity. In this work we propose the use of a new family of DS converters that keep the advantages of the classical architecture and introduce noise shaping. This way the bandwidth is increased without extra blocks. The Self-Compensated noise-shaped DS converter (the name given to the new topology) keeps the signal transfer function (STF) and the noise transfer function (NTF) of Integrating converters. However, we introduce a new arrangement in the core of the converter to do noise shaping without extra circuitry. This way the simplicity of the architecture is preserved. We propose to use the Self-Compensated DS converter as a CDC for MEMS sensors. This work makes a study of the best possible integration of the two blocks to keep the signal integrity considering the electromechanical behavior of the sensor. The purpose of this front-end is to be connected to any kind of capacitive MEMS sensor. However, to prove the concepts developed in this thesis the architecture has been connected to a pressure MEMS sensor. An experimental prototype was implemented in 130-nm CMOS process using the architecture mentioned before. A peak SNR of 103.9 dB (equivalent to 1Pa) has been achieved within a time measurement of 20 ms. The final prototype has a power consumption of 220 μW with an effective area of 0.317 mm2. The designed architecture shows good performance having competitive numbers against high resolution topologies in amplitude domain.Esta actividad de investigación tiene el propósito de explorar nuevas posibilidades en el diseño de convertidores de capacitancia a digital (CDC) mediante el desarrollo de una solución basada en la conversión en el dominio del tiempo. Estos convertidores se pueden utilizar en aplicaciones relacionadas con el mercado del Internet-de-las-cosas (IoT). Hoy en día, estas aplicaciones están presentes en cualquier dispositivo electrónico donde se necesite sensar una magnitud. Para poder reducir el área de todo el sistema con el rendimiento requerido, se utilizan sensores de sistemas micro-electromecánicos (MEMS) en estas aplicaciones. Proponemos una nueva familia de electrónica de acondicionamiento para integrar con sensores MEMS. Dentro de los convertidores de dominio de tiempo, la topología del doble-rampa (DS) es muy interesante para explorar un nuevo compromiso entre rendimiento, área y consumo de energía. La topología de DS se ha usado ampliamente en instrumentación. La simplicidad y la solidez de los bloques dentro de los convertidores DS clásicos es la principal ventaja. Sin embargo, no son eficientes para aplicaciones donde se requiere mayor ancho de banda. Para ampliar el ancho de banda, los convertidores DS se han introducido en bucles ΔΣ. Esta topología ha sido nombrada como Integrating converters. Esta topología aumenta el ancho de banda en comparación con la arquitectura clásica de DS, pero a expensas de una mayor complejidad. En este trabajo, proponemos el uso de una nueva familia de convertidores DS que mantienen las ventajas de la arquitectura clásica e introducen la configuración del ruido. De esta forma, el ancho de banda aumenta sin bloques adicionales. El convertidor Self-Compensated noise-shaped DS (el nombre dado a la nueva topología) mantiene la función de transferencia de señal (STF) y la función de transferencia de ruido (NTF) de los Integrating converters. Sin embargo, presentamos una nueva topología en el núcleo del convertidor para conformar el ruido sin circuitos adicionales. De esta manera, se preserva la simplicidad de la arquitectura. Proponemos utilizar el Self-Compensated noise-shaped DS como un CDC para sensores MEMS. Este trabajo hace un estudio de la mejor integración posible de los dos bloques para mantener la integridad de la señal considerando el comportamiento electromecánico del sensor. El propósito de este circuito de acondicionamiento es conectarse a cualquier tipo de sensor MEMS capacitivo. Sin embargo, para demostrar los conceptos desarrollados en esta tesis, la arquitectura se ha conectado a un sensor MEMS de presión. Se ha implementado dos prototipos experimentales en un proceso CMOS de 130-nm utilizando la arquitectura mencionada anteriormente. Se ha logrado una relación señal-ruido máxima de 103.9 dB (equivalente a 1 Pa) con un tiempo de medida de 20 ms. El prototipo final tiene un consumo de energía de 220 μW con un área efectiva de 0.317 mm2. La arquitectura diseñada muestra un buen rendimiento comparable con las arquitecturas en el dominio de la amplitud que muestran resoluciones equivalentes.Programa Oficial de Doctorado en Ingeniería Eléctrica, Electrónica y AutomáticaPresidente: Pieter Rombouts.- Secretario: Alberto Rodríguez Pérez.- Vocal: Dietmar Strãußnig

Interface Circuits for Microsensor Integrated Systems

ca. 200 words; this text will present the book in all promotional forms (e.g. flyers). Please describe the book in straightforward and consumer-friendly terms. [Recent advances in sensing technologies, especially those for Microsensor Integrated Systems, have led to several new commercial applications. Among these, low voltage and low power circuit architectures have gained growing attention, being suitable for portable long battery life devices. The aim is to improve the performances of actual interface circuits and systems, both in terms of voltage mode and current mode, in order to overcome the potential problems due to technology scaling and different technology integrations. Related problems, especially those concerning parasitics, lead to a severe interface design attention, especially concerning the analog front-end and novel and smart architecture must be explored and tested, both at simulation and prototype level. Moreover, the growing demand for autonomous systems gets even harder the interface design due to the need of energy-aware cost-effective circuit interfaces integrating, where possible, energy harvesting solutions. The objective of this Special Issue is to explore the potential solutions to overcome actual limitations in sensor interface circuits and systems, especially those for low voltage and low power Microsensor Integrated Systems. The present Special Issue aims to present and highlight the advances and the latest novel and emergent results on this topic, showing best practices, implementations and applications. The Guest Editors invite to submit original research contributions dealing with sensor interfacing related to this specific topic. Additionally, application oriented and review papers are encouraged.

Low Power Cmos Circuit Design And Reliability Analysis For Wireless Me

A sensor node \u27AccuMicroMotion\u27 is proposed that has the ability to detect motion in 6 degrees of freedom for the application of physiological activity monitoring. It is expected to be light weight, low power, small and cheap. The sensor node may collect and transmit 3 axes of acceleration and 3 axes of angular rotation signals from MEMS transducers wirelessly to a nearby base station while attached to or implanted in human body. This dissertation proposes a wireless electronic system-on-a-single-chip to implement the sensor in a traditional CMOS process. The system is low power and may operate 50 hours from a single coin cell battery. A CMOS readout circuit, an analog to digital converter and a wireless transmitter is designed to implement the proposed system. In the architecture of the \u27AccuMicroMotion\u27 system, the readout circuit uses chopper stabilization technique and can resolve DC to 1 KHz and 200 nV signals from MEMS transducers. The base band signal is digitized using a 10-bit successive approximation register analog to digital converter. Digitized outputs from up to nine transducers can be combined in a parallel to serial converter for transmission by a 900 MHz RF transmitter that operates in amplitude shift keying modulation technique. The transmitter delivers a 2.2 mW power to a 50 Ù antenna. The system consumes an average current of 4.8 mA from a 3V supply when 6 sensors are in operation and provides an overall 60 dB dynamic range. Furthermore, in this dissertation, a methodology is developed that applies accelerated electrical stress on MOS devices to extract BSIM3 models and RF parameters through measurements to perform comprehensive study, analysis and modeling of several analog and RF circuits under hot carrier and breakdown degradation

Design of agile signal conditioning circuits for microelectromechanical sensors

Microelectromechanical systems (MEMS) are used in many applications to detect physical parameters and convert them to an electrical signal. The output of MEMS-based transducers is usually not suitable to be directly processed in the digital or the analog domain, and they could be as small as femto farads in capacitive sensing and micro volts in resistive sensing. Consequently, high sensitivity signal conditioning circuits are essential. In this thesis, it is shown that both the noise and input capacitance are important parameters to ensure optimal capacitive sensing. The dominant noise source in MEMS conditioning circuits is flicker noise, and one of the best methods to mitigate flicker noise is the chopping technique. Three different chopping techniques are considered: single chopper amplifier (SCA), dual chopper amplifier (DCA), and two-stage single chopper amplifier (TCA). Also, their sensitivity and power consumption based on the total gain and sensing capacitance are extracted. It is shown that the distribution of gain between the two stages in the DCA and TCA has a significant effect on the sensitivity, and, based on this distribution, the sensitivity and power consumption change significantly. For small sensor capacitances, the highest sensitivity could be achieved by a DCA because of its ability to decrease the noise floor and the input sensor capacitance simultaneously. A novel DCA is proposed to reach higher sensitivity and reduced power consumption. In this DCA, two supply voltages are utilized, and the second stage is composed of two parallel paths that improve the SNR and provide two gain settings. This circuit is fabricated in the GlobalFoundries 0.13 μm CMOS technology. The measurement results show a power consumption of 2.66 μW for the supply voltage of 0.7 V and of 3.26 μW for the supply voltage of 1.2 V. The single path DCA has a gain of 34 dB with bandwidth of 4 kHz and input noise floor of 25 nV/√Hz. The dual path DCA has a gain of 38 dB with bandwidth of 3 kHz and input noise floor of 40 nV/√Hz. To be able to detect the signal near DC frequencies, another circuit is proposed which has a configurable bandwidth and a sub-μHz noise corner frequency. This circuit is composed of three stages, and three chopping frequencies are used to mitigate the flicker noise of the three stages. The simulated circuit is designed in the GlobalFoundries 0.13 μm CMOS technology with supply voltages of 0.4 V and 1.2 V. The total power consumption is of 6.7 μW. A gain of 68 dB and bandwidths of 1, 10, 100 and 1000 Hz are achieved. The input referred noise floor is of 20.5 nV/√Hz and the design attains a good power efficiency factor of 4.0. In the capacitive mode, the noise floor is of 3.6 zF for a 100 fF capacitance sensor

DESIGN OF SMART SENSORS FOR DETECTION OF PHYSICAL QUANTITIES

Microsystems and integrated smart sensors represent a flourishing business thanks to the manifold benefits of these devices with respect to their respective macroscopic counterparts. Miniaturization to micrometric scale is a turning point to obtain high sensitive and reliable devices with enhanced spatial and temporal resolution. Power consumption compatible with battery operated systems, and reduced cost per device are also pivotal for their success. All these characteristics make investigation on this filed very active nowadays. This thesis work is focused on two main themes: (i) design and development of a single chip smart flow-meter; (ii) design and development of readout interfaces for capacitive micro-electro-mechanical-systems (MEMS) based on capacitance to pulse width modulation conversion. High sensitivity integrated smart sensors for detecting very small flow rates of both gases and liquids aiming to fulfil emerging demands for this kind of devices in the industrial to environmental and medical applications. On the other hand, the prototyping of such sensor is a multidisciplinary activity involving the study of thermal and fluid dynamic phenomenon that have to be considered to obtain a correct design. Design, assisted by finite elements CAD tools, and fabrication of the sensing structures using features of a standard CMOS process is discussed in the first chapter. The packaging of fluidic sensors issue is also illustrated as it has a great importance on the overall sensor performances. The package is charged to allow optimal interaction between fluids and the sensors and protecting the latter from the external environment. As miniaturized structures allows a great spatial resolution, it is extremely challenging to fabricate low cost packages for multiple flow rate measurements on the same chip. As a final point, a compact anemometer prototype, usable for wireless sensor network nodes, is described. The design of the full custom circuitry for signal extraction and conditioning is coped in the second chapter, where insights into the design methods are given for analog basic building blocks such as amplifiers, transconductors, filters, multipliers, current drivers. A big effort has been put to find reusable design guidelines and trade-offs applicable to different design cases. This kind of rational design enabled the implementation of complex and flexible functionalities making the interface circuits able to interact both with on chip sensors and external sensors. In the third chapter, the chip floor-plan designed in the STMicroelectronics BCD6s process of the entire smart flow sensor formed by the sensing structures and the readout electronics is presented. Some preliminary tests are also covered here. Finally design and implementation of very low power interfaces for typical MEMS capacitive sensors (accelerometers, gyroscopes, pressure sensors, angular displacement and chemical species sensors) is discussed. Very original circuital topologies, based on chopper modulation technique, will be illustrated. A prototype, designed within a joint research activity is presented. Measured performances spurred the investigation of new techniques to enhance precision and accuracy capabilities of the interface. A brief introduction to the design of active pixel sensors interface for hybrid CMOS imagers is sketched in the appendix as a preliminary study done during an internship in the CNM-IMB institute of Barcelona

Remote Operated Probe for Deep-water Cave Exploration

Předkládaná práce se zabývá návrhem a konstrukcí dálkově řízené sondy pro průzkum zatopených krasových oblastí. Cílem práce je zhotovení cenově přijatelné sondy pro speleologický výzkum. Soustava senzorů a dálkově řízený kamerový systém umožňuje pořízení záběrů z velkých hloubek, které lze později analyzovat.The diploma thesis is focused on remote-controlled probe design and realization for cave exploration. The main aim is to build price-affordable probe for speleology purposes. Sensor system and remote-controlled camera system enable to provide video scenes from large depth that can be analyzed in detail.

Integrated reference circuits for low-power capacitive sensor interfaces

This thesis consists of nine publications and an overview of the research topic, which also summarizes the work. The research described in this thesis concentrates on the design of low-power sensor interfaces for capacitive 3-axis micro-accelerometers. The primary goal throughout the thesis is to optimize power dissipation. Because the author made the main contribution to the design of the reference and power management circuits required, the overview part is dominated by the following research topics: current, voltage, and temperature references, frequency references, and voltage regulators. After an introduction to capacitive micro-accelerometers, the work describes the typical integrated readout electronics of a capacitive sensor on the functional level. The readout electronics can be divided into four different functional parts, namely the sensor readout itself, signal post-processing, references, and power management. Before the focus is shifted to the references and further to power management, different ways to realize the sensor readout are briefly discussed. Both current and voltage references are required in most analog and mixed-signal systems. A bandgap voltage reference, which inherently uses at least one current reference, is practical for the generation of an accurate reference voltage. Very similar circuit techniques can be exploited when implementing a temperature reference, the need for which in the sensor readout may be justified by the temperature compensation, for example. The work introduces non-linear frequency references, namely ring and relaxation oscillators, which are very suitable for the generation of the relatively low-frequency clock signals typically needed in the sensor interfaces. Such oscillators suffer from poor jitter and phase noise performance, the quantities of which also deserve discussion in this thesis. Finally, the regulation of the supply voltage using linear regulators is considered. In addition to extending the battery life by providing a low quiescent current, the regulator must be able to supply very low load currents and operate without off-chip capacitors

Solid State Circuits Technologies

The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book