370 research outputs found

    Composable Timed Automata Models for Real-Time Embedded Systems Middleware

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    Middleware for distributed real-time embedded (DRE) systems has grown more and more complex in recent years, to address functional and temporal requirements of complex real-time applications. While current approaches for modeling middleware have eased the task of assembling, deploying and configuring middleware and applications, a more formal, fundamental and lower-level set of models is needed to be able to uncover subtle safety and timing errors introduced by interference between computations, particularly in the face of alternative concurrency strategies in the middleware layer. In this paper, we examine how formal models of lower-level middleware building blocks provide an appropriate level of abstraction for both modeling and synthesis of a variety of kinds of middleware from these building blocks. When combined with model checking techniques, these formal models can help developers in constructing correct combinations and configurations of middleware mechanisms, for each particular application

    Analysis of embedded CORBA middleware performance on urban distributed transportation equipments

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    The increasing number of ITS (Intelligent Transportation Systems) equipment spread across cities offers tre- mendous possibilities in the development of distributed smart environments. A middleware layer located be- tween the operating system and the fi nal application can be used for the communication among the equipment to spontaneously act and cooperate among themselves. However, this middleware layer has also a computational cost that should be quanti fi ed as it can affect the main application. This paper de fi nes a methodology for such quanti fi cation using as case example a modern ITS equipment related to vehicle tracking using arti fi cial vision. Experimental results illustrate the proposed methodology.Ministerio de Educación y Ciencia DPI2007-60128Consejería de Innovación, Ciencia y Empresa P07-TIC-0262

    Designing Distributed, Component-Based Systems for Industrial Robotic Applications

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    none3noneM. Amoretti; S. Caselli; M. ReggianiM., Amoretti; S., Caselli; Reggiani, Monic

    The Fuzzy Feedback Scheduling of Real-Time Middleware in Cyber-Physical Systems for Robot Control

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    Cyber-physical systems for robot control integrate the computing units and physical devices, which are real-time systems with periodic events. This work focuses on CPS task scheduling in order to solve the problem of slow response and packet loss caused by the interaction between each service. The two-level fuzzy feedback scheduling scheme is designed to adjust the task priority and period according to the combined effects of the response time and packet loss. Empirical results verify the rationality of the cyber-physical system architecture for robot control and illustrate the feasibility of the fuzzy feedback scheduling method

    Efficient Customizable Middleware

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    The rather large feature set of current Distributed Object Computing (DOC) middleware can be a liability for certain applications which have a need for only a certain subset of these features but have to suffer performance degradation and code bloat due to all the present features. To address this concern, a unique approach to building fully customizable middleware was undertaken in FACET, a CORBA event channel written using AspectJ. FACET consists of a small, essential core that represents the basic structure and functionality of an event channel into which additional features are woven using aspects so that the resulting event channel supports all of the features needed by a given embedded application. However, the use of CORBA as the underlying transport mechanism may make FACET unsuitable for use in small-scale embedded systems because of the considerable footprint of many ORBs. In this thesis, we describe how the use of CORBA in the event channel can be made an optional feature in building highly efficient middle-ware. We look at the challenges that arise in abstracting the method invocation layer, document design patterns discovered and present quantitative footprint, throughput performance data and analysis. We also examine the problem of integrating FACET, written in Java, into the Boeing Open Experimental Platform (OEP), written in C++, in order to serve as a replacement for the TAO Real-Time Event Channel (RTEC). We evaluate the available alternatives in building such an implementation for efficiency, describe our use of a native-code compiler for Java, gcj, and present data on the efficacy of this approach. Finally, we take preliminary look into the problem of efficiently testing middleware with a large number of highly granular features. Since the number of possible combinations grow exponentially, building and testing all possible combinations quickly becomes impractical. To address this, we examine the conditions under which features are non-interfering. Non-interfering features will only need to be tested in isolation removing the need to test features in combination thus reducing the intractability of the problem

    The Design and Implementation of MCFlow: a Real-time Multi-core Aware Middleware for Dependent Task Graphs

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    Modern computer architectures have evolved from uni-processor platforms to multi-processor and multi-core plat- forms, but traditional real-time distributed middleware such as RT-CORBA has not kept pace with that evolution. To address those issues, this paper describes the design and implementation of MCFlow, a new real-time distributed middleware for dependent task graphs running on multi-core platforms. MCFlow provides the following contributions to the state of the art in real-time middleware: (1) it provides an efficient C++ based component model through which computations can be configured flexibly for execution within a single core, across cores of a common host, or spanning multiple hosts; (2) it allows optimizations for inter-component communication to avoid data copying without sacrificing the parallel executability of data dependent tasks; (3) it strictly separates timing and functional concerns of an application so that they can evolve and can be configured independently; and (4) it provides a novel event dispatching architecture that uses lock free algorithms to avoid mutex locking and reduce memory contention, CPU context switching, and priority inversion. We also present an empirical evaluation that demonstrates the efficacy of our approach
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