SCALABLE TECHNIQUES FOR SCHEDULING AND MAPPING DSP APPLICATIONS ONTO EMBEDDED MULTIPROCESSOR PLATFORMS

A variety of multiprocessor architectures has proliferated even for off-the-shelf computing platforms. To make use of these platforms, traditional implementation frameworks focus on implementing Digital Signal Processing (DSP) applications using special platform features to achieve high performance. However, due to the fast evolution of the underlying architectures, solution redevelopment is error prone and re-usability of existing solutions and libraries is limited. In this thesis, we facilitate an efficient migration of DSP systems to multiprocessor platforms while systematically leveraging previous investment in optimized library kernels using dataflow design frameworks. We make these library elements, which are typically tailored to specialized architectures, more amenable to extensive analysis and optimization using an efficient and systematic process. In this thesis we provide techniques to allow such migration through four basic contributions: 1. We propose and develop a framework to explore efficient utilization of Single Instruction Multiple Data (SIMD) cores and accelerators available in heterogeneous multiprocessor platforms consisting of General Purpose Processors (GPPs) and Graphics Processing Units (GPUs). We also propose new scheduling techniques by applying extensive block processing in conjunction with appropriate task mapping and task ordering methods that match efficiently with the underlying architecture. The approach gives the developer the ability to prototype a GPU-accelerated application and explore its design space efficiently and effectively. 2. We introduce the concept of Partial Expansion Graphs (PEGs) as an implementation model and associated class of scheduling strategies. PEGs are designed to help realize DSP systems in terms of forms and granularities of parallelism that are well matched to the given applications and targeted platforms. PEGs also facilitate derivation of both static and dynamic scheduling techniques, depending on the amount of variability in task execution times and other operating conditions. We show how to implement efficient PEG-based scheduling methods using real time operating systems, and to re-use pre-optimized libraries of DSP components within such implementations. 3. We develop new algorithms for scheduling and mapping systems implemented using PEGs. Collectively, these algorithms operate in three steps. First, the amount of data parallelism in the application graph is tuned systematically over many iterations to profit from the available cores in the target platform. Then a mapping algorithm that uses graph analysis is developed to distribute data and task parallel instances over different cores while trying to balance the load of all processing units to make use of pipeline parallelism. Finally, we use a novel technique for performance evaluation by implementing the scheduler and a customizable solution on the programmable platform. This allows accurate fitness functions to be measured and used to drive runtime adaptation of schedules. 4. In addition to providing scheduling techniques for the mentioned applications and platforms, we also show how to integrate the resulting solution in the underlying environment. This is achieved by leveraging existing libraries and applying the GPP-GPU scheduling framework to augment a popular existing Software Defined Radio (SDR) development environment -- GNU Radio -- with a dataflow foundation and a stand-alone GPU-accelerated library. We also show how to realize the PEG model on real time operating system libraries, such as the Texas Instruments DSP/BIOS. A code generator that accepts a manual system designer solution as well as automatically configured solutions is provided to complete the design flow starting from application model to running system

Noises Cancelling Adaptive Methods in Control Telemetry Systems of Oil Electrical Submersible Pumps

The main ideas of this paper are that only some from more than 10 MATLAB Adaptive Methods library may be useful and can be recommended to filter out High-Noises in similar Control Telemetry Channels of Electric Power Components like ESP Systems: only four of applied have shown successfully good results in the early prediction of the ESP motor real insulation disruption (like Sign-error, Sign-data and Sign-sign filters). The best among the ten analyzed adaptive filter algorithms was recognized to be, The Normalized LMS FIR filter algorithm — adaptfilt.nlm

Optimization of automatically generated multi-core code for the LTE RACH-PD algorithm

Embedded real-time applications in communication systems require high processing power. Manual scheduling devel-oped for single-processor applications is not suited to multi-core architectures. The Algorithm Architecture Matching (AAM) methodology optimizes static application implementation on multi-core architectures. The Random Access Channel Preamble Detection (RACH-PD) is an algorithm for non-synchronized access of Long Term Evolu-tion (LTE) wireless networks. LTE aims to improve the spectral efficiency of the next generation cellular system. This paper de-scribes a complete methodology for implementing the RACH-PD. AAM prototyping is applied to the RACH-PD which is modelled as a Synchronous DataFlow graph (SDF). An efficient implemen-tation of the algorithm onto a multi-core DSP, the TI C6487, is then explained. Benchmarks for the solution are given

Impact of the noise on the emulated grid voltage signal in hardware-in-the-loop used in power converters

This work evaluates the impact of the input voltage noise on a Hardware-In-the-Loop (HIL) system used in the emulation of power converters. A poor signal-to-noise ratio (SNR) can compromise the accuracy and precision of the model, and even make certain techniques for building mathematical models unfeasible. The case study presents the noise effects on a digitally controlled totem-pole converter emulated with a low-cost HIL system using an FPGA. The effects on the model outputs, and the cost and influence of different hardware implementations, are evaluated. The noise of the input signals may limit the benefits of increasing the resolution of the model.This research was funded by the Spanish Ministry of Science and Innovation under Project PID2021-128941OB-I00 TRENTI–Efficient Energy Transformation in Industrial Environment

Digital Low Level RF

The demand on high stability and precision on the RF voltage for modern accelerators, as well as better diagnostics, maintenance and flexibility is driving the community to develop Digital Low Level RF systems (DLLRF) for both linear accelerators and synchrotrons. The state of the art in digital technologies applied to DLLRF systems is reviewed; different designs developed or in development at various laboratories are surveyed

Evaluation of Design Tools for Rapid Prototyping of Parallel Signal Processing Algorithms

Digital signal processing (DSP) has become a popular method for handling not only signal processing, but communications, and control system applications. A DSP application of interest to the Air Force is high speed avionics processing. The real time computing requirements of avionics processing exceed the capabilities of current single chip DSP processors, and parallelization of multiple DSP processors is a solution to handle such requirements. Designing and implementing a parallel DSP algorithm has been a lengthy process often requiring different design tools and extensive programming experience. Through the use of integrated software development tools, rapid prototyping becomes possible by simulating algorithms, generating code for workstations or DSP microprocessors, and generating hardware description language code for hardware synthesis. This research examines the use of one such tool, the Signal Processing WorkSystem (SPW) by the Alta Group of Cadence Design Systems, Inc., and how SPW supports the rapid prototyping process from an avionics algorithm design through simulation and hardware implementation. Throughout this process, SPW is evaluated as an aid to the avionics designer to meet design objectives and evaluate tradeoffs to find the best blend of efficiency and effectiveness. By designing a two dimensional fast Fourier transform algorithm as a specific avionics algorithm and exploring implementation options, SPW is shown to be a viable rapid prototyping solution allowing an avionics designer to focus on design trade-offs instead of implementation details while using parallelization to meet real-time application requirements

Digital Signal Processing Research Program

Contains table of contents for Section 2, an introduction, reports on twenty-one research projects and a list of publications.U.S. Navy - Office of Naval Research Grant N00014-93-1-0686Lockheed Sanders, Inc. Contract P.O. BY5561U.S. Air Force - Office of Scientific Research Grant AFOSR 91-0034National Science Foundation Grant MIP 95-02885U.S. Navy - Office of Naval Research Grant N00014-95-1-0834MIT-WHOI Joint Graduate Program in Oceanographic EngineeringAT&T Laboratories Doctoral Support ProgramDefense Advanced Research Projects Agency/U.S. Navy - Office of Naval Research Grant N00014-89-J-1489Lockheed Sanders/U.S. Navy - Office of Naval Research Grant N00014-91-C-0125U.S. Navy - Office of Naval Research Grant N00014-89-J-1489National Science Foundation Grant MIP 95-02885Defense Advanced Research Projects Agency/U.S. Navy Contract DAAH04-95-1-0473U.S. Navy - Office of Naval Research Grant N00014-91-J-1628University of California/Scripps Institute of Oceanography Contract 1003-73-5

ПОШУК АДАПТИВНИХ МЕТОДІВ ІМУНІЗАЦІЇ З ВИСОКИМ РІВНЕМ ШУМУ, ЗАЯВУ ПРО НАФТОВОЇ ПРОМИСЛОВОСТІ ЕНЕРГЕТИЧНИХ КОМПЛЕКСІВ МОДЕЛЬ УПРАВЛІННЯ ТЕЛЕМЕТРІЄЮ

Here in the paper, an analog signal processing implementation was searched for the detection the most efficient adaptive noise cancellation filters among dozens of recognized ones for telemetry control systems of oil industry electrical submersible pump under severe noisily conditions.Here in the paper, an analog signal processing implementation was searched for the detection the most efficient adaptive noise cancellation filters among dozens of recognized ones for telemetry control systems of oil industry electrical submersible pump under severe noisily conditions