3,289 research outputs found

    Distributed video through telecommunication networks using fractal image compression techniques

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    The research presented in this thesis investigates the use of fractal compression techniques for a real time video distribution system. The motivation for this work was that the method has some useful properties which satisfy many requirements for video compression. In addition, as a novel technique, the fractal compression method has a great potential. In this thesis, we initially develop an understanding of the state of the art in image and video compression and describe the mathematical concepts and basic terminology of the fractal compression algorithm. Several schemes which aim to the improve of the algorithm, for still images are then examined. Amongst these, two novel contributions are described. The first is the partitioning of the image into sections which resulted insignificant reduction of the compression time. In the second, the use of the median metric as alternative to the RMS was considered but was not finally adopted, since the RMS proved to be a more efficient measure. The extension of the fractal compression algorithm from still images to image sequences is then examined and three different schemes to reduce the temporal redundancy of the video compression algorithm are described. The reduction in the execution time of the compression algorithm that can be obtained by the techniques described is significant although real time execution has not yet been achieved. Finally, the basic concepts of distributed programming and networks, as basic elements of a video distribution system, are presented and the hardware and software components of a fractal video distribution system are described. The implementation of the fractal compression algorithm on a TMS320C40 is also considered for speed benefits and it is found that a relatively large number of processors are needed for real time execution

    Deep Pipeline Architecture for Fast Fractal Color Image Compression Utilizing Inter-Color Correlation

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    Fractal compression technique is a well-known technique that encodes an image by mapping the image into itself and this requires performing a massive and repetitive search. Thus, the encoding time is too long, which is the main problem of the fractal algorithm. To reduce the encoding time, several hardware implementations have been developed. However, they are generally developed for grayscale images, and using them to encode colour images leads to doubling the encoding time 3× at least. Therefore, in this paper, new high-speed hardware architecture is proposed for encoding RGB images in a short time. Unlike the conventional approach of encoding the colour components similarly and individually as a grayscale image, the proposed method encodes two of the colour components by mapping them directly to the most correlated component with a searchless encoding scheme, while the third component is encoded with a search-based scheme. This results in reducing the encoding time and also in increasing the compression rate. The parallel and deep-pipelining approaches have been utilized to improve the processing time significantly. Furthermore, to reduce the memory access to the half, the image is partitioned in such a way that half of the matching operations utilize the same data fetched for processing the other half of the matching operations. Consequently, the proposed architecture can encode a 1024×1024 RGB image within a minimal time of 12.2 ms, and a compression ratio of 46.5. Accordingly, the proposed architecture is further superior to the state-of-the-art architectures.©2022 The Authors. Published by IEEE. This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/fi=vertaisarvioitu|en=peerReviewed

    An Efficient Design Approach of ROI Based DWT Using Vedic and Wallace Tree Multiplier on FPGA Platform

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    In digital image processing, the compression mechanism is utilized to enhance the visual perception and storage cost. By using hardware architectures, reconstruction of medical images especially Region of interest (ROI) part using Lossy image compression is a challenging task. In this paper, the ROI Based Discrete wavelet transformation (DWT) using separate Wallace- tree multiplier (WM) and modified Vedic Multiplier (VM) methods are designed. The Lifting based DWT method is used for the ROI compression and reconstruction. The 9/7 filter coefficients are multiplied in DWT using Wallace- tree multiplier (WM) and modified Vedic Multiplier (VM). The designed Wallace tree multiplier works with the parallel mechanism using pipeline architecture results with optimized hardware resources, and 8x8 Vedic multiplier designs improves the ROI reconstruction image quality and fast computation. To evaluate the performance metrics between ROI Based DWT-WM and DWT-VM on FPGA platform, The PSNR and MSE are calculated for different Brain MRI images, and also hardware constraints include Area, Delay, maximum operating frequency and power results are tabulated. The proposed model is designed using Xilinx platform using Verilog-HDL and simulated using ModelSim and Implemented on Artix-7 FPGA device

    PROCESS-PROPERTY-FABRIC ARCHITECTURE RELATIONSHIPS IN FIBRE-REINFORCED COMPOSITES

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    The use of fibre-reinforced polymer matrix composite materials is growing at a faster rate than GDP in many countries. An improved understanding of their processing and mechanical behaviour would extend the potential applications of these materials. For unidirectional composites, it is predicted that localised absence of fibres is related to longitudinal compression failure. The use of woven reinforcements permits more effective manufacture than for unidirectional fibres. It has been demonstrated experimentally that compression strengths of woven composites are reduced when fibres are clustered. Summerscales predicted that clustering of fibres would increase the permeability of the reinforcement and hence expedite the processing of these materials. Commercial fabrics are available which employ this concept using flow-enhancing bound tows. The net effect of clustering fibres is to enhance processability whilst reducing the mechanical properties. The effects reported above were qualitative correlations. Gross differences in the appearance of laminate sections are apparent for different weave styles. For the quantification of subtle changes in fabric architecture, the use of automated image analysis is essential. Griffm used Voronoi tessellation to measure the microstructures of composites made using flow-enhancing tows. The data was presented as histograms with no single parameter to quantify microstructure. This thesis describes the use of automated image analysis for the measurement of the microstructures of woven fibre-reinforced composites, and pioneers the use of fractal dimensions as a single parameter for their quantification. It further considers the process-property- structure relationships for commercial and experimental fabric reinforcements in an attempt to resolve the processing versus properties dilemma. A new flow-enhancement concept has been developed which has a reduced impact on laminate mechanical properties.University of Bristol and Carr Reinforcements Limite

    GaAs Implementation of FIR Filter

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    This thesis discusses the findings of the final year project involving Gallium Arsenide implementation of a triangular FIR filter to perform discrete wavelet transforms. The overall characteristics of Gallium Arsenide technology- its construction, behaviour and electrical charactersitics as they apply to VLSI technology - were investigated in this project. In depth understanding of its architecture is required to be able to understand the various design techniques employed. A comparison of Silicon and GaAs performance and other characteristics has also been made to fully justify the choice of this material for system implementation. A lot of research and active interest has gone into the field of image and video compression. Wavelet-based image transformation is one of the very efficient compression techniques used. An analysis of discrete wavelet transformations and the required triangular FIR filter was done to be able to produce a transform algorithm and the related filter architecture. Finally, the filter architecture was implemented as a VLSI design and layout. A variety of functional blocks required for the architecture were designed, tested and analysed. All these blocks were integrated to produce a model of a complete filter cell. The filter implementation was designed to be self-timed - without a system clock. Self-timed systems have considerable advantages over clocked architectures. Various design styles and handshaking mechanisms involved in designing a self-timed system were analysed and designed. There are many avenues still to explore. One of them is the VHDL analysis of filter architecture. Further development on this project would involve integration of higher-level logic and formation of a complete filter array

    A VHDL design for hardware assistance of fractal image compression

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    Fractal image compression schemes have several unusual and useful attributes, including resolution independence, high compression ratios, good image quality, and rapid decompression. Despite this, one major difficulty has prevented their widespread adoption: the extremely high computational complexity of compression. Fractal image compression algorithms represent an image as a series of contractive transformations, each of which maps a large domain block to a smaller range block. Given only this set of transformations, it is possible to reconstruct an approximation of the original image by iteratively applying the transformations to an arbitrary image. Compression consists of partitioning the image into range blocks and finding a suitable transformation of a domain block to represent each one. This search for transformations must generally be done using a brute force approach, comparing successive domain blocks until a suitable match is found. Some algorithmic improvements have been found, but none are adequate to reduce the required compression time to something reasonable for many uses. This thesis presents a new ASIC design which performs a large number of the required comparisons in parallel, yielding a substantial speedup over a program on a general-purpose computer system. This ASIC is designed in VHDL, which may be synthesized to many different target architectures. The design has considerable flexibility which makes it applicable to different images and applications. The design is based around a pipeline of units that each compare one range block with a series of domain blocks which are fed through the pipeline. Comparisons are made to minimize the mean square error (MSE) of a transform given a linear mapping of the intensity values. This is, by far, the most common minimization strategy used in the literature. The speedup provided by this design is estimated to be about 1,000 times for 256 x 256 images divided into 8x8 blocks over a sequential processor given similar implementation technologies

    Recent advances in coding theory for near error-free communications

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    Channel and source coding theories are discussed. The following subject areas are covered: large constraint length convolutional codes (the Galileo code); decoder design (the big Viterbi decoder); Voyager's and Galileo's data compression scheme; current research in data compression for images; neural networks for soft decoding; neural networks for source decoding; finite-state codes; and fractals for data compression

    A Review on Block Matching Motion Estimation and Automata Theory based Approaches for Fractal Coding

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    Fractal compression is the lossy compression technique in the field of gray/color image and video compression. It gives high compression ratio, better image quality with fast decoding time but improvement in encoding time is a challenge. This review paper/article presents the analysis of most significant existing approaches in the field of fractal based gray/color images and video compression, different block matching motion estimation approaches for finding out the motion vectors in a frame based on inter-frame coding and intra-frame coding i.e. individual frame coding and automata theory based coding approaches to represent an image/sequence of images. Though different review papers exist related to fractal coding, this paper is different in many sense. One can develop the new shape pattern for motion estimation and modify the existing block matching motion estimation with automata coding to explore the fractal compression technique with specific focus on reducing the encoding time and achieving better image/video reconstruction quality. This paper is useful for the beginners in the domain of video compression

    Transformation and dynamic visualization of images from computer through an FPGA in a matrix of LED

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    This article shows the implementation of a system that uses a graphic interface to load a digital image into a programmable logic device, which is stored in its internal RAM memory and is responsible for visualizing it in a matrix of RGB LEDs, so that This way, the LEDs show an equivalent to the image that was sent from the PC, conserving an aspect ratio and respecting as much as possible the color of the original image. To carry out this task, a Matlab script was designed to load the image, convert and format the data, which are transmitted to the FPGA using the RS232 protocol. The FPGA is in charge of receiving them, storing them and generating all the signals of control and synchronization of the system including the control of the PWM signals necessary to conserve the brightness of each one of the LEDs. This system allows the visualization of static images in standard formats and, in addition, thanks to the flexibility of the hardware used, it allows the visualization of moving images type GIF
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