Functionalization of nanomaterials by atomic layer deposition

126 p.La deposición de capas atómicas o ¿Atomic Layer Deposition¿ (ALD) es unatécnica sencilla pero poderosa para el recubrimiento y la modificación de losnanomateriales. El proceso se basa en la reacción sólido-gas, en la cual losprecursores se introducen por separado en fase gaseosa y reaccionan con la superficiesólida. La introducción de los precursores por fases o ciclos, lleva finalmente, alcrecimiento controlado del material deseado. Este mecanismo de trabajo especial,presenta ventajas prometedores como la alta precisión del espesor, el crecimiento nodireccional y la alta uniformidad en comparación con otros métodos de recubrimientocomo la Deposición Química de Vapor o CVD (de sus siglas en inglés ChemicalVapor Deposition). Ocasionalmente se suele llevar a cabo un proceso de ALDmodificado, llamado infiltración en fase vapor, en el que se introduce y se infiltra unprecursor metálico en materiales blandos. Esto a menudo produce interesantesalteraciones en las propiedades intrínsecas de los materiales, incluyendo laspropiedades eléctricas, mecánicas, ópticas, etc. Tanto el recubrimiento como lainfiltración a través del ALD son cada vez más interesantes para la ciencia de losmateriales. Esta tesis estudia desde los aspectos fundamentales del mecanismo dereacción entre los precursores y los grupos funcionales en el ALD, hasta elcrecimiento de nanopartículas y la fabricación de nanoestructuras a través del ALD.En la primera parte de esta tesis, se presenta un método sintético para fabricardistintas nanoestructuras basados en ZnO incluyendo nanopartículas 0D, nanotubos1D y nanoláminas 2D a través de ALD y de la elección de diferentes plantillas. Porejemplo, moléculas hidrófobas e hidrófilas son auto-ensambladas como plantillas. Lasnanopartículas de ZnO se sintetizan en las zonas hidrófilas de la superficie medianteALD. Usando nanofibras electrohiladas o nanocubos de NaCl como plantilla, seobtienen nanotubos de ZnO 1D y nanoláminas 2D de ZnO por medio del crecimientode ZnO con ALD y la posterior eliminación de la plantilla. Esta ruta sintética usandoel ALD ofrece nuevas posibilidades para la síntesis sencilla de nanoestructuras, convarias aplicaciones potenciales.CIC NanoGUN

Memristive Non-Volatile Memory Based on Graphene Materials

Resistive random access memory (RRAM), which is considered as one of the most promising next-generation non-volatile memory (NVM) devices and a representative of memristor technologies, demonstrated great potential in acting as an artificial synapse in the industry of neuromorphic systems and artificial intelligence (AI), due its advantages such as fast operation speed, low power consumption, and high device density. Graphene and related materials (GRMs), especially graphene oxide (GO), acting as active materials for RRAM devices, are considered as a promising alternative to other materials including metal oxides and perovskite materials. Herein, an overview of GRM-based RRAM devices is provided, with discussion about the properties of GRMs, main operation mechanisms for resistive switching (RS) behavior, figure of merit (FoM) summary, and prospect extension of GRM-based RRAM devices. With excellent physical and chemical advantages like intrinsic Young’s modulus (1.0 TPa), good tensile strength (130 GPa), excellent carrier mobility (2.0 × 105 cm2∙V−1∙s−1), and high thermal (5000 Wm−1∙K−1) and superior electrical conductivity (1.0 × 106 S∙m−1), GRMs can act as electrodes and resistive switching media in RRAM devices. In addition, the GRM-based interface between electrode and dielectric can have an effect on atomic diffusion limitation in dielectric and surface effect suppression. Immense amounts of concrete research indicate that GRMs might play a significant role in promoting the large-scale commercialization possibility of RRAM devices

Fabrication of semiconductor nanowire multifunctional devices

Portable multi-functional devices can play a major role in the new age society embracing internet-of-things (IoT). Being able to perform primary functions such as sensing and secondary functions such as storing information is quite critical when out of connectivity. However, such bespoke devices are almost unheard of as it is very difficult to fabricate it due to several factors such as device architecture, dimension, scalability, and parasitic effects. This work describes the fabrication and characterization of a multi-functional device that acts an ultra-sensitive pressure sensor but is also capable of storing that information for a prolonged period. Both sensitivity and charge storage ability are attributed to the inclusion of one-dimensional (1-D) nanostructures. The alternating crystal phases in the as-grown gold (Au) catalyzed GaAs and self-induced AlGaAs/GaAs nanowires (NWs) were used in our case. This thesis discusses the fabrication, growth, characterization, integration and electrical testing involved to produce the multi-functional device. Bespoke nanowires were grown on a template prepared using a combination of nanosphere (NSL) and nanoimprint lithography (NIL) which provided a reproducible large-area periodic array of growth site at a relatively low cost. The inclusion of these NWs in the polymer helps enhance the relative permittivity of the host polymer by a factor of 40 making it an almost-perfect dielectric for a capacitive pressure sensor. NWs also acted as charge storage nodes allowing to extend the functionality. The technique consists of creating nanoholes in silicon dioxide (SiO2) to expose the silicon Si (111) beneath where self-induced NWs can nucleate, while nanodots deposited onto the Si (111) surface serve as catalyst seeds. For Au-catalysed NWs, a monolayer of self-assembled polystyrene nanospheres (PNS 300 nm) was created on a 2 inch Si wafer by spin coating and later etched for a short time before a very thin Au-catalyst layer was deposited. In turn, for self-induced, PNS monolayer was created onto a SiO2-Si substrate. A longer etch was required to reduce PNS diameter significantly to leave relatively larger spacing where chromium is blanket deposited. PNS were lifted off by sonicating the samples in toluene produce the periodic arrays of nanodots and nanoholes, respectively. The underlying SiO2 was etched further through the nanoholes to uncover the Si below. 200 nm holes and 30-70 nm dots were demonstrated through the bespoke methods. The patterned substrates served as master templates, subsequently copied using polydimethylsiloxane (PDMS) to produce a flexible stamp for nanoimprint lithography. A bi-layer resist lift off process was developed to print the replicated nanodots or nanoholes on large-area substrates onto which GaAs NWs were subsequently grown. GaAs NWs were extracted and mixed in PMMA to produce a composite dielectric which was sandwiched between electrodes to act as a capacitor. An order of magnitude increase in relative permittivity (ϵr) is observed after the addition of the NWs allowing a high signal to noise ratio output on the application of pressure. This is due to the addition of higher permittivity nano-filler in the matrix. Furthermore, it was demonstrated that encapsulated high aspect ratio NWs in a host (polymer in this case) can be integrated in devices to improve existing functionality. Devices were successfully fabricated for pressure sensing and memory using the above described low-cost high-volume process with high sensitivity and large memory window, respectively. This demonstration is one of the first steps in enabling low cost electronics without compromising on performance which is imperative for IoT

RESISTIVE SWITCHING CHARACTERISTICS OF NANOSTRUCTURED AND SOLUTION-PROCESSED COMPLEX OXIDE ASSEMBLIES

Miniaturization of conventional nonvolatile (NVM) memory devices is rapidly approaching the physical limitations of the constituent materials. An emerging random access memory (RAM), nanoscale resistive RAM (RRAM), has the potential to replace conventional nonvolatile memory and could foster novel type of computing due to its fast switching speed, high scalability, and low power consumption. RRAM, or memristors, represent a class of two terminal devices comprising an insulating layer, such as a metal oxide, sandwiched between two terminal electrodes that exhibits two or more distinct resistance states that depend on the history of the applied bias. While the sudden resistance reduction into a conductive state in metal oxide insulators has been known for almost 50 years, the fundamental resistive switching mechanism is a complex phenomenon that is still long-debated, complex process. Further improvements to existing memristor performance require a complete understanding of memristive properties under various operation conditions. Additional technical issues also remain, such as the development of facile, low-cost fabrication methods as an alternative to expensive, ultra-high vacuum (UHV) deposition methods. This collection of work explores resistive switching within metal oxide-based memristive material assemblies by analyzing the fundamental physical insulating material properties. Chapter 3 aims to translate the utility and simplicity of the highly ordered anodic aluminum oxide (AAO) template structure to complex, yet more functional (memristive) materials. Functional oxides possessing ordered, scalable nanoporous arrays and nanocapacitor arrays over a large area is of interest to both the fields of next-generation electronics and energy storing/harvesting devices. Here their switching performance will be evaluated using conductive atomic force microscopy (C-AFM). Chapter 4 demonstrates a convective self-assembly fabrication method that effectively enables the synthesis of a low-cost solution processed memristor comprising binary oxide and perovskite ABO3 nanocrystals of varying diameter. Chapter 5 systematically compares the influence of inter-nanoparticle distance on the threshold switching SET voltage of hafnium oxide (HfO2) memristors. Utilizing shorter phosphonic acid ligands with higher binding affinity on the nanocrystal surface enabled a record-low SET voltage to be achieved. Chapter 6 extends the scope to the fine tuning of solution processed memristors with two types of perovskites nanocrystals. The primary advantage of nanocrystal memristors is the ability to draw from additional degrees of freedom by tuning the constituent nanocrystal material properties. Recent advancement of solution phase techniques enables a high degree of controllability over the nanocrystal size and structure. Thus, this work found in this dissertation aims to understand and decouple the effects of the geometric size and substitutional nanocrystal parameters on resistive switching

Thin-film Block Copolymers (BCPs) Self-assembly as Versatile Patterning Scheme for Functional Nanomaterials

Nanopattern generation is required for building various structural entities in every production process that involves nanostructures. Advancing nanopatterning technologies play an important role in developing and broadening the current nanopatterning technologies to meet up with the ever-demanding requirements in the realm of smaller feature sizes, smoother line-edge roughness (LER) and facile pattern transfer in pursuit of faster computer processors, better electrocatalysts and more compact and intelligent sensors, etc. Conventionally, patterning needs are heavily relied on photolithography, a technique that dominate chip-making industry for more than 50 years. However conventional photolithography is bounded by inherent resolution limits and difficult to be applied on non-flat, flexible, or stretchable substrates. Advancement in patterning techniques are urgently needed to enhance the capability for sub-10 nm patterning onto versatile substrates. The patterning techniques adopted in this work is a bottom-up self-assembly driven scheme based on the phase segregation of block copolymers (BCPs). Cleverly designed BCPs system can generate self-assembled pattern to give a sub-10 nm pitch, demonstrating the tremendous potential of novel BCP chemistries in generating sub-10 nm features. Recent excellent works on BCPs with sub-10 nm natural periods are timely reviewed, and key principles in designing next generation BCP candidates for extreme scale lithography are proposed in the outlook. Thin film BCPs templates were leveraged to generate patterns on various substrates including silicon, gold, glassy carbon, reduced graphene oxide, Nafion ® membrane, and perfluorinated anion exchange membrane. The profound meaning of these demonstration is twofold, firstly showcased the robustness and wide portability of the tested BCP patterning scheme, secondly demonstration of introducing the BCP templates onto smart substrates that have special functionality and wide implications. Further ionization and metallization of BCPs templates exemplify the feasibility of fabricating nanostructured electrolytes and metal nanowires with controlled periodic features sizes. Ordered nanostructures with designed ionic loadings, metal densities on functional substrates open up tremendous possibility to be incorporated into sensor, nanoseparators and nanoreactors with novel properties that yet to be uncovered

Non-volatile organic memory devices: from design to applications

The research activity described in the attached dissertation focused on the development, fabrication and characterization of new non-volatile memory elements based on organic technology. During the last few decades, organic materials based devices have attracted considerable interest due to their great potential for future electronic systems. Low fabrication costs, high mechanical flexibility and versatility of the chemical structure, good scalability and easy processing are the unique advantages of organic electronics. As memory devices are essential elements of any kind of electronic system, the development of organic memory devices is fundamental in order to extend the application of organic materials to different electronic circuits. Research on organic electronic memories is currently at a rapid growth stage, since it is recognized that they may be an alternative or supplementary to the conventional memory technologies. Despite considerable progress in the advancement of novel memory technologies in recent years, some challenging tasks still need to be resolved. The Ph.D. research activity of this thesis is related to the still -opened challenges in the organic memories technologies. In particular, it focused mainly on the study, development, fabrication and characterization of new non-volatile organic memory elements based on resistive switching. The activity has been carried out in the frame of the European project “HYbrid organic/inorganic Memory Elements for integration of electronic and photonic Circuitry” (HYMEC), which involved the University of Cagliari during the last three years. The project goal was to realize new hybrid inorganic/organic resistive memory devices with functionality far beyond the state of the art. A complementary activity on transistor-based organic memory devices has been also carried out and described in this thesis. As regards resistive memory devices, the research activity included design, fabrication and testing of a novel non-volatile memory device based on the combination of an air-stable organic semiconductor and metal nanoparticles. This topic required the development of technology and procedures for easy and reliable production of devices as well as the definition of measurement protocols. The proposed structure was thoroughly characterized by morphological techniques, which allowed to interpret the resistive switching mechanisms in terms of formation and rupture of metallic filaments inside the organic layer assisted by the metal NPs. The obtained performances are the best reported so far in literature, and, to our knowledge, the statistics analysis is the largest ever reported for organic-based resistive memories. The developed technology was then successfully applied on flexible plastic substrates. The definition of technological processes for the reliable fabrication of high performance printed organic memory devices was also carried out: this work clearly demonstrates the real possibility of fabricating high performance printed memory elements. A significant effort was also devoted to the development of basic memory/sensor systems entirely fabricated on plastic substrates. The suitability of organic non-volatile memory devices for the detection and the storage of external parameters was demonstrated. The results definitely demonstrated the feasibility of the proposed technology for the fabrication of systems including organic memories for their final application in different industrial processes, including e-textile and smart packaging. As regards transistor memory devices, highly flexible Organic Field-Effect Transistor (OFET)-based memory elements with excellent mechanical stability and high retention time were developed. As main innovation with respect to the state of the art, low voltage operation of the OFET-based memory was investigated. Such an activity was also related to the development of reliable measurement procedure

Solid State Circuits Technologies

The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book

Dielectric relaxation and frequency dependence of Hf02 doped by lanthanide elements

The decreasing sizes in complementary metal oxide semiconductor (CMOS) transistor technology requires the replacement of SiO2 with gate dielectrics that have a high dielectric constant (k). When the SiO2 gate thickness was reduced below 1.4 nm, electron tunneling effects and high leakage currents occurred which presented serious obstacles for the reliability issue in terms of metal-oxide-semiconductor field-effect transistor (MOSFET) devices. In recent years, various alternative gate dielectrics have been researched. Following the introduction of HfO2 into the 45 nm process by Intel in 2007, the screening and selection of high-k gate stacks, understanding their properties, and their integration into CMOS technology has been a very active research area. Frequency dispersion of high-k dielectrics was commonly observed and classified into two parts: extrinsic and intrinsic causes. The frequency dependence of the dielectric constant (k-value), that is the intrinsic frequency dispersion, could not be assessed before suppressing the effects of extrinsic frequency dispersion, such as the effects of the lossy interfacial layer (between the high-k thin film and silicon substrate) and the parasitic effects. The significance of parasitic effects (including series resistance and the back metal contact of the metal-oxide-semiconductor (MOS) capacitor) on frequency dispersion was studied. The effect of the lossy interfacial layer on frequency dispersion was investigated and modeled using a dual frequency technique. The effect of surface roughness on frequency dispersion is also investigated. Several mathematical models were discussed to describe the dielectric relaxation of high-k dielectrics. Some of the relaxation behavior can be modeled using the Curie-von Schweidler (CS) law, the Kohlrausch-Williams-Watts (KWW) relationship and the Havriliak-Negami (HN) relationship. Other relaxation models were also introduced. For the physical mechanism, dielectric relaxation was found to be related to the degree of polarization, which was dependent on the structure of the high-k material. The degree of polarization was attributed to the enhancement of the correlations among polar nano-scale size domain within the materials. The effect of grain size for the high-k materials' structure mainly originated from higher surface stress in smaller grain size due to its higher concentration of grain boundary

OXIDE-BASED MEMRISTIVE DEVICES BY BLOCK COPOLYMER SELF-ASSEMBLY

Oxide-based memristive systems represent today an emerging class of devices with a significant potential in memory, logic, and neuromorphic circuit applications. These devices have a simple capacitor structure and promise superior scalability together with favorable memory performances. This thesis presents a study of resistive switching phenomena in HfOx-based nanoscale memristive devices, with focus on material properties and development of bottom-up approaches for the fabrication of structures with dimension down to the nanoscale. One of the main issues for practical applications regarding device variability is first assessed by doping hafnium oxide films with different concentrations of aluminum atoms. Testing devices are analyzed by physico-chemical and electrical techniques in order to define the effect of oxide doping on the device properties. In the following part of the thesis, the scalability limit is explored in very high density arrays of nanodevices produced exploiting a lithographic approach based on the bottom-up self-assembly of block copolymer templates. This technique allows a tight control over the size and density of the defined features, and the possibilities offered by block copolymer patterning are here discussed. Electrical measurements of the nanodevices are performed through conductive atomic force microscopy. The device variability is examined and related to the inherent oxide non-homogeneity at the nanoscale, while a non-volatile switching of the resistance of the nanodevices is demonstrated. Further, this analysis draws the attention to a crosstalk phenomenon occurring at the nanoscale in a continuous thin film geometry. This result suggests to select different system configurations. A promising technique based on selective reactions with one copolymer block is finally discussed which allows the direct production of oxide patterns from block copolymer templates avoiding a pattern transfer process. In conclusion, the results reported in this thesis highlight the high scalability potential of oxide-based memristive devices, providing a missing piece of information for the understanding and practical development of very high density arrays