259 research outputs found

    Gaussian Pulse-Based Two-Threshold Parallel Scaling Tone Reservation for PAPR Reduction of OFDM Signals

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    Tone Reservation (TR) is a technique proposed to combat the high Peak-to-Average Power Ratio (PAPR) problem of Orthogonal Frequency Division Multiplexing (OFDM) signals. However conventional TR suffers from high computational cost due to the difficulties in finding an effective cancellation signal in the time domain by using only a few tones in the frequency domain. It also suffers from a high cost of hardware implementation and long handling time delay issues due to the need to conduct multiple iterations to cancel multiple high signal peaks. In this paper, we propose an efficient approach, called two-threshold parallel scaling, for implementing a previously proposed Gaussian pulse-based Tone Reservation algorithm. Compared to conventional approaches, this technique significantly reduces the hardware implementation complexity and cost, while also reducing signal processing time delay by using just two iterations. Experimental results show that the proposed technique can effectively reduce the PAPR of OFDM signals with only a very small number of reserved tones and with limited usage of hardware resources. This technique is suitable for any OFDM-based communication systems, especially for Digital Video Broadcasting (DVB) systems employing large IFFT/FFT transforms

    An efficient reconfigurable peak cancellation model for peak to average power ratio reduction in orthogonal frequency division multiplexing communication system

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    The peak to average power ratio (PAPR) in orthogonal frequency division multiplexing (OFDM) communication system will be reduced using reconfigurable peak cancellation (RPC). RPC will also aid in improves the error vector magnitude (EVM) and reduces adjacent channel leakage ratio (ACLR) in OFDM communication system. The proposed RPC design methodology and practical implementation using field programmable gate array (FPGA) are discussed. The proposed RPC has been demonstrated using VIRTEX-7 XC7Z100 dual-core FPGA device with less hardware difficulty and minimum utilization of FPGA resources. The proposed RPC improves the efficiency of OFDM communication process by reducing complementary cumulative distribution function (CCDF) with respect to instantaneous power in dB. A comparison analysis was done between the existing selective mapping (SLM) method with proposed RPS method with respect FPGA resource utilization. The proposed RPC is implemented using VIRTEX-7 XC7Z100 dual-core FPGA device. Its effectively utilizing sub-carriers, fast Fourier transform (FFT) filter, bandwidth, and sampling frequency. Due to parallel switching operation, it reduces the PAPR, ACLR and improves EVM in OFDM signal with less hardware complexity

    THE PEAK WINDOWING FOR PAPR REDUCTION IN SOFTWARE DEFINED RADIO BASE STATIONS

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    The utilization of the techniques for Peak to Average Power Ratio (PAPR) reduction makes the wireless infrastructure conform to rigorous telecommunication standard specifications (error vector magnitude (EVM), bit error rate (BER), transmit spectrum mask (TSM)). In modern modulation schemes reduction of PAPR is important requirement for distortion free and energy-efficient operation of power amplifiers (PA). In this paper novel implementation of Peak Windowing method for PAPR reduction in Software Defined Radio (SDR) Base Stations (BS) is presented. The measurement results in terms of EVM and ACPR are given for 5MHz, 10MHz, 15MHz, 20MHz Long-Term Evolution (LTE) and Wideband Code Division Multiple Access (WCDMA) modulations. In case of 10MHz LTE signal, we achieved PAPR=8dB, EVM=2.0%, ACPR -52dBc at modulated PA output, antenna point

    Self-interference cancellation enabling high-throughput short-reach wireless full-duplex communication

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    In-band full-duplex (FD) wireless communication allows the simultaneous transmission and reception of data at the same frequency band, effectively doubling the spectral efficiency and data rate while reducing the latency. Previously published designs mostly target the self-interference (SI) cancellation in conventional wireless systems. In this paper, we focus on real-time SI cancellation for short-reach wireless FD systems. The superior signal quality of a point-to-point short-reach wireless system, allows the utilization of wideband communications to achieve a high throughput. Besides, in such wireless systems, the impacts of phase noise and nonlinear distortions are largely reduced, easing the SI cancellation. Moreover, the degradation of signal reception quality due to FD operation is experimentally evaluated in different environments. Experimental results of a prototype implementation show that a combination of antenna isolation and digital cancellation can already achieve an overall SI cancellation performance of 72.5 dB over a bandwidth of 123 MHz. This prototype can support a high-data-rate FD communication link of close to 1 Gbps up to 300 cm with an error vector magnitude lower than -26 dB in a typical indoor environment

    Automatic transmit power control for power efficient communications in UAS

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    Nowadays, unmanned aerial vehicles (UAV) have become one of the most popular tools that can be used in commercial, scientific, agricultural and military applications. As drones become faster, smaller and cheaper, with the ability to add payloads, the usage of the drone can be versatile. In most of the cases, unmanned aerials systems (UAS) are equipped with a wireless communication system to establish a link with the ground control station to transfer the control commands, video stream, and payload data. However, with the limited onboard calculation resources in the UAS, and the growing size and volume of the payload data, computational complex signal processing such as deep learning cannot be easily done on the drone. Hence, in many drone applications, the UAS is just a tool for capturing and storing data, and then the data is post-processed off-line in a more powerful computing device. The other solution is to stream payload data to the ground control station (GCS) and let the powerful computer on the ground station to handle these data in real-time. With the development of communication techniques such as orthogonal frequency-division multiplexing (OFDM) and multiple-input multiple-output (MIMO) transmissions, it is possible to increase the spectral efficiency over large bandwidths and consequently achieve high transmission rates. However, the drone and the communication system are usually being designed separately, which means that regardless of the situation of the drone, the communication system is working independently to provide the data link. Consequently, by taking into account the position of the drone, the communication system has some room to optimize the link budget efficiency. In this master thesis, a power-efficient wireless communication downlink for UAS has been designed. It is achieved by developing an automatic transmit power control system and a custom OFDM communication system. The work has been divided into three parts: research of the drone communication system, an optimized communication system design and finally, FPGA implementation. In the first part, an overview on commercial drone communication schemes is presented and discussed. The advantages and disadvantages shown are the source of inspiration for improvement. With these ideas, an optimized scheme is presented. In the second part, an automatic transmit power control system for UAV wireless communication and a power-efficient OFDM downlink scheme are proposed. The automatic transmit power control system can estimate the required power level by the relative position between the drone and the GCS and then inform the system to adjust the power amplifier (PA) gain and power supply settings. To obtain high power efficiency for different output power levels, a searching strategy has been applied to the PA testbed to find out the best voltage supply and gain configurations. Besides, the OFDM signal generation developed in Python can encode data bytes to the baseband signal for testing purpose. Digital predistortion (DPD) linearization has been included in the transmitter’s design to guarantee the signal linearity. In the third part, two core algorithms: IFFT and LUT-based DPD, have been implemented in the FPGA platform to meet the real-time and high-speed I/O requirements. By using the high-level synthesis design process provided by Xilinx Corp, the algorithms are implemented as reusable IP blocks. The conclusion of the project is given in the end, including the summary of the proposed drone communication system and envisioning possible future lines of research

    Practical Guidelines for Approaching the Implementation of Neural Networks on FPGA for PAPR Reduction in Vehicular Networks

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    Nowadays, the sensor community has become wireless, increasing their potential and applications. In particular, these emerging technologies are promising for vehicles' communications (V2V) to dramatically reduce the number of fatal roadway accidents by providing early warnings. The ECMA-368 wireless communication standard has been developed and used in wireless sensor networks and it is also proposed to be used in vehicular networks. It adopts Multiband Orthogonal Frequency Division Multiplexing (MB-OFDM) technology to transmit data. However, the large power envelope fluctuation of OFDM signals limits the power efficiency of the High Power Amplifier (HPA) due to nonlinear distortion. This is especially important for mobile broadband wireless and sensors in vehicular networks. Many algorithms have been proposed for solving this drawback. However, complexity and implementations are usually an issue in real developments. In this paper, the implementation of a novel architecture based on multilayer perceptron artificial neural networks on a Field Programmable Gate Array (FPGA) chip is evaluated and some guidelines are drawn suitable for vehicular communications. The proposed implementation improves performance in terms of Peak to Average Power Ratio (PAPR) reduction, distortion and Bit Error Rate (BER) with much lower complexity. Two different chips have been used, namely, Xilinx and Altera and a comparison is also provided. As a conclusion, the proposed implementation allows a minimal consumption of the resources jointly with a higher maximum frequency, higher performance and lower complexity.This work has been partly funded by projects TERESA-ADA (TEC2017-90093-C3-2-R) (MINECO/AEI/FEDER, UE) and ELISA (TEC2014-59255-C3-3-R)

    ワイヤレス通信のための先進的な信号処理技術を用いた非線形補償法の研究

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    The inherit nonlinearity in analogue front-ends of transmitters and receivers have had primary impact on the overall performance of the wireless communication systems, as it gives arise of substantial distortion when transmitting and processing signals with such circuits. Therefore, the nonlinear compensation (linearization) techniques become essential to suppress the distortion to an acceptable extent in order to ensure sufficient low bit error rate. Furthermore, the increasing demands on higher data rate and ubiquitous interoperability between various multi-coverage protocols are two of the most important features of the contemporary communication system. The former demand pushes the communication system to use wider bandwidth and the latter one brings up severe coexistence problems. Having fully considered the problems raised above, the work in this Ph.D. thesis carries out extensive researches on the nonlinear compensations utilizing advanced digital signal processing techniques. The motivation behind this is to push more processing tasks to the digital domain, as it can potentially cut down the bill of materials (BOM) costs paid for the off-chip devices and reduce practical implementation difficulties. The work here is carried out using three approaches: numerical analysis & computer simulations; experimental tests using commercial instruments; actual implementation with FPGA. The primary contributions for this thesis are summarized as the following three points: 1) An adaptive digital predistortion (DPD) with fast convergence rate and low complexity for multi-carrier GSM system is presented. Albeit a legacy system, the GSM, however, has a very strict requirement on the out-of-band emission, thus it represents a much more difficult hurdle for DPD application. It is successfully implemented in an FPGA without using any other auxiliary processor. A simplified multiplier-free NLMS algorithm, especially suitable for FPGA implementation, for fast adapting the LUT is proposed. Many design methodologies and practical implementation issues are discussed in details. Experimental results have shown that the DPD performed robustly when it is involved in the multichannel transmitter. 2) The next generation system (5G) will unquestionably use wider bandwidth to support higher throughput, which poses stringent needs for using high-speed data converters. Herein the analog-to-digital converter (ADC) tends to be the most expensive single device in the whole transmitter/receiver systems. Therefore, conventional DPD utilizing high-speed ADC becomes unaffordable, especially for small base stations (micro, pico and femto). A digital predistortion technique utilizing spectral extrapolation is proposed in this thesis, wherein with band-limited feedback signal, the requirement on ADC speed can be significantly released. Experimental results have validated the feasibility of the proposed technique for coping with band-limited feedback signal. It has been shown that adequate linearization performance can be achieved even if the acquisition bandwidth is less than the original signal bandwidth. The experimental results obtained by using LTE-Advanced signal of 320 MHz bandwidth are quite satisfactory, and to the authors’ knowledge, this is the first high-performance wideband DPD ever been reported. 3) To address the predicament that mobile operators do not have enough contiguous usable bandwidth, carrier aggregation (CA) technique is developed and imported into 4G LTE-Advanced. This pushes the utilization of concurrent dual-band transmitter/receiver, which reduces the hardware expense by using a single front-end. Compensation techniques for the respective concurrent dual-band transmitter and receiver front-ends are proposed to combat the inter-band modulation distortion, and simultaneously reduce the distortion for the both lower-side band and upper-side band signals.電気通信大学201

    Adjustable dynamic range for paper reduction schemes in large-scale MIMO-OFDM systems

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    In a multi-input-multi-output (MIMO) communication system there is a necessity to limit the power that the output antenna amplifiers can deliver. Their signal is a combination of many independent channels, so the demanded amplitude can peak to many times the average value. The orthogonal frequency division multiplexing (OFDM) system causes high peak signals to occur because many subcarrier components are added by an inverse discrete Fourier transformation process at the base station. This causes out-of-band spectral regrowth. If simple clipping of the input signal is used, there will be in-band distortions in the transmitted signals and the bit error rate will increase substantially. This work presents a novel technique that reduces the peak-to-average power ratio (PAPR). It is a combination of two main stages, a variable clipping level and an Adaptive Optimizer that takes advantage of the channel state information sent from all users in the cell. Simulation results show that the proposed method achieves a better overall system performance than that of conventional peak reduction systems in terms of the symbol error rate. As a result, the linear output of the power amplifiers can be minimized with a great saving in cost

    Review of Recent Trends

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    This work was partially supported by the European Regional Development Fund (FEDER), through the Regional Operational Programme of Centre (CENTRO 2020) of the Portugal 2020 framework, through projects SOCA (CENTRO-01-0145-FEDER-000010) and ORCIP (CENTRO-01-0145-FEDER-022141). Fernando P. Guiomar acknowledges a fellowship from “la Caixa” Foundation (ID100010434), code LCF/BQ/PR20/11770015. Houda Harkat acknowledges the financial support of the Programmatic Financing of the CTS R&D Unit (UIDP/00066/2020).MIMO-OFDM is a key technology and a strong candidate for 5G telecommunication systems. In the literature, there is no convenient survey study that rounds up all the necessary points to be investigated concerning such systems. The current deeper review paper inspects and interprets the state of the art and addresses several research axes related to MIMO-OFDM systems. Two topics have received special attention: MIMO waveforms and MIMO-OFDM channel estimation. The existing MIMO hardware and software innovations, in addition to the MIMO-OFDM equalization techniques, are discussed concisely. In the literature, only a few authors have discussed the MIMO channel estimation and modeling problems for a variety of MIMO systems. However, to the best of our knowledge, there has been until now no review paper specifically discussing the recent works concerning channel estimation and the equalization process for MIMO-OFDM systems. Hence, the current work focuses on analyzing the recently used algorithms in the field, which could be a rich reference for researchers. Moreover, some research perspectives are identified.publishersversionpublishe
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