Design of Touch Screen Controller IC for Transparent Fingerprint Sensor

Department of Electrical EngineeringA design of system architecture and analog-front-end (AFE) with high SNR and high frame rate for mutual capacitive touch screen with multiple electrodes is presented. Firstly, a differential continuous-mode parallel operation architecture (DCPA) is proposed for large-sized TSP. The proposed architecture achieves a high product of signal-to-noise ratio (SNR) and frame rate, which is a requirement of ROIC for large-sized TSP. DCPA is accomplished by using the proposed differential sensing method with a parallel architecture in a continuous-mode. A continuous-type differential charge amplifier removes the common-mode noise component, and reduces the self-noise by the band-pass filtering effect of the continuous-mode charge amplifier. In addition, the differential parallel architecture cancels the timing skew problem caused by the continuous-mode parallel operation and effectively enhances the power spectrum density of the signal. The proposed ROIC was fabricated using a 0.18-um CMOS process and occupied an active area of 1.25 mm2. The proposed system achieved a 72 dB SNR and 240 Hz frame rate with a 32 channel TX by 10 channel RX mutual capacitive TSP. Moreover, the proposed differential-parallel architecture demonstrated higher immunity to lamp noise and display noise. The proposed system consumed 42.5 mW with a 3.3-V supply. Secondly, readout IC (ROIC) with a differential coded multiple signaling method (DCMS) is proposed to detect an atto-farad capacitance difference for fingerprint recognition in fingerprint TSP. A readout IC with high SNR and fast frame rate are required in the fingerprint recognition. However, the capacitance difference by the ridge and valley of the fingerprint is very small, so that the signal-to-noise ratio is very low. In addition, it takes long time to scan whole fingerprint TSP with multiple electrodes. A fully differential architecture with differential signaling is proposed to detect the low capacitance difference in fingerprint TSP. The internal noise generated is minimized by 2nd fully differential operational amplifier and external noise is eliminated by a lock-in sensing structure. In addition, DCMS reduces an AC offset and enhances a higher product of SNR and frame rate in multiple channels. The proposed architectures can distinguish a 50-atto-farad which is a capacitance difference resulted from the ridges and valley of the finger under the 0.3T glass. The total scan time for 42 ?? 42 fingerprint TSP is less than 21 ms and the power consumption is below 20 mW at 3.3 V supply voltage. IC has been fabricated using a 0.18 ??m standard CMOS process.ope

Research on flexible display at ulsan national institute of science and technology

Displays represent information visually, so they have become the fundamental building block to visualize the data of current electronics including smartphones. Recently, electronics have been advanced toward flexible and wearable electronics that can be bent, folded, or stretched while maintaining their performance under various deformations. Here, recent advances in research to demonstrate flexible and wearable displays are reviewed. We introduce these results by dividing them into several categories according to the components of the display: active-matrix backplane, touch screen panel, light sources, integrated circuit for fingerprint touch screen panel, and characterization tests; and we also present mechanical tests in nano-meter scale and visual ergonomics research

Design of Analog Front-End of Touch-Screen Controller with Enhanced Noise Immunity and Configurable SNR and Frame Rate

학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2017. 2. 정덕균.A design of analog front-end (AFE) for touch-screen controller (TSC) with highly enhanced noise immunity and configurable signal-to-noise ratio (SNR) and frame rate is proposed. First, the AFE for the mobile TSC is presented, which provides a configurable SNR and frame rate. The AFE configures its SNR and frame rate by adjusting the sampling cycles of the employed ADC. The test chip is fabricated in a 0.18-μm CMOS process and occupies a 2.2-mm2 active area. The test chip achieves 60-dB SNR and 200-Hz frame rate with 12 × 8 TSP. The SNR can be adjusted from 40 to 67 dB, while the frame rate is then inversely scaled from 50 Hz to 6.4 kHz. The test chip consumes 6.26 mW from a 3.3-V supply. The AFE for the tablet TSC is also presented, which provides highly enhanced noise immunity and configurable SNR and frame rate. The proposed AFE provides TX channels of 36 and RX channels of 64 in order to support a large-size TSP. A multi-driving TX structure with frequency-hopping signal generator is employed to improve the SNR and noise immunity. For a suppression of severe noise interference injected through the TSP, the RX sensing block adopts pre-filtering differential sensing method and high-order noise filtering structure. The AFE supports configurable SNR and frame rate with on-chip frame-rate controller. The test chip is fabri-cated in a 0.18-μm CMOS process. The active area of the test chip is 36 mm2. A 12.2-inch TSP with TX channels of 36 and RX channels of 64 is used in the measurement. The test chip achieves 54-dB SNR and 120-Hz frame rate with a finger touch. The frame rate can be adjusted from 85 to 385 Hz. The test chip achieves up to 20-Vpp noise immunity. The test chip consumes 94.5 mW with a 3.3-V supply.CHAPTER 1 INTRODUCTION 1 1.1 MOTIVATION 1 1.2 THESIS ORGANIZATION 3 CHAPTER 2 BASIC STUDY ON TOUCH-SCREEN CONTROLLER 5 2.1 TOUCH-SCREEN PANEL 5 2.2 TOUCH-SCREEN CONTROLLER 8 2.2.1 OVERVIEW ON TSC 8 2.3 ANALOG FRONT-END OF TSC 11 2.3.1 PERFORMANCE METRIC 12 2.3.2 DESIGN ISSUES OF AFE 15 CHAPTER 3 AFE OF MOBILE TSC WITH CONFIGURABLE SNR AND FRAME RATE 18 3.1 OVERVIEW 18 3.2 SYSTEM ARCHITECTURE 21 3.3 CONFIGURABLE SNR AND FRAME RATE 23 3.4 MEASUREMENT RESULTS 29 CHAPTER 4 AFE OF TABLET TSC WITH ENHANCED NOISE IMMUNITY 35 4.1 OVERVIEW 35 4.2 DESIGN ISSUES BY LARGE-SIZE TSP 38 4.3 DESIGN ISSUES BY NOISE INTERFERENCE 40 4.3.1 NOISE INTERFERENCE 40 4.3.2 DISPLAY NOISE REJECTION TECHNIQUE 43 4.3.3 CHARGER NOISE FILTERING TECHNIQUE 46 4.3.4 HIGH-VOLTAGE TX TECHNIQUE 50 4.3.5 MULTI-DRIVING TX TECHNIQUE 52 4.4 PROPOSED ARCHITECTURE 66 4.4.1 TX DRIVING ARCHITECTURE 67 4.4.2 RX SENSING ARCHITECTURE 71 4.5 MULTI-DRIVING TX STRUCTURE 75 4.5.1 CONSIDERATIONS FOR TX MODULATION SEQUENCE 75 4.5.2 COMPARISON OF MODULATION SEQUENCES 76 4.5.3 MODIFIED BUSH-TYPE HADAMARD MATRIX 79 4.6 NOISE FILTERING RX 83 4.6.1 PRE-FILTERING DIFFERENTIAL SENSING METHOD 83 4.6.2 NOISE-IMMUNE SENSING STRUCTURE 87 4.6.3 CONFIGURABLE SNR AND FRAME RATE 106 4.6.4 RX MODULATION 112 4.7 CIRCUIT IMPLEMENTATION 120 4.7.1 CHARGE AMPLIFIER AND BAND-PASS FILTER 121 4.7.2 CAPACITIVE DIFFERENTIAL AMPLIFIER 123 4.7.3 MIXER AND RX MODULATION 125 4.7.4 LOW-PASS FILTER 127 4.7.5 INCREMENTAL ΔΣ ADC 128 4.7.6 DIGITAL DEMODULATION 130 4.7.7 TX DRIVING BLOCK 131 4.8 MEASUREMENT RESULTS 132 4.8.1 TOUCH-SCREEN PANEL (TSP) 132 4.8.2 MEASUREMENT ENVIRONMENTS 133 4.8.3 FABRICATED AFE 134 4.8.4 OPERATION OF THE FABRICATED AFE 135 4.8.5 SNR MEASUREMENT 139 4.8.6 CONFIGURABLE SNR AND FRAME RATE 139 4.8.7 NOISE IMMUNITY 141 4.8.8 COMPARISON WITH OTHER WORKS 157 CHAPTER 5 CONCLUSION 158 BIBLIOGRAPHY 160 초 록 170Docto

The ALICE TPC, a large 3-dimensional tracking device with fast readout for ultra-high multiplicity events

The design, construction, and commissioning of the ALICE Time-Projection Chamber (TPC) is described. It is the main device for pattern recognition, tracking, and identification of charged particles in the ALICE experiment at the CERN LHC. The TPC is cylindrical in shape with a volume close to 90 m^3 and is operated in a 0.5 T solenoidal magnetic field parallel to its axis. In this paper we describe in detail the design considerations for this detector for operation in the extreme multiplicity environment of central Pb--Pb collisions at LHC energy. The implementation of the resulting requirements into hardware (field cage, read-out chambers, electronics), infrastructure (gas and cooling system, laser-calibration system), and software led to many technical innovations which are described along with a presentation of all the major components of the detector, as currently realized. We also report on the performance achieved after completion of the first round of stand-alone calibration runs and demonstrate results close to those specified in the TPC Technical Design Report.Comment: 55 pages, 82 figure

New Architectures and Circuits for Pushing the Dynamic Range and Multiplexing Boundaries of CMOS-Integrated Sensors

Over the last decades, CMOS-integrated sensors have made impressive progress in performance, form-factor, and energy-efficiency for various applications such as imaging, physical/chemical sensing, bio/health monitoring. In the era of the artificial intelligence (AI) and the internet-of-things (IoT), such CMOS-integrated sensors are essential for massive and comprehensive data acquisition, where sensing range (or dynamic range), signal fidelity (or signal-to-noise ratio), and data throughput are key factors. Towards pushing the boundaries of such sensing capabilities, in this dissertation, novel sensing architectures are presented with energy/area-efficient circuit design techniques for multi-channel CMOS optical sensors and neural interfaces. The first topic is a fully-integrated, wide linear dynamic range optical sensor array combining linear and single-photon avalanche diode operation within each pixel. A pulse-counting readout scheme provides in-pixel digitization in an area-efficient manner for both operation modes, enabling fully parallel measurement across the array. The proposed dual-mode optical sensor array alternately requires high-voltage(10-20 V) and low-voltage supply (2-5 V) for reverse bias of the photodiodes, which is provided by a reconfigurable, closed-loop high-voltage charge pump in the same substrate. An 8 x 8 array architecture along with the dual-mode bias generator is fabricated in a general purpose 180 nm CMOS process and demonstrates 129 dB dynamic range while maintaining linear photoresponse operating with a dual-mode frame rate of 20 Hz. The second topic is a new approach for applying code-division multiplexing (CDM) to current-mode and voltage-mode sensor arrays with analog-domain orthogonal encoding directly in a shared, single analog-front-end circuit, which enables simultaneous readout for multiple sensors. The approach is applied to a 8 x 16 array of CMOS-integrated photodetectors and implemented in a general purpose 180 nm CMOS process, where the 16 channel CDM-based oversampling readout achieves an SNR improvement of more than 12 dB compared with time-division multiplexing at the same sampling rate. In addition, a CDM-based neural recording architecture is presented, which offers a significant tolerance to interference that can be injected through long cables

Wireless Power Transfer System for Battery-Less Body Implantable Devices

Department of Electrical EngineeringAs the life expectancy is increased and the welfare is promoted, researches on the body implantable medical devices (BIMD) are actively being carried out, and products providing more various functions are being released. On the other hand, due to these various functions, the power consumption of the BIMD is also increased, so that the primary battery alone cannot provide sufficient power for the devices. The limited capacity and life time of batteries force patients to make an additional payment and suffering for the power supply of the BIMD. Wireless power transfer technology is the technology which has been making remarkable progress mainly in wireless charging for personal portable devices and electric vehicles. Convergence of wireless power transfer technology (WPT) and rechargeable battery can extend the life time of the BIMD and reduce the suffering and the cost for battery replacements. Furthermore, WPT enables the devices which do not need to operate consistently such as body implantable sensor devices to be used without batteries. In this dissertation, techniques to support WPT for BIMD are introduced and proposed. First, basic researches on magnetic coupled WPT are presented. The basics which are important factors to analyze power transmission are introduced. In addition, circuits that make up the WPT system are described. There are three common technical challenges in WPT. Those are efficiency degradation on coil geometry, voltage gain variation with coil geometry, and power losses in WPT. The common challenges are discussed in chapter II. Moreover, additional challenges which are arisen in WPT for BIMD and approaches to resolve the challenges are addressed in chapter II. Then, efficiency improvement techniques and control techniques in WPT are presented in chapter III. The presented techniques to improve efficiency are applied in coil parts and circuit parts. In coil parts, efficiency enhancement technique by geometric variation is proposed. In circuit parts, instantaneous power consuming technique for step-down converter is suggested. Li-ion battery charger is also discussed in chapter III. Additionally, the wireless controlled constant current / constant voltage charging mode and the proposed step charging method are described. After that, WPT system for BIMD is discussed one by one with the proposed techniques for each part in chapter IV. A load transformation is suggested to improve efficiency in weak coupling, and suppress voltage gain variation under coil displacement. Power conversion efficiency improvement techniques for rectifier and converter are also proposed. By using the proposed technique for the converter, we can remove the bootstrap capacitors, and reduce the overall size of power circuits. In conclusion, techniques in coil parts and circuit parts to handle challenges in WPT for BIMD are fully investigated in this thesis in addition to the efficiency improvement and control techniques in common WPT. All the techniques are verified through simulations or experiments. The approaches realized in the thesis can be applied to other applications employing the WPT.clos

Lab-on-CMOS Sensors and Real-time Imaging for Biological Cell Monitoring

Monitoring biological cell growth and viability is essential for in vivo biomedical diagnosis and therapy, and in vitro studies of pharmaceutical efficacy and material toxicity. Conventional monitoring techniques involve the use of dyes and markers that can potentially introduce side effects into the cell culture and often function as end-point assays. This eliminates the opportunity to track fast changes and to determine temporal correlation between measurements. Particularly in drug screening applications, high-temporal resolution cell viability data could inform decisions on drug application protocols that could lead to better treatment outcomes. This work presents development of a lab-on-chip (LoC) sensor for real-time monitoring of biological cell viability and proliferation, to provide a comprehensive picture of the changes cells undergo during their lifecycle. The LoC sensor consists of a complementary metal-oxide-semiconductor (CMOS) chip that measures the cell-to-substrate coupling of adherent cells that are cultured directly on top. This technique is non-invasive, does not require biochemical labeling, and allows for automated and unsupervised cell monitoring. The CMOS capacitance sensor was designed to addresses the ubiquitous challenges of sensitivity, noise coupling, and dynamic range that affect existing sensors. The design includes on-chip digitization, serial data output, and programmable control logic in order to facilitate packaging requirements for biological experiments. Only a microcontroller is required for readout, making it suitable for applications outside the traditional laboratory setting. An imaging platform was developed to provide time-lapse images of the sensor surface, which allowed for concurrent visual and capacitance observation of the cells. Results showed the ability of the LoC sensor to detect single cell binding events and changes in cell morphology. The sensor was used in in vitro experiments to monitor chemotherapeutic agent potency on drug-resistant and drug-sensitive cancer cell lines. Concentrations higher than 5 μM elicited cytotoxic effects on both cell lines, while a dose of 1 μM allowed discrimination of the two cell types. The system demonstrates the use of real-time capacitance measurements as a proof-of-concept tool that has potential to hasten the drug development process

Electronic systems for the restoration of the sense of touch in upper limb prosthetics

In the last few years, research on active prosthetics for upper limbs focused on improving the human functionalities and the control. New methods have been proposed for measuring the user muscle activity and translating it into the prosthesis control commands. Developing the feed-forward interface so that the prosthesis better follows the intention of the user is an important step towards improving the quality of life of people with limb amputation. However, prosthesis users can neither feel if something or someone is touching them over the prosthesis and nor perceive the temperature or roughness of objects. Prosthesis users are helped by looking at an object, but they cannot detect anything otherwise. Their sight gives them most information. Therefore, to foster the prosthesis embodiment and utility, it is necessary to have a prosthetic system that not only responds to the control signals provided by the user, but also transmits back to the user the information about the current state of the prosthesis. This thesis presents an electronic skin system to close the loop in prostheses towards the restoration of the sense of touch in prosthesis users. The proposed electronic skin system inlcudes an advanced distributed sensing (electronic skin), a system for (i) signal conditioning, (ii) data acquisition, and (iii) data processing, and a stimulation system. The idea is to integrate all these components into a myoelectric prosthesis. Embedding the electronic system and the sensing materials is a critical issue on the way of development of new prostheses. In particular, processing the data, originated from the electronic skin, into low- or high-level information is the key issue to be addressed by the embedded electronic system. Recently, it has been proved that the Machine Learning is a promising approach in processing tactile sensors information. Many studies have been shown the Machine Learning eectiveness in the classication of input touch modalities.More specically, this thesis is focused on the stimulation system, allowing the communication of a mechanical interaction from the electronic skin to prosthesis users, and the dedicated implementation of algorithms for processing tactile data originating from the electronic skin. On system level, the thesis provides design of the experimental setup, experimental protocol, and of algorithms to process tactile data. On architectural level, the thesis proposes a design ow for the implementation of digital circuits for both FPGA and integrated circuits, and techniques for the power management of embedded systems for Machine Learning algorithms

A NEUROMORPHIC APPROACH TO TACTILE PERCEPTION

Ph.DDOCTOR OF PHILOSOPH

Development of an image converter of radical design

A long term investigation of thin film sensors, monolithic photo-field effect transistors, and epitaxially diffused phototransistors and photodiodes to meet requirements to produce acceptable all solid state, electronically scanned imaging system, led to the production of an advanced engineering model camera which employs a 200,000 element phototransistor array (organized in a matrix of 400 rows by 500 columns) to secure resolution comparable to commercial television. The full investigation is described for the period July 1962 through July 1972, and covers the following broad topics in detail: (1) sensor monoliths; (2) fabrication technology; (3) functional theory; (4) system methodology; and (5) deployment profile. A summary of the work and conclusions are given, along with extensive schematic diagrams of the final solid state imaging system product