361,480 research outputs found

    A REAL TIME GENERAL PURPOSE SIGNAL PROCESSOR ARCHITECTURE.

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    Digital signal processing has many applications in the areas of signal, radar, speech and image processing and real time implementation requires a very high throughput rate. Various processor architectures have been investigated 1-6 which reveals that a special purpose processor appropriate to the algorithms should be designed in order to achieve high throughput rates. Recently research efforts 7-14 are directed towards the exploitation of parallelism in the algorithms and parallel computation of these algorithms. The objective of this work is to propose new concepts for high speed computation of real time general purpose signal processing algorithms. A novel architecture of a real time general purpose data flow signal processor (DFSP), based on the binary tree structure, is proposed for real time signal processing applications. The data flow signal processor exploits distributed, parallel, and pipeline processing approaches to achieve high throughput rates. The processor utilizes the residue number system (RNS) for high speed signal processing applications. The arithmetic operations in RNS can be performed via Random Access Memory (RAM) look up tables, and the execution time of any particular arithmetic operation is reduced to the access time of a RAM. The data flow signal processor is demonstrated to be suitable for performing recursive, non-recursive digital filtering and convolution operations. Finally the thesis describes various alternatives for programming the DFSP, and an interactive program environment is used to write application programs without knowing the internal architecture of the DFSP.Dept. of Electrical and Computer Engineering. Paper copy at Leddy Library: Theses & Major Papers - Basement, West Bldg. / Call Number: Thesis1985 .J353. Source: Dissertation Abstracts International, Volume: 46-02, Section: B, page: 0601. Thesis (Ph.D.)--University of Windsor (Canada), 1985

    Designer cell signal processing circuits for biotechnology

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    Microorganisms are able to respond effectively to diverse signals from their environment and internal metabolism owing to their inherent sophisticated information processing capacity. A central aim of synthetic biology is to control and reprogramme the signal processing pathways within living cells so as to realise repurposed, beneficial applications ranging from disease diagnosis and environmental sensing to chemical bioproduction. To date most examples of synthetic biological signal processing have been built based on digital information flow, though analogue computing is being developed to cope with more complex operations and larger sets of variables. Great progress has been made in expanding the categories of characterised biological components that can be used for cellular signal manipulation, thereby allowing synthetic biologists to more rationally programme increasingly complex behaviours into living cells. Here we present a current overview of the components and strategies that exist for designer cell signal processing and decision making, discuss how these have been implemented in prototype systems for therapeutic, environmental, and industrial biotechnological applications, and examine emerging challenges in this promising field

    Signal processing for a laser-Doppler blood perfusion meter

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    Two signal processing methods for laser-Dopper perfusion velocimetry are presented. The methods are based on the calculation of the moments of the frequency power spectrum. The first uses Vω-filtering (ω is the frequency) with analogous electronics, the second uses signal autocorrelation with digital electronics. Comparison is made with a third instrument: a spectrum analyzer coupled to a computer, using Fourier transform tecniques. The performance of these setups (sensitivity, limit sensitivity and accuracy) are investigated. We propose a calibration standard for signal processors to be used for blood perfusion measurements. The analogous instrument proved to be the cheapest but the digital instrument had the best performance

    A Novel Adaptive Spectrum Noise Cancellation Approach for Enhancing Heartbeat Rate Monitoring in a Wearable Device

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    This paper presents a novel approach, Adaptive Spectrum Noise Cancellation (ASNC), for motion artifacts removal in Photoplethysmography (PPG) signals measured by an optical biosensor to obtain clean PPG waveforms for heartbeat rate calculation. One challenge faced by this optical sensing method is the inevitable noise induced by movement when the user is in motion, especially when the motion frequency is very close to the target heartbeat rate. The proposed ASNC utilizes the onboard accelerometer and gyroscope sensors to detect and remove the artifacts adaptively, thus obtaining accurate heartbeat rate measurement while in motion. The ASNC algorithm makes use of a commonly accepted spectrum analysis approaches in medical digital signal processing, discrete cosine transform, to carry out frequency domain analysis. Results obtained by the proposed ASNC have been compared to the classic algorithms, the adaptive threshold peak detection and adaptive noise cancellation. The mean (standard deviation) absolute error and mean relative error of heartbeat rate calculated by ASNC is 0.33 (0.57) beats·min-1 and 0.65%, by adaptive threshold peak detection algorithm is 2.29 (2.21) beats·min-1 and 8.38%, by adaptive noise cancellation algorithm is 1.70 (1.50) beats·min-1 and 2.02%. While all algorithms performed well with both simulated PPG data and clean PPG data collected from our Verity device in situations free of motion artifacts, ASNC provided better accuracy when motion artifacts increase, especially when motion frequency is very close to the heartbeat rate

    Mapping our Universe in 3D with MITEoR

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    Mapping our universe in 3D by imaging the redshifted 21 cm line from neutral hydrogen has the potential to overtake the cosmic microwave background as our most powerful cosmological probe, because it can map a much larger volume of our Universe, shedding new light on the epoch of reionization, inflation, dark matter, dark energy, and neutrino masses. We report on MITEoR, a pathfinder low-frequency radio interferometer whose goal is to test technologies that greatly reduce the cost of such 3D mapping for a given sensitivity. MITEoR accomplishes this by using massive baseline redundancy both to enable automated precision calibration and to cut the correlator cost scaling from N^2 to NlogN, where N is the number of antennas. The success of MITEoR with its 64 dual-polarization elements bodes well for the more ambitious HERA project, which would incorporate many identical or similar technologies using an order of magnitude more antennas, each with dramatically larger collecting area.Comment: To be published in proceedings of 2013 IEEE International Symposium on Phased Array Systems & Technolog

    Design exploration and performance strategies towards power-efficient FPGA-based achitectures for sound source localization

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    Many applications rely on MEMS microphone arrays for locating sound sources prior to their execution. Those applications not only are executed under real-time constraints but also are often embedded on low-power devices. These environments become challenging when increasing the number of microphones or requiring dynamic responses. Field-Programmable Gate Arrays (FPGAs) are usually chosen due to their flexibility and computational power. This work intends to guide the design of reconfigurable acoustic beamforming architectures, which are not only able to accurately determine the sound Direction-Of-Arrival (DoA) but also capable to satisfy the most demanding applications in terms of power efficiency. Design considerations of the required operations performing the sound location are discussed and analysed in order to facilitate the elaboration of reconfigurable acoustic beamforming architectures. Performance strategies are proposed and evaluated based on the characteristics of the presented architecture. This power-efficient architecture is compared to a different architecture prioritizing performance in order to reveal the unavoidable design trade-offs
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