282,772 research outputs found
A Comparison of x86 Computer Architecture Simulators
The significance of computer architecture simulators in advancing computer architecture research is widely acknowledged. Computer architects have developed numerous simulators in the past few decades and their number continues to rise. This paper explores different simulation techniques and surveys many simulators. Comparing simulators with each other and validating their correctness has been a challenging task. In this paper, we compare and contrast x86 simulators in terms of flexibility, level of details, user friendliness and simulation models. In addition, we measure the experimental error and compare the speed of four contemporary x86 simulators: gem5, Sniper, Multi2sim and PTLsim. We also discuss the strengths and limitations of the different simulators. We believe that this paper provides insights into different simulation strategies and aims to help computer architects understand the differences among the existing simulation tools
SimpleSSD: Modeling Solid State Drives for Holistic System Simulation
Existing solid state drive (SSD) simulators unfortunately lack hardware
and/or software architecture models. Consequently, they are far from capturing
the critical features of contemporary SSD devices. More importantly, while the
performance of modern systems that adopt SSDs can vary based on their numerous
internal design parameters and storage-level configurations, a full system
simulation with traditional SSD models often requires unreasonably long
runtimes and excessive computational resources. In this work, we propose
SimpleSSD, a highfidelity simulator that models all detailed characteristics of
hardware and software, while simplifying the nondescript features of storage
internals. In contrast to existing SSD simulators, SimpleSSD can easily be
integrated into publicly-available full system simulators. In addition, it can
accommodate a complete storage stack and evaluate the performance of SSDs along
with diverse memory technologies and microarchitectures. Thus, it facilitates
simulations that explore the full design space at different levels of system
abstraction.Comment: This paper has been accepted at IEEE Computer Architecture Letters
(CAL
Janus II: a new generation application-driven computer for spin-system simulations
This paper describes the architecture, the development and the implementation
of Janus II, a new generation application-driven number cruncher optimized for
Monte Carlo simulations of spin systems (mainly spin glasses). This domain of
computational physics is a recognized grand challenge of high-performance
computing: the resources necessary to study in detail theoretical models that
can make contact with experimental data are by far beyond those available using
commodity computer systems. On the other hand, several specific features of the
associated algorithms suggest that unconventional computer architectures, which
can be implemented with available electronics technologies, may lead to order
of magnitude increases in performance, reducing to acceptable values on human
scales the time needed to carry out simulation campaigns that would take
centuries on commercially available machines. Janus II is one such machine,
recently developed and commissioned, that builds upon and improves on the
successful JANUS machine, which has been used for physics since 2008 and is
still in operation today. This paper describes in detail the motivations behind
the project, the computational requirements, the architecture and the
implementation of this new machine and compares its expected performances with
those of currently available commercial systems.Comment: 28 pages, 6 figure
A time lag study of the vertical motion simulator computer system
A study was performed to evaluate an experimental method to determine time lags in real-time computer systems as the one associated with the Vertical Motion Simulator at Ames Research Center. The approach was to use an ordinary frequency analyzer to measure the phase difference between inputs and outputs of the computer system. The various elements of the program and computational architecture were modeled. Various factors, such as computer frame time and input frequency, were varied so that they were representative of the operational use of the simulator facilities. Experimentally determined results were compared with predictions derived from the simulation models. The results indicate that the frequency analyzer can be readily used to evaluate time lags in systems of this type. Differences between predicted and measured phase values indicate that the hardware and software imparts a time lag of about 5 msec to this facility
Hierarchical architecture design and simulation environment
The Hierarchical Architectural design and Simulation Environment (HASE)is
intended as a flexible tool for computer architects who wish to experiment with
alternative architectural configurations and design parameters. HASE is both
a design environment and a simulator. Architecture components are described
by a hierarchical library of objects defined in terms of an object oriented simulation language. HASE instantiates these objects to simulate and animate the
execution of a computer architecture. An event trace generated by the simulator
therefore describes the interaction between architecture components, for example,
fetch stages, address and data buses, sequencers, instruction buffers and register
files. The objects can model physical components at different abstraction levels,
eg. PMS (processor memory switch), ISP (instruction set processor) and RTL
(register transfer level). HASE applies the concepts of inheritance, encapsulation
and polymorphism associated with object orientation, to simplify the design and
implementation of an architecture simulation that models component operations
at different abstraction levels. For example, HASE can probe the performance
of a processor's floating point unit, executing a multiplication operation, at a
lower level of abstraction, i.e. the RTL, whilst simulating remaining architecture
components at a PMS level of abstraction. By adopting this approach, HASE
returns a more meaningful and relevant event trace from an architecture simulation. Furthermore, an animator visualises the simulation's event trace to clarify
the collaborations and interactions between architecture components. The prototype version of HASE is based on GSS (Graphical Support System), and DEMOS
(Discrete Event Modelling On Simula)
GASP-PL/I Simulation of Integrated Avionic System Processor Architectures
A development study sponsored by NASA was completed in July 1977 which proposed a complete integration of all aircraft instrumentation into a single modular system. Instead of using the current single-function aircraft instruments, computers compiled and displayed inflight information for the pilot. A processor architecture called the Team Architecture was proposed. This is a hardware/software approach to high-reliability computer systems. A follow-up study of the proposed Team Architecture is reported. GASP-PL/1 simulation models are used to evaluate the operating characteristics of the Team Architecture. The problem, model development, simulation programs and results at length are presented. Also included are program input formats, outputs and listings
An architectural exploration of the solar and seasonal cycles
This study explores strategies for designing architectural form and space that is responsive to the solar and seasonal cycles. It is an attempt to establish some of the ways a building can be integrated into natural cycles, minimizing its negative impact on the environment. The study provides insights for Sustainable or Green Architecture, which are often considered to be extensions of Organic Architecture.
A significant outcome of the investigation was that the use of computer modeling and simulation provided an efficient way to analyze and verify design decisions. Computer models are flexible, providing visual representations and an alternative to traditional techniques for solar study
- …