Testing high resolution SD ADC’s by using the noise transfer function

A new solution to improve the testability of high resolution SD Analogue to Digital Converters (SD ADC’s) using the quantizer input as test node is described. The theoretical basis for the technique is discussed and results from high level simulations for a 16 bit, 4th order, audio ADC are presented. The analysis demonstrates the potential to reduce the computational effort associated with test response analysis versus conventional techniques

A wireless RF CMOS interface for a soil moisture sensor

This paper describes a wireless RF CMOS interface for a soil moisture sensor. The mixedsignal interface is based on a 2ndorder switched capacitor, fully differential sigma-delta modulator with an effective resolution of 17-bit. The modulator bit stream output is applied to a counter as a first order decimation filter and encoded as a pulse width modulated signal. This signal is then transmitted by means of an amplitude shift keying modulation, through a power amplifier operating at 433:92 MHz in class-E mode. The soil moisture sensor is based on Dual-Probe Heat-Pulse method and is implemented using an integrated temperature sensor and heater. After applying a heat-pulse, the temperature rise that is a function of soil moisture, generates a differential voltage that is amplified and applied to the mixed-signal interface input. The described interface can also be used with other kinds of environmental sensors in a wireless network for agricultural environments such as greenhouses. The CMOS mixedsignal interface has been implemented in a single-chip using a standard CMOS process (AMI 0.7 um, n-well, 2 metals and 1 poly)

Fixed-step Simulation of Continuous-Time sigma-delta Modulators

International audienceA methodology for the simulation of continuous time sigma-delta (ΣΔ) converters is presented in this paper. This method permits the simulation of ΣΔ modulators employing continuous-time filters using a fixed-step algorithm. The analysis method is based on the discretization of a continuous-time model and using a discrete simulator, which is more efficient than an analog simulator. In our analysis approach, each samplingperiod is divided into a fixed number of steps. This transformation is exact in term of Noise Transfer Function and asymptotically exact in term of Signal Transfer Function (the Signal Transfer Function of the model rapidly tends to the continuous time model transfer function when the number of steps increases). Moreover, the ideal step-size can be estimated from the bandwidth of the input signal

A 3.3 V two-stage fourth-order sigma-delta modulator with gain compensation technique

[[abstract]]We propose a multistage fourth order sigma-delta (ΣΔ) modulator with reduced sensitivity to the gain of operating amplifier. In the low voltage high order ΣΔ modulator, the gain of the operating amplifier is usually the most critical problem of the design. In order to overcome the difficulties of the high gain low voltage operating amplifier, we try to use medium gain operating amplifiers to design a fourth order multistage ΣΔ modulator, and find that it functions very well. The modulator is realized in a 0.5 μm DPDM process with an active area of 1.8 mm2. The HSPICE simulation shows this ΣΔ modulator with a maximum signal-to-noise-ratio (SNR) of 91 dB.[[conferencetype]]國際[[conferencedate]]19981124~19981127[[booktype]]紙本[[conferencelocation]]Chiangmai, Thailan

The design of a delta-sigma modulator with low clock feedthrough noise, op-amp gain compensation, and more correctly transferring charges between capacitors

[[abstract]]The performance of a delta-sigma modulator (Δ ΣM) is degraded due to the low op-amp gain, the clock feedthrough noise, and the right or fault of charge transferring between capacitors. Hurst et al. in 1993 suggested an architecture which uses reduced sensitivity to the op-amp gain. Since the low op-amp gain is much easier to design and makes the design of a Δ ΣM become very easy. However, they do not overcome the noise effect of the Δ ΣM. Here, another design is proposed and the effect of noise is reduced[[conferencetype]]國際[[conferencedate]]19970609~19970612[[conferencelocation]]Hong Kon

A wireless RF CMOS mixed-signal interface for soil moisture measurements

This paper describes a wireless RF CMOS interface for soil moisture measurements. The interface basically comprises a Delta-Sigma (ΔΣ) modulator for acquiring an external sensor signal, and a RF section where data is transmitted to a local processing unit. The ΔΣ modulator is a single-bit, second-order modulator and it is implemented using switched-capacitors techniques in a fully-differential topology. With a sampling frequency of 423.75 kHz and an oversampling ratio (OSR) of 256, the modulator achieves a dynamic range of 98.7 dB (16.1 bit). The output of the modulator is applied to a counter, as a first-order decimation filter, and the result is stored. Prior to transmission, data is encoded as a pulse width modulated signal and assembled in a frame containing preamble and checksum control fields. This frame is then transmitted through a power amplifier operating at 433.92 MHz in class-E mode. To evaluate the ΔΣ modulator performance, the bitstream was acquired and transferred to a personal computer to perform digital filtering and decimation using MATLAB. The soil moisture sensor is based on dual-probe heat-pulse (DPHP) method and is implemented by using an integrated temperature sensor and a heater. After applying a heat-pulse for a fixed period of time, the temperature rise, that is a function of soil moisture, generates a differential voltage that is amplified and applied to the mixed-signal interface input. The described interface can also be used with other kinds of environmental sensors in a wireless sensors network. The CMOS mixed-signal interface has been implemented in a single-chip using a standard CMOS 0.7 μm process (AMI C07M-A, n-well, 2 metals and 1 poly)

Efficiency comparison of power converters based on SiC and GaN semiconductors at high switching frequencies

© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Hard-switching voltage source converters (VSC) based on wide-bandgap (WBG) devices surpass their silicon equivalents in every aspect. Nevertheless, at high switching frequencies, the efficiency significantly differs depending on the WBG semiconductor used. This article presents an extensive comparison between gallium nitride (GaN), and silicon carbide (SiC) devices in terms of efficiency. The impact of the switching frequency is evaluated for each semiconductor using two modulation techniques: the classical space vector pulse width modulation (SVPWM) technique, and the innovative hexagonal sigma-delta modulation (H-S¿). The performance and losses of both WBG technologies are analysed here using Matlab/Simulink and PLECS. Experimental results performed on two VSC converters, one based on SiC devices and the other made using GaN transistors, show the influence of the semiconductor technology and the modulation strategy on the efficiency at high switching frequenciesPeer ReviewedPostprint (published version

Linear model-based testing of ADC nonlinearities

In this brief, we demonstrate the procedures of linear model-based testing for the example of a 12-b Nyquist-rate analog-to-digital converter (ADC). In a production test environment, we apply this technique to two wafer lots of devices, and we establish that the model is robust with respect to its ability to reduce the uncertainty of the test outcome. Reducing this uncertainty is particularly beneficial for higher resolution devices, for which measurement noise increasingly corrupts the measured "signal" that is the nonlinearity of the device under test