Adaptive non linear system identification and channel equalization usinf functional link artificial neural network

In system theory, characterization and identification are fundamental problems. When the plant behavior is completely unknown, it may be characterized using certain model and then, its identification may be carried out with some artificial neural networks(ANN) like multilayer perceptron(MLP) or functional link artificial neural network(FLANN) using some learning rules such as back propagation (BP) algorithm. They offer flexibility, adaptability and versatility, so that a variety of approaches may be used to meet a specific goal, depending upon the circumstances and the requirements of the design specifications. The primary aim of the present thesis is to provide a framework for the systematic design of adaptation laws for nonlinear system identification and channel equalization. While constructing an artificial neural network the designer is often faced with the problem of choosing a network of the right size for the task. The advantages of using a smaller neural network are cheaper cost of computation and better generalization ability. However, a network which is too small may never solve the problem, while a larger network may even have the advantage of a faster learning rate. Thus it makes sense to start with a large network and then reduce its size. For this reason a Genetic Algorithm (GA) based pruning strategy is reported. GA is based upon the process of natural selection and does not require error gradient statistics. As a consequence, a GA is able to find a global error minimum. Transmission bandwidth is one of the most precious resources in digital communication systems. Communication channels are usually modeled as band-limited linear finite impulse response (FIR) filters with low pass frequency response. When the amplitude and the envelope delay response are not constant within the bandwidth of the filter, the channel distorts the transmitted signal causing intersymbol interference (ISI). The addition of noise during propagation also degrades the quality of the received signal. All the signal processing methods used at the receiver's end to compensate the introduced channel distortion and recover the transmitted symbols are referred as channel equalization techniques.When the nonlinearity associated with the system or the channel is more the number of branches in FLANN increases even some cases give poor performance. To decrease the number of branches and increase the performance a two stage FLANN called cascaded FLANN (CFLANN) is proposed.This thesis presents a comprehensive study covering artificial neural network (ANN) implementation for nonlinear system identification and channel equalization. Three ANN structures, MLP, FLANN, CFLANN and their conventional gradient-descent training methods are extensively studied. Simulation results demonstrate that FLANN and CFLANN methods are directly applicable for a large class of nonlinear control systems and communication problems

Computational Optimizations for Machine Learning

The present book contains the 10 articles finally accepted for publication in the Special Issue “Computational Optimizations for Machine Learning” of the MDPI journal Mathematics, which cover a wide range of topics connected to the theory and applications of machine learning, neural networks and artificial intelligence. These topics include, among others, various types of machine learning classes, such as supervised, unsupervised and reinforcement learning, deep neural networks, convolutional neural networks, GANs, decision trees, linear regression, SVM, K-means clustering, Q-learning, temporal difference, deep adversarial networks and more. It is hoped that the book will be interesting and useful to those developing mathematical algorithms and applications in the domain of artificial intelligence and machine learning as well as for those having the appropriate mathematical background and willing to become familiar with recent advances of machine learning computational optimization mathematics, which has nowadays permeated into almost all sectors of human life and activity

Training Echo State Networks with Regularization through Dimensionality Reduction

In this paper we introduce a new framework to train an Echo State Network to predict real valued time-series. The method consists in projecting the output of the internal layer of the network on a space with lower dimensionality, before training the output layer to learn the target task. Notably, we enforce a regularization constraint that leads to better generalization capabilities. We evaluate the performances of our approach on several benchmark tests, using different techniques to train the readout of the network, achieving superior predictive performance when using the proposed framework. Finally, we provide an insight on the effectiveness of the implemented mechanics through a visualization of the trajectory in the phase space and relying on the methodologies of nonlinear time-series analysis. By applying our method on well known chaotic systems, we provide evidence that the lower dimensional embedding retains the dynamical properties of the underlying system better than the full-dimensional internal states of the network

Various nonlinear models and their identification, equalization and linearization

System identification is a pre-requisite to analysis of a dynamic system and design of an appropriate controller for improving its performance. The more accurate the mathematical model identified for a system, the more effective will be the controller designed for it. The identification of nonlinear systems is a topic which has received considerable attention over the last two decades. Generally speaking, when it is difficult to model practical systems by mathematical analysis method, system identification may be an efficient way to overcome the shortage of mechanism analysis method. The goal of the modeling is to find a simple and efficient model which is in accord with the practical system. In many cases, linear models are not suitable to present these systems and nonlinear models have to be considered. Since there are nonlinear effects in practical systems, e.g. harmonic generation, intermediation, desensitization, gain expansion and chaos, we can infer that most control systems are nonlinear. Nonlinear models are more widely used in practice, because most phenomena are nonlinear in nature. Indeed, for many dynamic systems the use of nonlinear models is often of great interest and generally characterizes adequately physical processes over their whole operating range. Thus, accuracy and performance of the control law increase significantly. Therefore, nonlinear system modeling is much more important than linear system identification. We will deal with various nonlinear models and their processing

Channel Equalization using GA Family

High speed data transmissions over communication channels distort the trans- mitted signals in both amplitude and phase due to presence of Inter Symbol Inter- ference (ISI). Other impairments like thermal noise, impulse noise and cross talk also cause further distortions to the received symbols. Adaptive equalization of the digital channels at the receiver removes/reduces the e®ects of such ISIs and attempts to recover the transmitted symbols. Basically an equalizer is an inverse ¯lter which is placed at the front end of the receiver. Its transfer function is inverse to the transfer function of the associated channel. The Least-Mean-Square (LMS), Recursive-Least-Square (RLS) and Multilayer perceptron (MLP) based adaptive equalizers aim to minimize the ISI present in the digital communication channel. These are gradient based learning algorithms and therefore there is possibility that during training of the equalizers, its weights do not reach to their optimum values due to ..

A Review of the Family of Artificial Fish Swarm Algorithms: Recent Advances and Applications

The Artificial Fish Swarm Algorithm (AFSA) is inspired by the ecological behaviors of fish schooling in nature, viz., the preying, swarming, following and random behaviors. Owing to a number of salient properties, which include flexibility, fast convergence, and insensitivity to the initial parameter settings, the family of AFSA has emerged as an effective Swarm Intelligence (SI) methodology that has been widely applied to solve real-world optimization problems. Since its introduction in 2002, many improved and hybrid AFSA models have been developed to tackle continuous, binary, and combinatorial optimization problems. This paper aims to present a concise review of the family of AFSA, encompassing the original ASFA and its improvements, continuous, binary, discrete, and hybrid models, as well as the associated applications. A comprehensive survey on the AFSA from its introduction to 2012 can be found in [1]. As such, we focus on a total of {\color{blue}123} articles published in high-quality journals since 2013. We also discuss possible AFSA enhancements and highlight future research directions for the family of AFSA-based models.Comment: 37 pages, 3 figure

Multi Look-Up Table Digital Predistortion for RF Power Amplifier Linearization

Premi extraordinari doctorat curs 2007-2008, àmbit d’Enginyeria de les TICAquesta Tesi Doctoral se centra en el disseny d'un nou linealitzador de Predistorsió Digital (Digital Predistortion - DPD) capaç de compensar la dinàmica i els efectes no lineals introduïts pels Amplificadors de Potència (Power Amplifiers - PAs). Un dels trets més rellevants d'aquest nou predistorsionador digital i adaptatiu consisteix en ser deduïble a partir d'un model de PA anomenat Nonlinear Auto-Regressive Moving Average (NARMA). A més, la seva arquitectura multi-LUT (multi-Taula) permet la implementació en un dispositiu Field Programmable Gate Array (FPGA).La funció de predistorsió es realitza en banda base, per tant, és independent de la banda freqüencial on es durà a terme l'amplificació del senyal de RF, el que pot resultar útil si tenim en compte escenaris multibanda o reconfigurables. D'altra banda, el fet que aquest DPD tingui en compte els efectes de memòria introduïts pel PA, representa una clara millora de les prestacions aconseguides per un simple DPD sense memòria. En comparació amb d'altres DPDs basats en models més computacionalment complexos, com és el cas de les xarxes neuronals amb memòria (Time-Delayed Neural Networks - TDNN), la estructura recursiva del DPD proposat permet reduir el nombre de LUTs necessàries per compensar els efectes de memòria del PA. A més, la seva estructura multi-LUT permet l'escalabilitat, és a dir, activar or desactivar les LUTs que formen el DPD en funció de la dinàmica que presenti el PA.En una primera aproximació al disseny del DPD, és necessari identificar el model NARMA del PA. Un dels majors avantatges que presenta el model NARMA és la seva capacitat per trobar un compromís entre la fidelitat en l'estimació del PA i la complexitat computacional introduïda. Per reforçar aquest compromís, l' ús d'algoritmes heurístics de cerca, com són el Simulated Annealing o els Genetic Algorithms, s'utilitzen per trobar els retards que millor caracteritzen la memòria del PA i per tant, permeten la reducció del nombre de coeficients necessaris per caracteritzar-la. Tot i així, la naturalesa recursiva del model NARMA comporta que, de cara a garantir l'estabilitat final del DPD, cal dur a terme un estudi previ sobre l'estabilitat del model.Una vegada s'ha obtingut el model NARMA del PA i s'ha verificat l'estabilitat d'aquest, es procedeix a l'obtenció de la funció de predistorsió a través del mètode d'identificació predictiu. Aquest mètode es basa en la continua identificació del model NARMA del PA i posteriorment, a partir del model obtingut, es força al PA perquè es comporti de manera lineal. Per poder implementar la funció de predistorsió en la FPGA, cal primer expressar-la en forma de combinacions en paral·lel i cascada de les anomenades Cel·les Bàsiques de Predistorsió (BPCs), que són les unitats fonamentals que composen el DPD. Una BPC està formada per un multiplicador complex, un port RAM dual que actua com a LUT (taula de registres) i un calculador d'adreces. Les LUTs s'omplen tenint en compte una distribució uniforme dels continguts i l'indexat d'aquestes es duu a terme mitjançant el mòdul de l'envoltant del senyal. Finalment, l'adaptació del DPD consisteix en monitoritzar els senyals d'entrada i sortida del PA i anar duent a terme actualitzacions periòdiques del contingut de les LUTs que formen les BPCs. El procés d'adaptació del contingut de les LUTs es pot dur a terme en la mateixa FPGA encarregada de fer la funció de predistorsió, o de manera alternativa, pot ser duta a terme per un dispositiu extern (com per exemple un DSP - Digital Signal Processor) en una escala de temps més relaxada. Per validar l'exposició teòrica i provar el bon funcionalment del DPD proposat en aquesta Tesi, es proporcionen resultats tant de simulació com experimentals que reflecteixen els objectius assolits en la linealització del PA. A més, certes qüestions derivades de la implementació pràctica, tals com el consum de potència o la eficiència del PA, són també tractades amb detall.This Ph.D. thesis addresses the design of a new Digital Predistortion (DPD) linearizer capable to compensate the unwanted nonlinear and dynamic behavior of power amplifiers (PAs). The distinctive characteristic of this new adaptive DPD is its deduction from a Nonlinear Auto Regressive Moving Average (NARMA) PA behavioral model and its particular multi look-up table (LUT) architecture that allows its implementation in a Field Programmable Gate Array (FPGA) device.The DPD linearizer presented in this thesis operates at baseband, thus becoming independent on the final RF frequency band and making it suitable for multiband or reconfigurable scenarios. Moreover, the proposed DPD takes into account PA memory effects compensation which representsan step forward in overcoming classical limitations of memoryless predistorters. Compared to more computational complex DPDs with dynamic compensation, such Time-Delayed Neural Networks (TDNN), this new DPD takes advantage of the recursive nature of the NARMA structure to relax the number of LUTs required to compensate memory effects in PAs. Furthermore, its parallel multi-LUT architecture is scalable, that is, permits enabling or disabling the contribution of specific LUTs depending on the dynamics presented by a particular PA.In a first approach, it is necessary to identify a NARMA PA behavioral model. The extraction of PA behavioral models for DPD linearization purposes is carried out by means of input and output complex envelope signal observations. One of the major advantages of the NARMA structure regards its capacity to deal with the existing trade-off between computational complexity and accuracy in PA behavioral modeling. To reinforce this compromise, heuristic search algorithms such the Simulated Annealing or Genetic Algorithms are utilized to find the best sparse delays that permit accurately reproducing the PA nonlinear dynamic behavior. However, due to the recursive nature of the NARMA model, an stability test becomes a previous requisite before advancing towards DPD linearization.Once the PA model is identified and its stability verified, the DPD function is extracted applying a predictive predistortion method. This identification method relies just on the PA NARMA model and consists in adaptively forcing the PA to behave as a linear device. Focusing in the DPD implementation, it is possible to map the predistortion function in a FPGA, but to fulfill this objective it is first necessary to express the predistortion function as a combined set of LUTs.In order to store the DPD function into a FPGA, it has to be stated in terms of parallel and cascade Basic Predistortion Cells (BPCs), which are the fundamental building blocks of the NARMA based DPD. A BPC is formed by a complex multiplier, a dual port RAM memory block acting as LUT and an address calculator. The LUT contents are filled following an uniform spacing procedure and its indexing is performed with the amplitude (modulus) of the signal's envelope.Finally, the DPD adaptation consists in monitoring the input-output data and performing frequent updates of the LUT contents that conform the BPCs. This adaptation process can be carried out in the same FPGA in charge of performing the DPD function, or alternatively can be performed by an external device (i.e. a DSP device) in a different time-scale than real-time operation.To support all the theoretical design and to prove the linearization performance achieved by this new DPD, simulation and experimental results are provided. Moreover, some issues derived from practical experimentation, such as power consumption and efficiency, are also reported and discussed within this thesis.Award-winningPostprint (published version