206 research outputs found

    Study of Various Motherboards

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    GRAPE-6: The massively-parallel special-purpose computer for astrophysical particle simulation

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    In this paper, we describe the architecture and performance of the GRAPE-6 system, a massively-parallel special-purpose computer for astrophysical NN-body simulations. GRAPE-6 is the successor of GRAPE-4, which was completed in 1995 and achieved the theoretical peak speed of 1.08 Tflops. As was the case with GRAPE-4, the primary application of GRAPE-6 is simulation of collisional systems, though it can be used for collisionless systems. The main differences between GRAPE-4 and GRAPE-6 are (a) The processor chip of GRAPE-6 integrates 6 force-calculation pipelines, compared to one pipeline of GRAPE-4 (which needed 3 clock cycles to calculate one interaction), (b) the clock speed is increased from 32 to 90 MHz, and (c) the total number of processor chips is increased from 1728 to 2048. These improvements resulted in the peak speed of 64 Tflops. We also discuss the design of the successor of GRAPE-6.Comment: Accepted for publication in PASJ, scheduled to appear in Vol. 55, No.

    Portable Computer Technology (PCT) Research and Development Program Phase 2

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    The subject of this project report, focused on: (1) Design and development of two Advanced Portable Workstation 2 (APW 2) units. These units incorporate advanced technology features such as a low power Pentium processor, a high resolution color display, National Television Standards Committee (NTSC) video handling capabilities, a Personal Computer Memory Card International Association (PCMCIA) interface, and Small Computer System Interface (SCSI) and ethernet interfaces. (2) Use these units to integrate and demonstrate advanced wireless network and portable video capabilities. (3) Qualification of the APW 2 systems for use in specific experiments aboard the Mir Space Station. A major objective of the PCT Phase 2 program was to help guide future choices in computing platforms and techniques for meeting National Aeronautics and Space Administration (NASA) mission objectives. The focus being on the development of optimal configurations of computing hardware, software applications, and network technologies for use on NASA missions

    Light Aircraft Management System

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    This report details methods to construct a flight data logging system that can be used to manage student flight and aircraft maintenance records. These methods utilise GPS, embedded processors and associated software to depict the occurrence of landings, Touch and Goes and record aircraft total flight time. By manipulating these methods it was possible to produce a usable data-logging unit which facilitated the automation of flight maneuver recording. This datatogging unit was constructed from embedded components and interfaced with a user defined database. Perusal of the details within should provide the reader with a clear understanding of the tasks involved with employing external equipment to log flight information and to implement this in a form that is beneficial to many users. The technical aspects of this report are twofold: 1. Active employment of electrical and communication based products to extrapolate raw flight information. 2. Implementation of logging program, database and operating system in order to manage raw flight information. These technical aspects are embodied within detailed background information, multiple versions of implementation and an insight into future adaptations of what has already been achieved. The outcome of this report will enable aviation staff and others to automate the updating of student history and achievements towards their license, indicate to the airport an unbiased cost of flight and when the maintenance of their aircraft are due. This project has commercial interest and following the compellations of my findings will almost certainly find its way on to the light aircraft market

    Platforms for prototyping minimally invasive instruments

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    The introduction of new technologies in medicine is often an issue because there are many stages to go through, from the idea to the approval by ethical committees and mass production. This work covers the first steps of the development of a medical device, dealing with the tools that can help to reduce the time for producing the laboratory prototype. These tools can involve electronics and software for the creation of a “universal”' hardware platform that can be used for many robotic applications, adapting only few components for the specific scenario. The platform is created by setting up a traditional computer with operating system and acquisition channels aimed at opening the system toward the real environment. On this platform algorithms can be implemented rapidly, allowing to assess the feasibility of an idea. This approach lets the designer concentrate on the application rather than on the selection of the appropriate hardware electronics every time that a new project starts. In the first part an overview of the existing instruments for minimally invasive interventions that can be found as commercial or research products is given. An introduction related to hardware electronics is presented with the requirements and the specific characteristics needed for a robotic application. The second part focuses on specific projects in MIS. The first project concerns the study and the development of a lightweight hand-held robotic instrument for laparoscopy. Motivations are related to the lack of dexterous hand-held laparoscopic instruments. The second project concerns the study and the presentation of a prototype of a robotic endoscope with enhanced resolution. The third project concerns the development of a system able to detect the inspiration and the expiration phases. The aim is to evaluate the weariness of the surgeon, since breathing can be related to fatigue

    Yearly update : exascale projections for 2013.

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    The HPC architectures of today are significantly different for a decade ago, with high odds that further changes will occur on the road to Exascale. This paper discusses the %E2%80%9Cperfect storm%E2%80%9D in technology that produced this change, the classes of architectures we are dealing with, and probable trends in how they will evolve. These properties and trends are then evaluated in terms of what it likely means to future Exascale systems and applications.

    Power Analysis and Optimization Techniques for Energy Efficient Computer Systems

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    Reducing power consumption has become a major challenge in the design and operation of to-day’s computer systems. This chapter describes different techniques addressing this challenge at different levels of system hardware, such as CPU, memory, and internal interconnection network, as well as at different levels of software components, such as compiler, operating system and user applications. These techniques can be broadly categorized into two types: Design time power analysis versus run-time dynamic power management. Mechanisms in the first category use ana-lytical energy models that are integrated into existing simulators to measure the system’s power consumption and thus help engineers to test power-conscious hardware and software during de-sign time. On the other hand, dynamic power management techniques are applied during run-time, and are used to monitor system workload and adapt the system’s behavior dynamically to save energy

    Апаратне забезпечення: практикум з англійської мови для студентів фізико-математичного факультету спеціальностей: «Інформатика», «Математика та інформатика», «Фізика та інформатика»

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    Практикум складається з 8 розділів, текстів для самостійного опрацювання, додаткового читання та додатків. Тексти підібрані з оригінальної науково-технічної літератури та містять необхідну термінологію зі спеціальності. До складу розділів входять лексико-граматичні та комунікативні вправи, що спонукають студентів до монологічного, діалогічного та полілогічного мовлення, тести для перевірки набутих знань, та завдання для розвитку творчої діяльності студентів. Вправи та тести побудовано на мовному матеріалі, який використовується в текстах розділів. Лексичний мінімум подається у вправах кожного розділу. Додається підсумковий тест для перевірки знань всього курсу. Глосарій містить необхідний мінімум спеціальної лексики. Для студентів неспеціальних факультетів денної, заочної та дистанційної форми навчання, які вивчають інформатику. Пізнавальний характер текстів зацікавить не лише зазначене коло студентів, але й усіх тих, хто поглиблено вивчає англійську мову

    Digital ADCs and ultra-wideband RF circuits for energy constrained wireless applications by Denis Clarke Daly.

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    Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Cataloged from PDF version of thesis.Includes bibliographical references (p. 173-183).Ongoing advances in semiconductor technology have enabled a multitude of portable, low power devices like cellular phones and wireless sensors. Most recently, as transistor device geometries reach the nanometer scale, transistor characteristics have changed so dramatically that many traditional circuits and architectures are no longer optimal and/or feasible. As a solution, much research has focused on developing 'highly digital' circuits and architectures that are tolerant of the increased leakage, variation and degraded voltage headrooms associated with advanced CMOS processes. This thesis presents several highly digital, mixed-signal circuits and architectures designed for energy constrained wireless applications. First, as a case study, a highly digital, voltage scalable flash ADC is presented. The flash ADC, implemented in 0.18 [mu]m CMOS, leverages redundancy and calibration to achieve robust operation at supply voltages from 0.2 V to 0.9 V. Next, the thesis expands in scope to describe a pulsed, noncoherent ultra-wideband transceiver chipset, implemented in 90 nm CMOS and operating in the 3-to-5 GHz band. The all-digital transmitter employs capacitive combining and pulse shaping in the power amplifier to meet the FCC spectral mask without any off-chip filters. The noncoherent receiver system-on-chip achieves both energy efficiency and high performance by employing simple amplifier and ADC structures combined with extensive digital calibration. Finally, the transceiver chipset is integrated in a complete system for wireless insect flight control.(cont.) Through the use of a flexible PCB and 3D die stacking, the total weight of the electronics is kept to 1 g, within the carrying capacity of an adult Manduca sexta moth. Preliminary wireless flight control of a moth in a wind tunnel is demonstrated.Ph.D
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