1,454 research outputs found

    The Essential Role and the Continuous Evolution of Modulation Techniques for Voltage-Source Inverters in the Past, Present, and Future Power Electronics

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    The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future

    FPGA Implementation of a General Space Vector Approach on a 6-Leg Voltage Source Inverter

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    A general algorithm of a Space Vector approach is implemented on a 6-leg VSI controlling a PM synchronous machine with three independent phases. In this last case, the necessity of controlling the zero-sequence current motivates the choice of a special family of vectors, different of this one used in Pulse Width Modulation (PWM) intersective strategy and in common Space Vector PWM (SVPWM). To preserve the parallelism of the algorithm and fulfill the execution time constraints, the implementation is made on a Field Programmable Gate Array (FPGA). Comparisons with more classical 2-level and 3-level PWM are provided.Fui8 within the SOFRACI projec

    Vectorial formalism for analysis and design of polyphase synchronous machines

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    A vectorial formalism for analysis and design of polyphase synchronous machines without reluctance and saturation effects is described. We prove the equivalence of such a machine with a set of magnetically independent machines, which are electrically and mechanically coupled. Specific problems of polyphase machines can thus be favorably analyzed with this concept. Rules of conception and constraints on electric supply can be deduced. Moreover the vectorial approach, which generalizes the complex phasor method, can also be used to control n-leg Voltage Source Inverters. This methodology is applied to 3-phase and 6- phase synchronous machines

    Multiphase induction motor drives - a technology status review

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    The area of multiphase variable-speed motor drives in general and multiphase induction motor drives in particular has experienced a substantial growth since the beginning of this century. Research has been conducted worldwide and numerous interesting developments have been reported in the literature. An attempt is made to provide a detailed overview of the current state-of-the-art in this area. The elaborated aspects include advantages of multiphase induction machines, modelling of multiphase induction machines, basic vector control and direct torque control schemes and PWM control of multiphase voltage source inverters. The authors also provide a detailed survey of the control strategies for five-phase and asymmetrical six-phase induction motor drives, as well as an overview of the approaches to the design of fault tolerant strategies for post-fault drive operation, and a discussion of multiphase multi-motor drives with single inverter supply. Experimental results, collected from various multiphase induction motor drive laboratory rigs, are also included to facilitate the understanding of the drive operatio

    A novel five-level optimized carrier multilevel PWM quad-inverter six-phase AC drive

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    A novel single carrier pulse-width modulation (PWM) for a new quad-inverter configuration for multilevel six-phase asymmetrical open-winding ac converter is proposed in this article. Modularity of the circuit consist of four standard two-level voltage source inverters (VSI) with slight modifications, i.e. one additional bi-direction switch (MOSFET/IGBT) in each phase and a link to neutral with two capacitors to generate increased output levels. Furthermore, original optimal single carrier zero-shifted five-level modulation (SCZSFM) algorithm is developed for each VSI to behave as equivalent to ones, a classical five-level multilevel inverter. Moreover, feasibility of the topology allows the VSIs to provide multilevel output voltage regardless of the open-winding electrical machine configuration. Also, the developed single carrier based PWM presents a straightforward solution compared to space vector modulation approaches for real time implementation. The total electric power shared among the four dc buses and quadruples the power capability of VSIs. Complete ac drive modules are developed numerically using simulation in MATLAB/PLECS software. Observed set of results are depicted in this paper under balanced conditions to show the effectiveness of the proposal in good agreement with theoretical background. This proposal suits the need of low-voltage/high-current applications to ac tractions, electrical vehicles and ‘More-Electric Aircraft’ propulsion systems

    A novel space-vector algorithm for multilevel converters based on geometrical considerations using a new sequence control technique

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    his paper presents a fast and simple space vector modulation algorithm for voltage source multilevel converters for calculating the switching times and the space vectors using simple geometrical considerations. This method provides the nearest switching vectors sequence to the reference vector and calculates the on-state durations of the respective switching state vectors without involving trigonometric functions, look-up tables or coordinate system transformations which increase the computational load corresponding to the modulation of a multilevel converter. The low computational cost of the proposed method is always the same and it is independent of the number of levels of the converter. In addition, a new switching sequence control technique is presented for reducing the ripple of the DC-link voltage approximately in 66%

    Finite control set model predictive control-a powerful control algorithm for grid-connected power converters

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    © 2016 IEEE. This paper presents a detailed description of Finite Control Set Model Predictive Control applied to power converters. Some key features related to this methodology are presented and compared with model predictive control based space vector modulation methods. The basic models, principles, control diagrams, and simulation results are presented to provide a comparison between them. The analysis is performed on a three-phase/ two-level voltage source inverter, which is one of the most common converter topologies used in industry. Among the conclusions are the feasibility and great potential of Finite Control Set Model Predictive Control due to the advanced signal-processing capability, particularly for power systems with a reduced number of switching states and more complicated principles

    Space-vector PWM with common-mode voltage elimination for multiphase drives

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    Switching common-mode voltage (CMV) generated by the pulse width modulation (PWM) of the inverter causes common-mode currents, which lead to motor bearing failures and electromagnetic interference problems in multiphase drives. Such switching CMV can be reduced by taking advantage of the switching states of multilevel multiphase inverters that produce zero CMV. Specific space-vector PWM (SVPWM) techniques with CMV elimination, which only use zero CMV states, have been proposed for three-level five-phase drives, and for open-end winding five-, six-, and seven-phase drives, but such methods cannot be extended to a higher number of levels or phases. This paper presents a general (for any number of levels and phases) SVPMW with CMV elimination. The proposed technique can be applied to most multilevel topologies, has low computational complexity and is suitable for low-cost hardware implementations. The new algorithm is implemented in a low-cost field-programmable gate array and it is successfully tested in the laboratory using a five-level five-phase motor drive.Ministerio de Ciencia e InnovaciĂłnEuropean CommissionMinisterio de EconomĂ­a y Competitividad | Ref. DPI2012-31283Ministerio de EconomĂ­a y Competitividad | Ref. DPI2015-6541
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