Contribution au domaine de la conception d’objets communicants embarqués basse consommation et autonomes en énergie

This report proposes a synthesis of my research and teaching activities. Since 2008, as associate professor at the University of Nice Sophia Antipolis, I did my research into the MCSOC team from the LEAT laboratory. For nearly 15 years, my activity is focused on the design of embedded communicating objects, with a strong emphasis for high level approach allowing, early in the design flow, to model and optimize the performance as well as the consumed energy. Those system-level approaches are more and more relevant over the last few years and become a must-have solution for designing efficient embedded systems. My activity on energy harvesting for autonomous systems brings an original contribution to this domain and has a national and international impact. This document is organized in two parts: the first part is a synthesis of my research and teaching activity, while the second one presents in details my research work, putting in evidence my contributions and innovative aspects. The manuscript ends with a scientific overview as well as some perspectives.Ce manuscrit présente une synthèse de mes travaux de recherche. Depuis septembre 2008, date de ma nomination en tant que Maître de Conférences à l’Université de Nice Sophia Antipolis, j’ai effectué mes travaux de recherche au sein de la thématique MCSOC (Modélisation, Conception Système d’Objets Communicants) du laboratoire LEAT (Université de Nice Sophia Antipolis, UMR CNRS 7248). Depuis maintenant près de 15 ans, mes travaux de recherche s’intéressent au domaine de la conception d’objets communicants embarqués avec une évolution forte vers des approches de haut niveau d’abstraction permettant tôt dans le flot de conception, de modéliser et d’optimiser les performances et la consommation d’énergie. Ces approches de niveau système n’ont cessé de prendre de l’ampleur ces dernières années et s’installent aujourd’hui comme une solution incontournable du domaine de la conception de systèmes embarqués. Mes travaux plus spécifiques sur l’autonomie énergétique de ces systèmes apportent une contribution originale au domaine et ont un rayonnement national et international. Ce document est organisé en deux parties : la première partie propose une synthèse des travaux de recherche et d’enseignement ; la seconde présente de manière détaillée mes travaux de recherche en mettant en avant toutes ses contributions et originalités. Le manuscrit s’achève par un bilan scientifique ainsi que quelques perspectives de recherche

Enabling VLSI processing blocks for MIMO-OFDM Communications

Multi-input multi-output (MIMO) systems combined with orthogonal frequency-division multiplexing (OFDM) gained a wide popularity in wireless applications due to the potential of providing increased channel capacity and robustness against multipath fading channels. However these advantages come at the cost of a very high processing complexity and the efficient implementation of MIMO-OFDM receivers is today a major research topic. In this paper, efficient architectures are proposed for the hardware implementation of the main building blocks of a MIMO-OFDM receiver. A sphere decoder architecture flexible to different modulation without any loss in BER performance is presented while the proposed matrix factorization implementation allows to achieve the highest throughput specified in the IEEE 802.11n standard. Finally a novel sphere decoder approach is presented, which allows for the realization of new golden space time trellis coded modulation (GST-TCM) scheme. Implementation cost and offered throughput are provided for the proposed architectures synthesized on a 0.13  CMOS standard cell technology or on advanced FPGA devices

Hardware dedicado para sistemas empotrados de visión

La constante evolución de las Tecnologías de la Información y las Comunicaciones no solo ha permitido que más de la mitad de la población mundial esté actualmente interconectada a través de Internet, sino que ha sido el caldo de cultivo en el que han surgido nuevos paradigmas, como el ‘Internet de las cosas’ (IoT) o la ‘Inteligencia ambiental’ (AmI), que plantean la necesidad de interconectar objetos con distintas funcionalidades para lograr un entorno digital, sensible y adaptativo, que proporcione servicios de muy distinta índole a sus usuarios. La consecución de este entorno requiere el desarrollo de dispositivos electrónicos de bajo coste que, con tamaño y peso reducido, sean capaces de interactuar con el medio que los rodea, operar con máxima autonomía y proporcionar un elevado nivel de inteligencia. La funcionalidad de muchos de estos dispositivos incluirá la capacidad para adquirir, procesar y transmitir imágenes, extrayendo, interpretando o modificando la información visual que resulte de interés para una determinada aplicación. En el marco de este desafío surge la presente Tesis Doctoral, cuyo eje central es el desarrollo de hardware dedicado para la implementación de algoritmos de procesamiento de imágenes y secuencias de vídeo usados en sistemas empotrados de visión. El trabajo persigue una doble finalidad. Por una parte, la búsqueda de soluciones que, por sus prestaciones y rendimiento, puedan ser incorporadas en sistemas que satisfagan las estrictas exigencias de funcionalidad, tamaño, consumo de energía y velocidad de operación demandadas por las nuevas aplicaciones. Por otra, el diseño de una serie de bloques funcionales implementados como módulos de propiedad intelectual, que permitan aliviar la carga computacional de las unidades de procesado de los sistemas en los que se integren. En la Tesis se proponen soluciones específicas para la implementación de dos tipos de operaciones habitualmente presentes en muchos sistemas de visión artificial: la sustracción de fondo y el etiquetado de componentes conexos. Las distintas alternativas surgen como consecuencia de aplicar una adecuada relación de compromiso entre funcionalidad y coste, entendiendo este último criterio en términos de recursos de cómputo, velocidad de operación y potencia consumida, lo que permite cubrir un amplio espectro de aplicaciones. En algunas de las soluciones propuestas se han utilizado además, técnicas de inferencia basadas en Lógica Difusa con idea de mejorar la calidad de los sistemas de visión resultantes. Para la realización de los diferentes bloques funcionales se ha seguido una metodología de diseño basada en modelos, que ha permitido la realización de todo el ciclo de desarrollo en un único entorno de trabajo. Dicho entorno combina herramientas informáticas que facilitan las etapas de codificación algorítmica, diseño de circuitos, implementación física y verificación funcional y temporal de las distintas alternativas, acelerando con ello todas las fases del flujo de diseño y posibilitando una exploración más eficiente del espacio de posibles soluciones. Asimismo, con el objetivo de demostrar la funcionalidad de las distintas aportaciones de esta Tesis Doctoral, algunas de las soluciones propuestas han sido integradas en sistemas de vídeo reales, que emplean buses estándares de uso común. Los dispositivos seleccionados para llevar a cabo estos demostradores han sido FPGAs y SoPCs de Xilinx, ya que sus excelentes propiedades para el prototipado y la construcción de sistemas que combinan componentes software y hardware, los convierten en candidatos ideales para dar soporte a la implementación de este tipo de sistemas.The continuous evolution of the Information and Communication Technologies (ICT), not only has allowed more than half of the global population to be currently interconnected through Internet, but it has also been the breeding ground for new paradigms such as Internet of Things (ioT) or Ambient Intelligence (AmI). These paradigms expose the need of interconnecting elements with different functionalities in order to achieve a digital, sensitive, adaptive and responsive environment that provides services of distinct nature to the users. The development of low cost devices, with small size, light weight and a high level of autonomy, processing power and ability for interaction is required to obtain this environment. Attending to this last feature, many of these devices will include the capacity to acquire, process and transmit images, extracting, interpreting and modifying the visual information that could be of interest for a certain application. This PhD Thesis, focused on the development of dedicated hardware for the implementation of image and video processing algorithms used in embedded systems, attempts to response to this challenge. The work has a two-fold purpose: on one hand, the search of solutions that, for its performance and properties, could be integrated on systems with strict requirements of functionality, size, power consumption and speed of operation; on the other hand, the design of a set of blocks that, packaged and implemented as IP-modules, allow to alleviate the computational load of the processing units of the systems where they could be integrated. In this Thesis, specific solutions for the implementation of two kinds of usual operations in many computer vision systems are provided. These operations are background subtraction and connected component labelling. Different solutions are created as the result of applying a good performance/cost trade-off (approaching this last criteria in terms of area, speed and consumed power), able to cover a wide range of applications. Inference techniques based on Fuzzy Logic have been applied to some of the proposed solutions in order to improve the quality of the resulting systems. To obtain the mentioned solutions, a model based-design methodology has been applied. This fact has allowed us to carry out all the design flow from a single work environment. That environment combines CAD tools that facilitate the stages of code programming, circuit design, physical implementation and functional and temporal verification of the different algorithms, thus accelerating the overall processes and making it possible to explore the space of solutions. Moreover, aiming to demonstrate the functionality of this PhD Thesis’s contributions, some of the proposed solutions have been integrated on real video systems that employ common and standard buses. The devices selected to perform these demonstrators have been FPGA and SoPCs (manufactured by Xilinx) since, due to their excellent properties for prototyping and creating systems that combine software and hardware components, they are ideal to develop these applications

Combined Source and Channel Strategies for Optimized Video Communications

ISBN 978-953-7619-70-

ASD: çok amaçlı ayarlanabilir sınıflandırıcı devreler

Göknar, İzzet Cem (Dogus Author) -- Minaei, Shahram (Dogus Author) -- Yıldız, Merih (Dogus Author)Çalışmada, ayarlanabilir sınıflandırıcı devreleri ve uygulama alanları incelenmiştir. AMS 0.35 μm CMOS prosesi ile, tasarlanan sınıflandırıcı bir tümdevrenin üretimi de yapılmıştır. Bu sınıflandırıcı devresinin kontrol parametrelerinin bulunmasını sağlayan öğrenme algoritmaları çeşitli uygulamalar için geliştirilmiştir. Sınıflandırma işlemleri geliştirilen algoritmalar ve üretilen devre ile İris ve Haberman veri kümelerine uygulanarak sonuçların uyum içinde olduğu gösterilmiştir.TÜBİTA

SMARAD - Centre of Excellence in Smart Radios and Wireless Research - Activity Report 2011 - 2013

Centre of Excellence in Smart Radios and Wireless Research (SMARAD), originally established with the name Smart and Novel Radios Research Unit, is aiming at world-class research and education in Future radio and antenna systems, Cognitive radio, Millimetre wave and THz techniques, Sensors, and Materials and energy, using its expertise in RF, microwave and millimeter wave engineering, in integrated circuit design for multi-standard radios as well as in wireless communications. SMARAD has the Centre of Excellence in Research status from the Academy of Finland since 2002 (2002-2007 and 2008-2013). Currently SMARAD consists of five research groups from three departments, namely the Department of Radio Science and Engineering, Department of Micro and Nanosciences, and Department of Signal Processing and Acoustics, all within the Aalto University School of Electrical Engineering. The total number of employees within the research unit is about 100 including 8 professors, about 30 senior scientists and about 40 graduate students and several undergraduate students working on their Master thesis. The relevance of SMARAD to the Finnish society is very high considering the high national income from exports of telecommunications and electronics products. The unit conducts basic research but at the same time maintains close co-operation with industry. Novel ideas are applied in design of new communication circuits and platforms, transmission techniques and antenna structures. SMARAD has a well-established network of co-operating partners in industry, research institutes and academia worldwide. It coordinates a few EU projects. The funding sources of SMARAD are diverse including the Academy of Finland, EU, ESA, Tekes, and Finnish and foreign telecommunications and semiconductor industry. As a by-product of this research SMARAD provides highest-level education and supervision to graduate students in the areas of radio engineering, circuit design and communications through Aalto University and Finnish graduate schools. During years 2011 – 2013, 18 doctor degrees were awarded to the students of SMARAD. In the same period, the SMARAD researchers published 197 refereed journal articles and 360 conference papers

The survey on Near Field Communication

PubMed ID: 26057043Near Field Communication (NFC) is an emerging short-range wireless communication technology that offers great and varied promise in services such as payment, ticketing, gaming, crowd sourcing, voting, navigation, and many others. NFC technology enables the integration of services from a wide range of applications into one single smartphone. NFC technology has emerged recently, and consequently not much academic data are available yet, although the number of academic research studies carried out in the past two years has already surpassed the total number of the prior works combined. This paper presents the concept of NFC technology in a holistic approach from different perspectives, including hardware improvement and optimization, communication essentials and standards, applications, secure elements, privacy and security, usability analysis, and ecosystem and business issues. Further research opportunities in terms of the academic and business points of view are also explored and discussed at the end of each section. This comprehensive survey will be a valuable guide for researchers and academicians, as well as for business in the NFC technology and ecosystem.Publisher's Versio

2012 Activity Report of the Regional Research Programme on Hadrontherapy for the ETOILE Center

2012 is the penultimate year of financial support by the CPER 2007-2013 for ETOILE's research program, sustained by the PRRH at the University Claude Bernard. As with each edition we make the annual review of the research in this group, so active for over 12 years now. Over the difficulties in the decision-making process for the implementation of the ETOILE Center, towards which all our efforts are focussed, some "themes" (work packages) were strengthened, others have progressed, or have been dropped. This is the case of the eighth theme (technological developments), centered around the technology for rotative beam distribution heads (gantries) and, after being synchronized with the developments of ULICE's WP6, remained so by ceasing its activities, coinciding also with the retirement of its historic leader at IPNL, Marcel Bajard. Topic number 5 ("In silico simulations") has suffered the departure of its leader, Benjamin Ribba, although the work has still been provided by Branka Bernard, a former postdoctoral fellow in Lyon Sud, and now back home in Croatia, still in contract with UCBL for the ULICE project. Aside from these two issues (and the fact that the theme "Medico-economical simulations" is now directly linked to the first one ("Medical Project"), the rest of the teams are growing, as evidenced by the publication statistics at the beginning of this report. This is obviously due to the financial support of our always faithful regional institutions, but also to the synergy that the previous years, the European projects, the arrival of the PRIMES LabEx, and the national France Hadron infrastructure have managed to impulse. The Rhone-Alpes hadron team, which naturally includes the researchers of LPC at Clermont, should also see its influence result in a strong presence in France Hadron's regional node, which is being organized. The future of this regional research is not yet fully guaranteed, especially in the still uncertain context of ETOILE, but the tracks are beginning to emerge to allow past and present efforts translate into a long future that we all want to see established. Each of the researchers in PRRH is aware that 2013 will be (and already is) the year of great challenge : for ETOILE, for the PRRH, for hadron therapy in France, for French hadrontherapy in Europe (after the opening and beginning of treatments in the German [HIT Heidelberg, Marburg], Italian [CNAO, Pavia] and Austrian [MedAustron, Wien Neuerstadt]) centers. Let us meet again in early 2014 for a comprehensive review of the past and a perspective for the future ..