14 research outputs found

    The Fifteenth Data Release of the Sloan Digital Sky Surveys: First Release of MaNGA-derived Quantities, Data Visualization Tools, and Stellar Library

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    Twenty years have passed since first light for the Sloan Digital Sky Survey (SDSS). Here, we release data taken by the fourth phase of SDSS (SDSS-IV) across its first three years of operation (2014 July–2017 July). This is the third data release for SDSS-IV, and the 15th from SDSS (Data Release Fifteen; DR15). New data come from MaNGA—we release 4824 data cubes, as well as the first stellar spectra in the MaNGA Stellar Library (MaStar), the first set of survey-supported analysis products (e.g., stellar and gas kinematics, emission-line and other maps) from the MaNGA Data Analysis Pipeline, and a new data visualization and access tool we call "Marvin." The next data release, DR16, will include new data from both APOGEE-2 and eBOSS; those surveys release no new data here, but we document updates and corrections to their data processing pipelines. The release is cumulative; it also includes the most recent reductions and calibrations of all data taken by SDSS since first light. In this paper, we describe the location and format of the data and tools and cite technical references describing how it was obtained and processed. The SDSS website (www.sdss.org) has also been updated, providing links to data downloads, tutorials, and examples of data use. Although SDSS-IV will continue to collect astronomical data until 2020, and will be followed by SDSS-V (2020–2025), we end this paper by describing plans to ensure the sustainability of the SDSS data archive for many years beyond the collection of data

    A study on the challenges in GaN HEMT-based designs from component to board development level

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    International audienceThis paper presents a study on a few main challenges in GaN-based designs from component to board development level. Transistors in parallel in a switch are more critical in designing power cells due to the high sensitivity to parasitic components in both power and gate control circuits. Further, the changes in switching behaviour on the discrepancies in device parameters are yet to be realized. In this study, both experimental and simulation based approaches are used for the verification of parasitic effects. The large signal modeling with LTSpice simulation is used for the prediction of effect due to parametric variation of devices in parallel

    Design, implementation and characterization of an integrated current sensing in GaN HEMT device by using the current-mirroring technique

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    International audienceBased on wide bandgap devices (WBG) characterization constraints, this work presents the design, implementation and characterization of an integrated current sensor in a GaN HEMT (Gallium Nitride High-Electron-Mobility Transistor) by using the current-mirroring technique. Two HEMTs are implemented in this design; the compromised between the size ratio of these two transistors in the current-mirroring circuit and the sensitivity of the sensor are taken into account on the device design phase. In the implementation phase, the auxiliary components are optimized for the operation of the sensor, and then the circuit with the integrated current sensing in GaN power device is characterized with a high temperature double pulse test method, up to 175°C

    Design, implementation and characterization of an integrated current sensing in GaN HEMT device by using the current-mirroring technique

    No full text
    International audienceBased on wide bandgap devices (WBG) characterization constraints, this work presents the design, implementation and characterization of an integrated current sensor in a GaN HEMT (Gallium Nitride High-Electron-Mobility Transistor) by using the current-mirroring technique. Two HEMTs are implemented in this design; the compromised between the size ratio of these two transistors in the current-mirroring circuit and the sensitivity of the sensor are taken into account on the device design phase. In the implementation phase, the auxiliary components are optimized for the operation of the sensor, and then the circuit with the integrated current sensing in GaN power device is characterized with a high temperature double pulse test method, up to 175°C

    Recent Developments and Prospects of Fully Recessed MIS Gate Structures for GaN on Si Power Transistors

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    For high electron mobility transistors (HEMTs) power transistors based on AlGaN/GaN heterojunction, p-GaN gate has been the gate topology commonly used to deplete the two dimensional electron gas (2-DEG) and achieve a normally-OFF behavior. But fully recessed MIS gate GaN power transistors or MOSc-HEMTs have gained interest as normally-OFF HEMTs thanks to the wider voltage swing and reduced gate leakage current when compared to p-GaN gate HEMTs. However the mandatory AlGaN barrier etching to deplete the 2-DEG combined with the nature of the dielectric/GaN interface generates etching-related defects, traps, and roughness. As a consequence, the threshold voltage (VTH) can be unstable, and the electron mobility is reduced, which presents a challenge for the integration of a fully recessed MIS gate. Recent developments have been studied to solve this challenge. In this paper, we discuss developments in gate recess with low impact etching and atomic layer etching (ALE) alongside surface treatments such as wet cleaning, thermal or plasma treatment, all in the scope of having a surface close to pristine. Finally, different interfacial layers, such as AlN, and alternative dielectrics investigated to optimize the dielectric/GaN interface are presented

    Analytic Model of Threshold Voltage (VTH) Recovery in Fully Recessed Gate MOS-Channel HEMT (High Electron Mobility Transistor) after OFF-State Drain Stress

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    Today, wide bandgap (WBG) GaN semiconductors are considered the future, allowing the improvement of power transistors. The main advantage of GaN is the presence of two-dimensional electron gas (2Deg) typically used as a conduction layer in normally-on and normally-off transistors. Concerning the normally-off family, several solutions are proposed. Among these, one of the most promising is the MIS-Gate technology that features a gate recess architecture allowing the semiconductor to physically cut off the 2Deg and drastically decrease gate–source leakage currents. The Vth relaxation characteristic, after voltage stress, has been investigated. It has been shown that the main impact is due to charges close to the gate dielectric/GaN interface, precisely dwelling within the dielectric or the GaN epitaxy. This work provides an analytical model of the Vth evolution of these MIS-GATE (metal insulator semiconductor gate) transistors fabricated on GaN-silicon substrate. This model allows the extraction of different trap energy levels from a temporary threshold voltage (Vth) shift after 650 V stress. Based on this method, it is possible to identify up to four different trap energy levels. By comparing state of the art methods, we show that these obtained energy levels are well correlated with either magnesium and carbon impurity or Ga and/or N vacancy sites in the GaN epitaxy

    Deep Insights into Recessed Gate MOS-HEMT Technology for Power Applications

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    International audienceIn this paper, we present a general overview of AIGaN/GaN MOS channel High Electron Mobility Transistor (HEMTs) with fully recessed gate architecture fabricated on 200mm Si-wafer. Specifically, an insight on its benefits compared to market competitors is brought out respectively from transistor electrical characteristics to robustness behavioral aspects

    Gallium nitride power devices for power conversion applications

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    International audienceThis presentation will deal with our work on gallium nitride (GaN) devices for power electronics. The breakdown field of GaN is around 3.3 MV/cm and its mobility can surpass 1000 cm²/V.s, making it an excellent candidate for power switches. The lateral HEMT (High Electron Mobility Transistor) architecture using GaN epitaxy on Silicon is increasingly successful, especially for applications at 650V or below. GaN free-standing wafers are also being used to develop components with a vertical geometry which leads to higher power density due to volume instead of surface conduction.We have developed lateral normally-off GaN-on-Si MOSc-HEMTs (Metal Oxide Semiconductor channel HEMTs). Their advantage comes from the insulated gate technology results in extremely low gate current and a reduced temperature coefficient of its On-resistance, both of which are beneficial for the design of power converters. We will present a full micro inverter using our 100V and 650V MOSc-HEMTs for inclusion on an individual solar panel (DC 45V / AC 230V). The talk will also cover alternative lateral and vertical device architectures that can allow GaN to address new power conversion applications
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