A Study of the Effect of Gold Thickness Distribution in the Jet Plating Process to Optimize Gold Usage and Plating Voltage Using Design of Experiments

A gold plating process in the electronics industry can be classified as (i) all surface plating or (ii) selective plating. Selective plating is more widely used than all surface plating because it can save more gold used in the plating process and takes less plating time. In this research, the selective plating process called jet plating was studied. Factors that possibly affected the gold usage and plating voltage were also studied to reduce the production cost. These factors included (a) plating temperature, (b) crystal (inhibitor) amount, (c) distance between workpiece and anode, (d) plating current and (e) plating speed. A two-level Full Factorial design with center points was first performed to screen the factors. A Central Composite Design (CCD) was then employed to optimize the factors in jet plating. The amount of gold usage should be reduced to 0.366 g / 10,000 pieces, the plating speed should be increased to 4 m/min and the plating voltage should not exceed 8.0 V. According to the analysis, the optimal settings should be as follows: the plating temperature at 55.5 deg C, the crystal amount at 90%, the distance at 0.5 mm, the plating current at 2.8 A, and the plating speed at 4.5 m/min. This optimal setting led to gold usage of 0.350 g / 10,000 pieces and a plating voltage of 7.16 V. Confirmation runs of 30 experiments at the optimal conditions were then performed. It was found that the gold usage and the plating voltage of the confirmation runs were not different from the optimized gold usage and plating voltage. The optimal condition was then applied in production, which could reduce the gold usage by 4.5% and increase the plating speed by 12.5% while the plating voltage did not exceed the limit