107 research outputs found

    Front-end Electronics for Silicon Trackers readout in Deep Sub-Micron CMOS Technology: The case of Silicon strips at the ILC

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    For the years to come, Silicon strips detectors will be read using the smallest available integrated technologies for room, transparency, and power considerations. CMOS, Bipolar- CMOS and Silicon-Germanium are presently offered in deepsubmicron (250 down to 90nm) at affordable cost through worldwide integrated circuits multiproject centers. As an example, a 180nm CMOS readout prototype chip has been designed and tested, and gave satisfactory results in terms of noise and power. Beam tests are under work, and prospectives in 130nm will be presented

    The electromagnetic calorimeter of the AMS-02 experiment

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    The electromagnetic calorimeter (ECAL) of the AMS-02 experiment is a 3-dimensional sampling calorimeter, made of lead and scintillating fibers. The detector allows for a high granularity, with 18 samplings in the longitudinal direction, and 72 sampling in the lateral direction. The ECAL primary goal is to measure the energy of cosmic rays up to few TeV, however, thanks to the fine grained structure, it can also provide the separation of positrons from protons, in the GeV to TeV region. A direct measurement of high energy photons with accurate energy and direction determination can also be provided.Comment: Proceedings of SF2A conference 201

    HV/HR-CMOS sensors for the ATLAS upgrade—concepts and test chip results

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    In order to extend its discovery potential, the Large Hadron Collider (LHC) will have a major upgrade (Phase II Upgrade) scheduled for 2022. The LHC after the upgrade, called High-Luminosity LHC (HL-LHC), will operate at a nominal leveled instantaneous luminosity of 5× 1034 cm−2 s−1, more than twice the expected Phase I . The new Inner Tracker needs to cope with this extremely high luminosity. Therefore it requires higher granularity, reduced material budget and increased radiation hardness of all components. A new pixel detector based on High Voltage CMOS (HVCMOS) technology targeting the upgraded ATLAS pixel detector is under study. The main advantages of the HVCMOS technology are its potential for low material budget, use of possible cheaper interconnection technologies, reduced pixel size and lower cost with respect to traditional hybrid pixel detector. Several first prototypes were produced and characterized within ATLAS upgrade R&D effort, to explore the performance and radiation hardness of this technology. In this paper, an overview of the HVCMOS sensor concepts is given. Laboratory tests and irradiation tests of two technologies, HVCMOS AMS and HVCMOS GF, are also given

    3D electronics for hybrid pixel detectors – TWEPP-09

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    Future hybrid pixel detectors are asking for smaller pixels in order to improve spatial resolution and to deal with an increasing counting rate. Facing these requirements is foreseen to be done by microelectronics technology shrinking. However, this straightforward approach presents some disadvantages in term of performances and cost. New 3D technologies offer an alternative way with the advantage of technology mixing. For the upgrade of ATLAS pixel detector, a 3D conception of the read-out chip appeared as an interesting solution. Splitting the pixel functionalities into two separate levels will reduce pixel size and open the opportunity to take benefit of technology's mixing. Based on a previous prototype of the read-out chip FE-I4 (IBM 130nm), this paper presents the design of a hybrid pixel read-out chip using threedimensional Tezzaron-Chartered technology. In order to disentangle effects due to Chartered 130nm technology from effects involved by 3D architecture, a first translation of FEI4 prototype had been designed at the beginning of this year in Chartered 2D technology, and first test results will be presented in the last part of this paper

    Radiation-hard active pixel sensors for HL-LHC detector upgrades based on HV-CMOS technology

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    Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation at room temperature. A traditional readout chip is still needed to receive and organize the data from the active sensor and to handle high-level functionality such as trigger management. HV-CMOS has been designed to be compatible with both pixel and strip readout. In this paper an overview of HV2FEI4, a HV-CMOS prototype in 180 nm AMS technology, will be given. Preliminary results after neutron and X-ray irradiation are shown

    Low power discriminator for ATLAS pixel chip

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    The design of the front-end (FE) pixel electronics requires low power, low noise and low threshold dispersion. In this work, we propose a new architecture for the discriminator circuit. It is based on the principle of dynamic biasing and developed for the FE chip of the ATLAS pixel upgrade. This paper presents two discriminator structures where the bias current depends on the presence of a signal at the input of the discriminator. Since the activity in the FE chip is very low, the power consumption is largely reduced allowing the material reduction in the B-layer

    Airway structural cells regulate TLR5-mediated mucosal adjuvant activity

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    Antigen-presenting cell (APC) activation is enhanced by vaccine adjuvants. Most vaccines are based on the assumption that adjuvant activity of Toll-like receptor (TLR) agonists depends on direct, functional activation of APCs. Here, we sought to establish whether TLR stimulation in non-hematopoietic cells contributes to flagellin’s mucosal adjuvant activity. Nasal administration of flagellin enhanced T-cell-mediated immunity, and systemic and secretory antibody responses to coadministered antigens in a TLR5-dependent manner. Mucosal adjuvant activity was not affected by either abrogation of TLR5 signaling in hematopoietic cells or the presence of flagellin-specific, circulating neutralizing antibodies. We found that flagellin is rapidly degraded in conducting airways, does not translocate into lung parenchyma and stimulates an early immune response, suggesting that TLR5 signaling is regionalized. The flagellin-specific early response of lung was regulated by radioresistant cells expressing TLR5 (particularly the airway epithelial cells). Flagellin stimulated the epithelial production of a small set of mediators that included the chemokine CCL20, which is known to promote APC recruitment in mucosal tissues. Our data suggest that (i) the adjuvant activity of TLR agonists in mucosal vaccination may require TLR stimulation of structural cells and (ii) harnessing the effect of adjuvants on epithelial cells can improve mucosal vaccines.Fil: Van Maele, Laurye. Institut Pasteur de Lille. Lille; Francia. Univ Lille Nord de France. Lille; Francia. Institut National de la Santé et de la Recherche Médicale; FranciaFil: Fougeron, Delphine. Institut Pasteur de Lille. Lille; Francia. Institut National de la Santé et de la Recherche Médicale; Francia. Univ Lille Nord de France. Lille; FranciaFil: Janot, Laurent. University of Orléans. Orléans; Francia. Institut de Transgenose. Orleans; FranciaFil: Didierlaurent, A.. Imperial College of London. Londres; Reino UnidoFil: Cayet, D.. Institut Pasteur de Lille. Lille; Francia. Institut National de la Santé et de la Recherche Médicale; Francia. Univ Lille Nord de France. Lille; FranciaFil: Tabareau, J.. Institut Pasteur de Lille. Lille; Francia. Institut National de la Santé et de la Recherche Médicale; Francia. Univ Lille Nord de France. Lille; FranciaFil: Rumbo, Martín. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - La Plata. Instituto de Estudios Inmunológicos y Fisiopatológicos. Universidad Nacional de La Plata. Facultad de Ciencias Exactas. Instituto de Estudios Inmunológicos y Fisiopatológicos; ArgentinaFil: Corvo Chamaillard, S.. Institut Pasteur de Lille. Lille; Francia. Institut National de la Santé et de la Recherche Médicale; Francia. Univ Lille Nord de France. Lille; FranciaFil: Boulenoir, S.. Institut Pasteur de Lille. Lille; Francia. Institut National de la Santé et de la Recherche Médicale; Francia. Univ Lille Nord de France. Lille; FranciaFil: Jeffs, S. Imperial College of London. Londres; Reino UnidoFil: Vande Walle, L. Department of Medical Protein Research. Ghent; Bélgica. University of Ghent; BélgicaFil: Lamkanfi, M.. Department of Medical Protein Research. Ghent; Bélgica. University of Ghent; BélgicaFil: Lemoine, Y.. Univ Lille Nord de France. Lille; Francia. Institut National de la Santé et de la Recherche Médicale; Francia. Institut Pasteur de Lille. Lille; FranciaFil: Erard, F.. Institut de Transgenose. Orleans; Francia. University of Orléans. Orléans; FranciaFil: Hot, D.. Univ Lille Nord de France. Lille; Francia. Institut National de la Santé et de la Recherche Médicale; Francia. Institut Pasteur de Lille. Lille; FranciaFil: Hussell, Tracy. Imperial College of London. Londres; Reino Unido. University of Manchester; Reino UnidoFil: Ryffel, B.. Institut de Transgenose. Orleans; Francia. University of Orléans. Orléans; FranciaFil: Benecke, Arndt G.. Institut des Hautes Études Scientifiques and Centre National de la Recherche Scientifique; FranciaFil: Sirard, J.C.. Univ Lille Nord de France. Lille; Francia. Institut National de la Santé et de la Recherche Médicale; Francia. Institut Pasteur de Lille. Lille; Franci

    Charge Pump Clock Generation PLL for the Data Output Block of the Upgraded ATLAS Pixel Front-End in 130 nm CMOS

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    FE-I4 is the 130 nm ATLAS pixel IC currently under development for upgraded Large Hadron Collider (LHC) luminosities. FE-I4 is based on a low-power analog pixel array and digital architecture concepts tuned to higher hit rates [1]. An integrated Phase Locked Loop (PLL) has been developed that locally generates a clock signal for the 160 Mbit/s output data stream from the 40 MHz bunch crossing reference clock. This block is designed for low power, low area consumption and recovers quickly from loss of lock related to single-event transients in the high radiation environment of the ATLAS pixel detector. After a general introduction to the new FE-I4 pixel front-end chip, this work focuses on the FE-I4 output blocks and on a first PLL prototype test chip submitted in early 2009. The PLL is nominally operated from a 1.2V supply and consumes 3.84mW of DC power. Under nominal operating conditions, the control voltage settles to within 2% of its nominal value in less than 700 ns. The nominal operating frequency for the ring-oscillator based Voltage Controlled Oscillator (VCO) is fVCO = 640MHz. The last sections deal with a fabricated demonstrator that provides the option of feeding the single-ended 80MHz output clock of the PLL as a clock signal to a digital test logic block integrated on-chip. The digital logic consists of an eight bit pseudo-random binary sequence generator, an eight bit to ten bit coder and a serializer. It processes data with a speed of 160 Mbit/s. All dynamic signals are driven off-chip by custommade pseudo-LVDS drivers

    Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

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    The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.Comment: 45 pages, 30 figures, submitted to JINS

    Contribution du CNRS/IN2P3 à l'upgrade d'ATLAS. Proposition soumise au Conseil Scientifique de l'IN2P3 du 21 Juin 2012

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