Upcoming Architectural Advances in DSM Machines and Their Impact on Programmability

Abstract Major advances in the architecture of Distributed Shared-Memory (DSM) multiprocessors are in the offing, largely driven by the increasing integration of transistors on a chip. These advances promise large performance improvements. However, to truly exploit them is likely to require an increase in application tuning efforts. 1 Introduction Distributed Shared-Memory (DSM) multiprocessors are taking an increasing share of the market for medium- and large-scale high-performance parallel processing. These machines, built out of fast off-the-shelf microprocessors, and sometimes even networks and nodes, exploit mass-market architectural designs. This characteristic makes them more cost-effective platforms than traditional vector-based supercomputers for many parallel applications. In addition, it is argued that the simplicity of the shared-memory abstraction delivers a programmable environment. It is well-known, of course, that tuning applications for performance in these machines is often a time-consuming effort, largely due to the complexity of the memory hierarchy. Overall, however, the combination of cost-effective hardware and relative ease of programming can well make DSM multiprocessors the machines of choice for high-end parallel computing in the near future

Upcoming Architectural Advances in DSM Machines and Their Impact on Programmability

Major advances in the architecture of Distributed Shared-Memory (DSM) multiprocessors are in the ong, largely driven by the increasing integration of transistors on a chip. These advances promise large performance improvements. However, to truly exploit them is likely to require an increase in application tuning eorts. 1 Introduction Distributed Shared-Memory (DSM) multiprocessors are taking an increasing share of the market for medium- and large-scale high-performance parallel processing. These machines, built out of fast o-the-shelf microprocessors, and sometimes even networks and nodes, exploit mass-market architectural designs. This characteristic makes them more cost-eective platforms than traditional vector-based supercomputers for many parallel applications. In addition, it is argued that the simplicity of the shared-memory abstraction delivers a programmable environment. It is well-known, of course, that tuning applications for performance in these machines is often a ..