On the design of ultra low voltage CMOS oscillators.

Wireless sensor nodes require very tight power budgets to operate from either asmall battery, some energy harvesting mechanism or both. In many cases, thermalor electrochemical harvesting devices provide very low voltages of the order of100 mV or even lower. Time-keeping functionality is required in IoT systems andthe time-keeping module must be on at all times. Crystal oscillators have provento be useful for low power time-keeping applications, and in this context supplyvoltage lowering is a convenient strategy. Therefore, 32 kHz crystal oscillatorsoperating with only 60 mV supply are presented. Two implementations based ona Schmitt trigger circuit for two different crystals were designed and experimentallycharacterized.These crystal oscillators are based on the application of a Schmitt trigger asan amplifier. Guidelines for designing this block to be the amplifier of a crystaloscillator are provided. Furthermore, a dynamic model of the Schmitt trigger isproposed and the model results are compared against simulations. The amplifierswere experimentally characterized, providing a gain of 2.48 V/V with a 60 mVpower supply. As it was intended in the design stage, for voltages above 100 mVhysteresis appears and the Schmitt trigger starts operating as a comparator.The Schmitt triggers to operate as amplifiers of the crystal oscillators aredesigned in a 130 nm CMOS process, requiring an area of 45μm x 74μm and78μm x 83μm, respectively. The power consumptions of the crystal oscillators are2.26 nW and 15 nW and the temperature stabilities attained are 62 ppm (25-62°C)and 50 ppm (5-62°C), respectively. The dependence on the supply voltage of thecurrent consumption, fractional frequency, start-up time and oscillation amplitudewere measured. The Allan deviation is 30 ppb for both oscillators.On the other hand, an LC voltage controlled oscillator (VCO) is designed in28 nm FD-SOI for RF applications. The possibility of modeling the transistors inthe 28 nm FD-SOI technology by means of the all inversion region long channelbulk transistor model used for the Schmitt trigger circuits, is studied. A cross-coupled nMOS architecture is used to build the VCO. The theoretical limit for theminimum supply voltage that enables oscillation is studied. The transistors wereoptimally sized to aim the minimum power consumption through a low-voltageapproach and the performance of the VCO was obtained through simulations. Los nodos sensores inalámbricos tienen fuertes requerimientos de bajo consumo demanera de operar con baterías pequeñas o algún mecanismo de cosecha de energía, o ambos. En muchos casos, la cosecha de energía térmica o electroquímica provee tensiones muy bajas del orden de 100 mV o incluso menos. Los sistemas de internet de las cosas incluyen un módulo de reloj que debe estar siempre encendido a efectos de contar el tiempo. Los osciladores a cristal son probadamente ́utiles como relojes de bajo consumo, y en este contexto la reducción de la tensión es una estrategia conveniente. Por lo tanto, presentamos osciladores a cristal de 32 kHz operando con sólo 60 mV de tensión de alimentación. Dos implementaciones, basadas en el circuito Schmitt trigger para dos cristales diferentes, se diseñan y caracterizan experimentalmente.Estos osciladores a cristal están basados en la aplicación del Schmitt trigger como amplificador. Se provee una guía para el diseño de este bloque para funcionar como el amplificador de un oscilador a cristal. Adicionalmente se propone un modelo dinámico del Schmitt trigger y los resultados del modelo son comparados con resultados de simulación. Los amplificadores son caracterizados experimentalmente, proveyendo una ganancia de 2.48 V/V con 60 mV de tensión de alimentación. Tal como se pretende en la etapa de diseño, para tensiones mayores a 100 mV aparece el fenómeno de histéresis y el Schmitt trigger comienza a operarcomo un comparador.Los Schmitt trigger para operar como amplificadores de los osciladores a cristal son diseñados en un proceso CMOS de 130 nm y ocupan un área de 45μm x 74μmy 78μm x 83μm, respectivamente. El consumo de potencia de sendos osciladores es2.26 nW y 15 nW y la estabilidad en temperatura obtenida es de 62 ppm (25-62°C)y 50 ppm (5-62°C), respectivamente. Se midieron la dependencia del consumo de corriente con respecto a la tensión de alimentación, la frequencia de oscilación, eltiempo de arranque y la amplitud de oscilación. La desviación de Allan es 30 ppben ambos osciladores.Por otra parte, un oscilador LC controlado por voltaje es diseñado en un proceso CMOS de silicio sobre aislante en deplexión total de 28 nm, para aplicaciones de radiofrecuencia. Se estudia la posibilidad de utilizar en este caso el mismo modelo utilizado para el diseño del Schmitt trigger. Dicho modelo es válido en todas las regiones de inversión y está desarrollado para transistores de tipo sustrato y de canal largo. La arquitectura de transistores nMOS entrelazados es la utilizada para este oscilador. Se estudia el límite teórico para la mínima tensión de alimentación. Los transistores son dimensionados de manera óptima para obtener el mínimo consumo de potencia posible, utilizando un enfoque de baja tensión y el desempeño del oscilador se obtuvo mediante simulaciones

On the design of ultra low voltage CMOS oscillators

Los nodos sensores inalámbricos tienen fuertes requerimientos de bajo consumo de manera de operar con baterías pequeñas o algún mecanismo de cosecha de energía, o ambos. En muchos casos, la cosecha de energía térmica o electroquímica provee tensiones muy bajas del orden de 100 mV o incluso menos. Los sistemas de internet de las cosas incluyen un módulo de reloj que debe estar siempre encendido a efectos de contar el tiempo. Los osciladores a cristal son probadamente útiles como relojes de bajo consumo, y en este contexto la reducción de la tensión es una estrategia conveniente. Por lo tanto, presentamos osciladores a cristal de 32 kHz operando con sólo 60 mV de tensión de alimentación. Dos implementaciones, basadas en el circuito Schmitt trigger para dos cristales diferentes, se diseñan y caracterizan experimentalmente. Estos osciladores a cristal están basados en la aplicación del Schmitt trigger como amplificador. Se provee una guía para el diseño de este bloque para funcionar como el amplificador de un oscilador a cristal. Adicionalmente se propone un modelo dinámico del Schmitt trigger y los resultados del modelo son comparados con resultados de simulación. Los amplificadores son caracterizados experimentalmente, proveyendo una ganancia de 2.48 V/V con 60 mV de tensión de alimentación. Tal como se pretende en la etapa de diseño, para tensiones mayores a 100 mV aparece el fenómeno de histéresis y el Schmitt trigger comienza a operar como un comparador. Los Schmitt trigger para operar como amplificadores de los osciladores a cristal son diseñados en un proceso CMOS de 130 nm y ocupan un área de 45 um x 74 um y 78 um x 83 um, respectivamente. El consumo de potencia de sendos osciladores es 2.26 nW y 15 nW y la estabilidad en temperatura obtenida es de 62 ppm (25-62°C) y 50 ppm (5-62°C), respectivamente. Se midieron la dependencia del consumo de corriente con respecto a la tensión de alimentación, la frequencia de oscilación, el tiempo de arranque y la amplitud de oscilación. La desviación de Allan es 30 ppb en ambos osciladores. Por otra parte, un oscilador LC controlado por voltaje es diseñado en un proceso CMOS de silicio sobre aislante en deplexión total de 28 nm, para aplicaciones de radiofrecuencia. Se estudia la posibilidad de utilizar en este caso el mismo modelo utilizado para el diseño del Schmitt trigger. Dicho modelo es válido en todas las regiones de inversión y está desarrollado para transistores de tipo sustrato y de canal largo. La arquitectura de transistores nMOS entrelazados es la utilizada para este oscilador. Se estudia el límite teórico para la mínima tensión de alimentación. Los transistores son dimensionados de manera óptima para obtener el mínimo consumo de potencia posible, utilizando un enfoque de baja tensión y el desempeño del oscilador se obtuvo mediante simulaciones.Agencia Nacional de Investigación e InnovaciónComisión Académica de Posgrado. Universidad de la RepúblicaComisión Sectorial de Investigación Científica. Universidad de la Repúblic

Low power low voltage quadrature RC oscillators for modern RF receivers

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do grau de Mestre em Engenharia Electrotécnica e de ComputadoresThis thesis proposes a study of three different RC oscillators, two relaxation and a ring oscillator. All the circuits are implemented using UMC 130 nm CMOS technology with a supply voltage of 1.2 V. We present a wideband MOS current/voltage controlled quadrature oscillator constituted by two multivibrators. Two different forms of coupling named, soft (traditional)and hard (proposed) are differentiated and investigated. It is found that hard coupling reduces the quadrature error and results in a low phase-noise (about 2 dB improvement) with respect to soft coupling. The behaviour of the singular and coupled multivibrators is investigated, when an external synchronizing harmonic is applied. We introduce a new RC relaxation oscillator with pulse self biasing, to reduce power consumption, and with harmonic ltering and resistor feedback, to reduce phase-noise. The designed circuit has a very low phase-noise, -132.6 dBc/Hz @ 10 MHz offset, and the power consumption is only 1 mW, which leads to a gure of merit (FOM) of -159.1 dBc/Hz. The nal circuit is a two integrator fully implemented in CMOS technology, with low power consumption. The respective layout is made and occupies a total area of5.856x10-3 mm2, post-layout simulation is also done

A Nano-Power Voltage-Controlled Oscillator Design for RFID Applications

Passive RFID transponder is a tiny device that has unique ID information for communication with RFID readers and relies on the reader as a source of power supply. The main components of a typical transponder IC include antenna, analog front-end circuit and baseband processor, where the system clock is provided by a local oscillator. One of the biggest challenges for the oscillator is to ensure the lowest possible power consumption for passive RFID applications. A nano-power VCO capable of functioning as a local oscillator for the transponders is obtained by biasing the delay cells to operate in weak inversion region. Further power reduction is achieved by transistor sizing. Designed in a 90-nm CMOS technology, the proposed circuit oscillates with a power supply of 0.3V with frequency tuning characteristics and consumes only 24nW. The center frequency is 5.12MHz and the phase noise is -80.43 dBc/Hz at 10KHz offset

BOOLEAN AND BRAIN-INSPIRED COMPUTING USING SPIN-TRANSFER TORQUE DEVICES

Several completely new approaches (such as spintronic, carbon nanotube, graphene, TFETs, etc.) to information processing and data storage technologies are emerging to address the time frame beyond current Complementary Metal-Oxide-Semiconductor (CMOS) roadmap. The high speed magnetization switching of a nano-magnet due to current induced spin-transfer torque (STT) have been demonstrated in recent experiments. Such STT devices can be explored in compact, low power memory and logic design. In order to truly leverage STT devices based computing, researchers require a re-think of circuit, architecture, and computing model, since the STT devices are unlikely to be drop-in replacements for CMOS. The potential of STT devices based computing will be best realized by considering new computing models that are inherently suited to the characteristics of STT devices, and new applications that are enabled by their unique capabilities, thereby attaining performance that CMOS cannot achieve. The goal of this research is to conduct synergistic exploration in architecture, circuit and device levels for Boolean and brain-inspired computing using nanoscale STT devices. Specifically, we first show that the non-volatile STT devices can be used in designing configurable Boolean logic blocks. We propose a spin-memristor threshold logic (SMTL) gate design, where memristive cross-bar array is used to perform current mode summation of binary inputs and the low power current mode spintronic threshold device carries out the energy efficient threshold operation. Next, for brain-inspired computing, we have exploited different spin-transfer torque device structures that can implement the hard-limiting and soft-limiting artificial neuron transfer functions respectively. We apply such STT based neuron (or ‘spin-neuron’) in various neural network architectures, such as hierarchical temporal memory and feed-forward neural network, for performing “human-like” cognitive computing, which show more than two orders of lower energy consumption compared to state of the art CMOS implementation. Finally, we show the dynamics of injection locked Spin Hall Effect Spin-Torque Oscillator (SHE-STO) cluster can be exploited as a robust multi-dimensional distance metric for associative computing, image/ video analysis, etc. Our simulation results show that the proposed system architecture with injection locked SHE-STOs and the associated CMOS interface circuits can be suitable for robust and energy efficient associative computing and pattern matching

Theoretical Studies of Singlet Fission: Searching for Materials and Exploring Mechanisms

In this Review article, a survey is given for theoretical studies in the subject of singlet fission. Singlet fission converts one singlet exciton to two triplet excitons. With the doubled number of excitons and the longer lifetime of the triplets, singlet fission provides an avenue to improve the photoelectric conversion efficiency in organic photovoltaic devices. It has been a subject of intense research in the past decade. Theoretical studies play an essential role in understanding singlet fission. This article presents a Review of theoretical studies in singlet fission since 2006, the year when the research interest in this subject was reignited. Both electronic structure and dynamics studies are covered. Electronic structure studies provide guidelines for designing singlet fission chromophores and insights into the couplings between single‐ and multi‐excitonic states. The latter provides fundamental knowledge for engineering interchromophore conformations to enhance the fission efficiency. Dynamics studies reveal the importance of vibronic couplings in singlet fission

18th IEEE Workshop on Nonlinear Dynamics of Electronic Systems: Proceedings

Proceedings of the 18th IEEE Workshop on Nonlinear Dynamics of Electronic Systems, which took place in Dresden, Germany, 26 – 28 May 2010.:Welcome Address ........................ Page I Table of Contents ........................ Page III Symposium Committees .............. Page IV Special Thanks ............................. Page V Conference program (incl. page numbers of papers) ................... Page VI Conference papers Invited talks ................................ Page 1 Regular Papers ........................... Page 14 Wednesday, May 26th, 2010 ......... Page 15 Thursday, May 27th, 2010 .......... Page 110 Friday, May 28th, 2010 ............... Page 210 Author index ............................... Page XII