A piezoelectric based energy harvester interface for a CMOS wireless sensor IC

In this thesis a piezoelectric energy harvesting system, responsible for regulating the power output of a piezoelectric transducer subjected to ambient vibration, is designed to power an RF receiver with a 6 mW power consump-tion. The electrical characterisation of the chosen piezoelectric transducer is the starting point of the design, which subsequently presents a full-bridge cross-coupled rectifier that rectifies the AC output of the transducer and a low-dropout regulator responsible for delivering a constant voltage system output of 0.6 V, with low voltage ripple, which represents the receiver’s required sup-ply voltage. The circuit is designed using CMOS 130 nm UMC technology, and the system presents an inductorless architecture, with reduced area and cost. The electrical simulations run for the complete circuit lead to the conclusion that the proposed piezoelectric energy harvesting system is a plausible solution to power the RF receiver, provided that the chosen transducer is subjected to moderate levels of vibration

CMOS Integration of a Self-Powered Rectifier

Literature Review The structural health monitoring device proposed by Jason Lee Wardlaw in [1] has been shown to have individual circuit blocks that operate at the technology used, which is an ON Semiconductor 0.5µm Complementary Metal Oxide Semiconductor (CMOS) process. To advance this research, an IBM 0.13µm CMOS process will be used to replicate the operability of the circuitry and obtain an overall system integration onto a single semiconductor chip. Thesis Statement The use of the IBM 0.13µm CMOS process will be explored in its ability to replicate the system operability of that proposed in [1]. It will also allow for a higher density of transistors to fit in a single area (allocating less space for each system block to fit on a single chip) and a lowered overall power consumption, making it a suitable sensor for monitoring structural devices that surpass a lifetime comparable to that of civil infrastructures. Theoretical Framework Different CMOS technologies exist in order to build semiconductor chips. TSMC (Taiwan Semiconductor Manufacturing Company), GlobalFoundries, ON Semiconductor, AMS (Austria Mikro Systeme) AG, and AIM (American Institute for Manufacturing) Photonics are among a few of the many companies that supply these technologies. Each of these companies have different CMOS processes; however, for building analog components, not all of them are suitable due to the fact that there are certain transistor properties that need to be manipulated which can only be done at a certain transistor size. For compliance reasons, an IBM (International Business Machines) 0.13µm CMOS process will be used in this research as it is already accessible to the Electrical and Computer Engineering Department at Texas A&M University. Project Description The structural health monitoring device is set to operate under the conditions set forth by the structure being analyzed. The device proposed in [1] places an emphasis on bridges, but similar methods can be applied to any civil structure that exhibits vibrations which can be converted into usable energy. The operating frequency is expected to be around ~20Hz and voltage amplitude acquired by the memory-shape alloy is predicted to be around 1V. Both of these operating conditions were taken into account when building the circuitry that will monitor the health of the civil structure which then set the necessary certain circuit component to build the sensor. This system will contain a component for harvesting vibrational energy, power-conditioning circuitry to supply power to all other blocks of the system, a sensor, a low-power analog-to-digital convertor, and a low-power radio-transmitter to send the data to a central processing location. All system blocks operate under the CMOS process used in [1] but in order to make the system a more robust one, a different technology will be explored which will both reduce the amount of power consumption as well as increase the amount of circuit components which can fit onto a single semiconductor chip. The technology used in research is an IBM 0.13µm CMOS process which greatly reduces the amount of area used by a single transistor and requires less energy to operate in its saturated region. Due to the time constraints of this project, it was only possible to focus on one of the blocks in this system. Although it can be argued that the ADC or the transmitter are vital parts of this sensor, none of the circuity would be functional if a power source were not present, therefore, the extension of this work will devote constructing and optimizing the power harvesting block. In the future, the rest of the blocks will be designed and integrated using the IBM 0.13µm CMOS process as well. After focusing all efforts on the self-powered rectifier, it was found that the same functionality could be obtained from the circuit presented in [1] using a smaller technology. However, some changes are presented in this work that were made in order to optimize the circuit. The details of the changes are presented in the later chapters of this work but in the grand scale, the breakdown voltage of the technology (1.2V) for a single active device was achieved in 3 stages of rectification, the output of the rectifier was shown to have an equivalent output impedance of 17kΩ, and it is possible of supplying a maximum load of around 70µA to external circuitry, which is expected to be enough for the blocks it is supporting

Rectenna circuits for RF energy harvesting in miniature DBS devices.

 Development of an optimum rectenna for radio frequency energy harvesting in miniature head-mountable deep brain stimulation (DBS) devices. The designed miniature rectenna can operate a DBS device without battery for murine preclinical research. The battery-less operation of the device eliminates battery related difficulties

Hybrid monolithic integration of high-power DC-DC converters in a high-voltage technology

The supply of electrical energy to home, commercial, and industrial users has become ubiquitous, and it is hard to imagine a world without the facilities provided by electrical energy. Despite the ever increasing efficiency of nearly every electrical application, the worldwide demand for electrical power continues to increase, since the number of users and applications more than compensates for these technological improvements. In order to maintain the affordability and feasibility of the total production, it is essential for the distribution of the produced electrical energy to be as efficient as possible. In other words the loss in the power distribution is to be minimized. By transporting electrical energy at the maximum safe voltage, the current in the conductors, and the associated conduction loss can remain as low as possible. In order to optimize the total efficiency, the high transportation voltage needs to be converted to the appropriate lower voltage as close as possible to the end user. Obviously, this conversion also needs to be as efficient, affordable, and compact as possible. Because of the ever increasing integration of electronic systems, where more and more functionality is combined in monolithically integrated circuits, the cost, the power consumption, and the size of these electronic systems can be greatly reduced. This thorough integration is not limited to the electronic systems that are the end users of the electrical energy, but can also be applied to the power conversion itself. In most modern applications, the voltage conversion is implemented as a switching DC-DC converter, in which electrical energy is temporarily stored in reactive elements, i.e. inductors or capacitors. High switching speeds are used to allow for a compact and efficient implementation. For low power levels, typically below 1 Watt, it is possible to monolithically implement the voltage conversion on an integrated circuit. In some cases, this is even done on the same integrated circuit that is the end user of the electrical energy to minimize the system dimensions. For higher power levels, it is no longer feasible to achieve the desired efficiency with monolithically integrated components, and some external components prove indispensable. Usually, the reactive components are the main limiting factor, and are the first components to be moved away from the integrated circuit for increasing power levels. The semiconductor components, including the power transistors, remain part of the integrated circuit. Using this hybrid approach, it is possible in modern converterapplications to process around 60 Watt, albeit limited to voltages of a few Volt. For hybrid integrated converters with an output voltage of tens of Volt, the power is limited to approximately 10 Watt. For even higher power levels, the integrated power transistors also become a limiting factor, and are replaced with discrete power devices. In these discrete converters, greatly increased power levels become possible, although the system size rapidly increases. In this work, the limits of the hybrid approach are explored when using so-called smart-power technologies. Smart-power technologies are standard lowcost submicron CMOS technologies that are complemented with a number of integrated high-voltage devices. By using an appropriate combination of smart-power technologies and circuit topologies, it is possible to improve on the current state-of-the-art converters, by optimizing the size, the cost, and the efficiency. To determine the limits of smart-power DC-DC converters, we first discuss the major contributing factors for an efficient energy distribution, and take a look at the role of voltage conversion in the energy distribution. Considering the limitations of the technologies and the potential application areas, we define two test-cases in the telecommunications sector for which we want to optimize the hybrid monolithic integration in a smart-power technology. Subsequently, we explore the specifications of an ideal converter, and the relevant properties of the affordable smart-power technologies for the implementation of DC-DC converters. Taking into account the limitations of these technologies, we define a cost function that allows to systematically evaluate the different potential converter topologies, without having to perform a full design cycle for each topology. From this cost function, we notice that the de facto default topology selection in discrete converters, which is typically based on output power, is not optimal for converters with integrated power transistors. Based on the cost function and the boundary conditions of our test-cases, we determine the optimal topology for a smart-power implementation of these applications. Then, we take another step towards the real world and evaluate the influence of parasitic elements in a smart-power implementation of switching converters. It is noticed that the voltage overshoot caused by the transformer secondary side leakage inductance is a major roadblock for an efficient implementation. Since the usual approach to this voltage overshoot in discrete converters is not applicable in smart-power converters due to technological limitations, an alternative approach is shown and implemented. The energy from the voltage overshoot is absorbed and transferred to the output of the converter. This allows for a significant reduction in the voltage overshoot, while maintaining a high efficiency, leading to an efficient, compact, and low-cost implementation. The effectiveness of this approach was tested and demonstrated in both a version using a commercially available integrated circuit, and our own implementation in a smart-power integrated circuit. Finally, we also take a look at the optimization of switching converters over the load range by exploiting the capabilities of highly integrated converters. Although the maximum output power remains one of the defining characteristics of converters, it has been shown that most converters spend a majority of their lifetime delivering significantly lower output power. Therefore, it is also desirable to optimize the efficiency of the converter at reduced output current and output power. By splitting the power transistors in multiple independent segments, which are turned on or off in function of the current, the efficiency at low currents can be significantly improved, without introducing undesirable frequency components in the output voltage, and without harming the efficiency at higher currents. These properties allow a near universal application of the optimization technique in hybrid monolithic DC-DC converter applications, without significant impact on the complexity and the cost of the system. This approach for the optimization of switching converters over the load range was demonstrated using a boost converter with discrete power transistors. The demonstration of our smart-power implementation was limited to simulations due to an issue with a digital control block. On a finishing note, we formulate the general conclusions and provide an outlook on potential future work based on this research

Comparation of common ultra-low power harvesting RF rectifier circuits

This project has analysed and compared different types of common RF Harvesting rectifier circuits for ultra-low power. An antenna has been used as an energy harvesting element and the power available in the environment has been analysed, specifically in the GAEMI laboratories of the UAB. The simulations were carried out using the Keysisght ADS software. It has been demonstrated, by means of simulation, that the simple rectifier shows a higher efficiency than the other rectifiers and that the value of the load resistance is the predominant element in the calculation of this efficiency. It has been experimentally confirmed that the measurements do not deviate from the simulated measurements. The results obtained can be applied to the generation of prototypes of RF Harvesting systems

Circuits and systems for inductive power transfer

Recently, the development of Wireless Power Transfer (WPT) systems has shown to be a key factor for improving the robustness, usability and autonomy of many mobile devices. The WPT link relaxes the trade-off between the battery size and the power availability, enabling highly innovative applications. This thesis aims to develop novel techniques to increase efficiency and operating distance of inductive power transfer systems. We addressed the design of the inductive link and various circuits used in the receiver. Moreover, we performed a careful system-level analysis, taking into account the design of different blocks and their interaction. The analysis is oriented towards the development of low power applications, such as Active Implantable Medical Device (AIMD) or Radio-Frequency Identification (RFID) systems. Three main approaches were considered to increase efficiency and operating distance: 1) The use of additional resonant coils, placed between the transmitter and the receiver. 2) The receiver coil impedance matching. 3) The design of high-efficiency rectifiers and dc-dc converters. The effect of the additional coils in the inductive link is usually studied without considering its influence on other parts of the WPT system. In this work, we theoretically analyzed and compared 2 and 3-coil links, showing the advantages of using the additional coil together with a matching network in the receiver. The effect of the additional coils in a closed-loop regulated system is also addressed, demonstrating that the feedback-loop design should consider the number of coils used in the link. Furthermore, the inclusion of one additional resonant coil in an actual half-duplex RFID system at 134:2 kHz is presented. The maximum efficiency point can be achieved by adjusting the receiver coil load impedance in order to reach its optimum value. In inductive powering, this optimum impedance is often achieved by adapting the input impedance of a dc-dc converter in the receiver. A matching network can also be used for the same purpose, as have been analyzed in previous works. In this thesis, we propose a joint design using both, matching network and dc-dc converters, highlighting the benefits of using the combined approach. A rectifier must be included in any WPT receiver. Usually, a dc-dc converter is included after the rectifier to adjust the output voltage or control the rectifier load impedance. The efficiency of both, rectifier and dc-dc converter, impacts not only the load power but also the receiver dissipation. In applications such as AIMDs, to get the most amount of power with low dissipation is crucial to full safety requirements. We present the design of an active rectifier and a switched capacitor dc-dc converter. In low-power applications, the power consumption of any auxiliary block used in the circuit may decrease the efficiency due to its quiescent consumption. Therefore, we have carefully designed these auxiliary blocks, such as operational transconductance amplifiers and voltage comparators. The main contributions of this thesis are: . Deduction of simplified equations to compare 2 and 3-coil links with an optimized Matching Network (MN). . Development of a 3-coil link half-duplex RFID 134.2 kHz system. . Analysis of the influence of the titanium case in the inductive link of implantable medical devices. . Development of a joint design ow which exploits the advantages of using both MNs and dc-dc converters in the receiver to achieve load impedance matching. . Analysis of closed-loop postregulated systems, highlighting the effects that the additional coils, receiver resonance (series or parallel), and type of driver (voltage or current) used in the transmitter, have in the feedback control loop. . Proposal of systematic analysis and design of charge recycling switches in step-up dc-dc converters. . New architecture for low-power high slew-rate operational transconductance amplifier. Novel architecture for high-efficiency active rectifier. The thesis is essentially based on the publications [1{9]. During the PhD program, other publications were generated [10{15] that are partially or non-included in the thesis. Additionally, some contributions presented in the text, are in process of publication.Hace ya un buen tiempo que las redes inalámbricas constituyen uno de los temas de investigación más estudiados en el área de las telecomunicaciones. Actualmente un gran porcentaje de los esfuerzos de la comunidad científifica y del sector industrial están concentrados en la definición de los requerimientos y estándares de la quinta generación de redes móviles. 5G implicará la integración y adaptación de varias tecnologías, no solo del campo de las telecomunicaciones sino también de la informática y del análisis de datos, con el objetivo de lograr una red lo suficientemente flexible y escalable como para satisfacer los requerimientos para la enorme variedad de casos de uso implicados en el desarrollo de la “sociedad conectada”. Un problema que se presenta en las redes inalámbricas actuales, que por lo tanto genera un desafío más que interesante para lo que se viene, es la escasez de espectro radioeléctrico para poder asignar bandas a nuevas tecnologías y nuevos servicios. El espectro está sobreasignado a los diferentes servicios de telecomunicaciones existentes y las bandas de uso libre o no licenciadas están cada vez más saturadas de equipos que trabajan en ellas (basta pensar lo que sucede en la banda no licenciada de 2.4 GHz). Sin embargo, existen análisis y mediciones que muestran que en diversas zonas y en diversas escalas de tiempo, el espectro radioeléctrico, si bien está formalmente asignado a algún servicio, no se utiliza plenamente existiendo tiempos durante los cuales ciertas bandas están libres y potencialmente podrían ser usadas. Esto ha llevado a que las Redes Radios Cognitivas, concepto que existe desde hace un tiempo, sean consideradas uno de los pilares para el desarrollo de las redes inalámbricas del futuro. En los ultimos años la transferencia inalámbrica de energía (WPT) ha cobrado especial atención, ya que logra aumentar la robustez, usabilidad y autonomía de los dispositivos móviles. Transferir energía inalámbricamente relaja el compromiso entre el tamaño de la batería y la disponibilidad de energía, permitiendo aplicaciones que de otro modo no serían posibles. Esta tesis tiene como objetivo desarrollar técnicas novedosas para aumentar la eficiencia y la distancia de transmisión de sistemas de transferencia inalámbrica por acople inductivo (IPT). Se abordó el diseño del enlace inductivo y varios circuitos utilizados en el receptor de energía. Además, realizamos un cuidadoso análisis a nivel sistema, teniendo en cuenta el diseño conjunto de diferentes bloques. Todo el trabajo está orientado hacia el desarrollo de aplicaciones de bajo consumo, como dispositivos médicos implantables activos (AIMD) o sistemas de identificación por radio frecuencia (RFID). Se consideraron principalmente tres enfoques para lograr mayor eficienciay distancia: 1) El uso de bobinas resonantes adicionales, colocadas entre el transmisor y el receptor. 2) El uso de redes de adaptación de impedancia en el receptor. 3) El diseño de circuitos rectificdores y conversores dc-dc con alta eficiencia.El efecto ocasionado por las bobinas resonantes adicionales en el enlace inductivo es usualmente abordado sin tener en cuenta su influenciaen todas las partes del sistema. En este trabajo, analizamos teóricamente y comparamos sistemas de 2 y 3 bobinas, mostrando las ventajas que tiene la bobina adicional en conjunto con el uso de redes de adaptación. El efecto de dicha bobina, en sistemas de lazo cerrado fue también estudiado, demostrando que el diseño del lazo debe considerar el número de bobinas que utiliza el link. Se trabajó con un sistema real de RFID, analizando el uso de una bobina resonante en una aplicación práctica existente y de amplio uso en el Uruguay

Rectifier design for radio frequency energy harvesting system

This thesis presents the development of rectifying circuits suitable for Radio Frequency (RF) energy harvesting application with dual-band capabilities. The main contribution of this thesis is the development of compact dual-band two-stage rectifier with high efficiency. Firstly, a voltage doubler rectifying circuit is designed to get a compact size. A source-pull simulation of matching circuit is used to find the optimal load impedance and enhance the conversion efficiency over the frequency range. The accuracy of the design has been justified by the simulation and measurement results. Secondly, a dual-band impedance matching network based on transmission line is developed. A short stub and general impedance transformer are designed to match different complex impedance at the two operating frequencies. Measurement results have fully demonstrated. Thirdly, a new rectifier circuit is proposed. It employs a dual-band multi resonant matching network and a high efficiency modified quadruplor rectifier for harvesting the ambient RF power at both 2.45 GHz Global System for Mobile Communications (GSM) and 5.8 GHz Wireless Local Area Network (WLAN). An attempt was made for matching network with a series of combination of a capacitor and inductor with a parallel LC tank. For rectifier circuit part, low power harvested from the RF is boosted up using two-stage of voltage multiplier and the input capacitor is rearranged to be in parallel connection to get smaller size and uniform pressure on diode. The prototypes are developed, and simulation results are obtained. The proposed rectifier is proven to exhibit greatly higher output voltage and efficiency compared to the conventional circuit. The rectifier is designed on the FR-4 board. Its capability of working within two frequency bands at 2.45 GHz and 5.8 GHz is verified by measurement. The proposed rectifier has met the requirement of high conversion efficiency (79.1% and 78.4% at the respective 2.45 GHz and 5.8 GHz), and able to boost up to the maximum voltage level of 14V at 20 dBm input power. Hence, the aims of this research have been achieved and are practically suitable for the use in wireless sensor networks and low power devices

Efficient power conversion interface circuits for energy harvesting applications

Harvesting energy from the environment for powering micro-power devices have been increasing in popularity. These types of devices can be used in embedded applications or in sensor networks where battery replacement is impractical. In this dissertation, different methods of energy harvesting from the environment are explored as alternative sources of energy for devices. Some of the most popular energy extraction used in electronic devices today are radio frequency (RF) and thermal/vibrational energy extraction. This dissertation presents novel power techniques that enable some of the most efficient power conversion circuits published to date. New power conversion circuits to interface to a piezoelectric micro-power generator that produces electrical energy from temperature differences have been fabricated and tested. Circuit designs and measurement results are presented for a half-wave synchronous rectifier with voltage doubler, a full-wave synchronous rectifier and a passive full-wave rectifier circuit. The active rectifier based on synchronous rectification, fabricated in a 0.25-μm CMOS process, is 86% efficient with 22-μW peak output power when connected to the piezoelectric micro-power generator. This gives the highest efficiency to date for active rectification circuits at the micro-power level. The passive rectifier circuit is 66% efficient with 16-μW peak output power and requires no quiescent current to operate. RF-powered devices are typically inductively coupled and extract their energy from the near field while operating within a few inches of the radiating source. Longer operating distances, exceeding 10 meters, are desired for a broader set of applications including distributed sensor networks. This dissertation describes an efficient method for far field power extraction from RF energy to enable long distance passively powered sensor networks. Passive rectifier circuits are designed in the TSMC 0.25μm mixed-signal CMOS process and antennas for the system are printed on a 4-layer FR4 board. A high-Q resonator is used with a matching network to passively amplify the input voltage to the rectifier. At the circuit level, floating gate transistors are used as rectifying diodes to reduce the diode threshold loss in voltage rectification and therefore increase the rectifier efficiency. A 36-stage rectifier fabricated in a 0.25-μm CMOS process attains an efficiency of over 60% in the far field with a received power sensitivity of 5.5μW(-22.6 dBm), corresponding to an operating distance of 44 meters. The effective threshold voltage of the floating-gate diode is reduced to 36 mV. This is the highest performance for far-field RF energy conversion reported to date. In ultra-low energy system, such as sensor networks, it is essential that power management circuitry are designed to dissipate very low quiescent power. RF energy and power management circuits are designed in a 0.18μm CMOS process. Voltage regulators are designed to operate at high input voltage and low power in a standard CMOS process. The voltage regulators can withstand input voltages up to 12 volts and dissipates from 90 nW to 1.4 μW of power. A floating-gate programming circuit is designed with a self-wakeup timer that turns itself on about once a month. The floating-gate programming circuits dissipates about 30 nW in sleep mode and 8 μW in active mode

Energy processing circuits for low-power applications

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.Cataloged from PDF version of thesis.Includes bibliographical references (p. 199-205).Portable electronics have fueled the rich emergence of new applications including multi-media handsets, ubiquitous smart sensors and actuators, and wearable or implantable biomedical devices. New ultra-low power circuit techniques are constantly being proposed to further improve the energy efficiency of electronic circuits. A critical part of these energy conscious systems are the energy processing and power delivery circuits that interface with the energy sources and provide conditioned voltage and current levels to the load circuits. These energy processing circuits must maintain high efficiency and reduce component count for the final solution to be attractive from an energy, size and cost perspective. The first part of this work focuses on the development of on-chip voltage scalable switched capacitor DC-DC converters in digital CMOS processes. The converters are designed to deliver regulated scalable load voltages from 0.3V up to the battery voltage of 1.2V for ultra-dynamic voltage scaled systems. The efficiency limiting mechanisms of these on-chip DC-DC converters are analyzed and digital circuit techniques are proposed to tackle these losses. Measurement results from 3 test-chips implemented in 0.18pm and 65nm CMOS processes will be provided. The converters are able to maintain >75% efficiency over a wide range of load voltage and power levels while delivering load currents up to 8mA. An embedded switched capacitor DC-DC converter that acts as the power delivery unit in a 65nm subthreshold microcontroller system will be described. The remainder of the thesis deals with energy management circuits for battery-less systems. Harvesting ambient vibrational, light or thermal energy holds much promise in realizing the goal of a self-powered system. The second part of the thesis identifies problems with commonly used interface circuits for piezoelectric vibration energy harvesters and proposes a rectifier design that gives more than 4X improvement in output power extracted from the piezoelectric energy harvester. The rectifier designs are demonstrated with the help of a test-chip built in a 0.35pm CMOS process. The inductor used within the rectifier is shared efficiently with a multitude of DC-DC converters in the energy harvesting chip leading to a compact, cost-efficient solution. The DC-DC converters designed as part of a complete power management solution achieve efficiencies of greater than 85% even in the micro-watt power levels output by the harvester. The final part of the thesis deals with thermal energy harvesters to extract electrical power from body heat. Thermal harvesters in body-worn applications output ultra-low voltages of the order of 10's of milli-volts. This presents extreme challenges to CMOS circuits that are powered by the harvester. The final part of the thesis presents a new startup technique that allows CMOS circuits to interface directly with and extract power out of thermoelectric generators without the need for an external battery, clock or reference generators. The mechanically assisted startup circuit is demonstrated with the help of a test-chip built in a 0.35pm CMOS process and can work from as low as 35mV. This enables load circuits like processors and radios to operate directly of the thermoelectric generator without the aid of a battery. A complete power management solution is provided that can extract electrical power efficiently from the harvester independent of the input voltage conditions. With the help of closed-loop control techniques, the energy processing circuit is able to maintain efficiency over a wide range of load voltage and process variations.by Yogesh Kumar Ramadass.Ph.D