Ultra Wideband Impulse Radio Superregenerative Reception

Postprint (published version

Design of a synchronous superregenerative receiver at 2.4 GHz

En aquest treball es descriu el procés de disseny i avaluació d'un receptor superregeneratiu per a la banda ISM de 2.4 GHz. El receptor utilitza un nou mode de funcionament en el qual el senyal d'extinció opera síncronament amb les dades rebudes, aconseguint així una notable millora en les prestacions globals del receptor.Postprint (author’s final draft

Joint symbol and chip synchronization for a burst-mode-communication superregenerative MSK receiver

In this paper we describe a superregenerative (SR) MSK receiver able to operate in a burst-mode framework where synchronization is required for each packet. The receiver is based on an SR oscillator which provides samples of the incoming instantaneous phase trajectories. We develop a simple yet effective technique to achieve joint chip and symbol synchronization within the time limits of a suitable preamble. We develop some general results and focus on the case of the IEEE 802.15.4 MSK physical layer. We provide details on a VHDL implementation on an FPGA where the most complex digital processing block is an accumulator. Simulation and experimental results are provided to validate the described technique.Peer ReviewedPostprint (published version

Aplicaciones avanzadas del principio superregenerativo a comunicaciones por radiofrecuencia

There exists today an increasing demand for wireless devices which require low cost and minimum power consumption radiofrequency front-ends. Precisely, these are two remarkable characteristics of the superregenerative receiver (SR). In this thesis, we present some novel applications of the SR receiver which make use of both simple methods and simple implementations that fit perfectly with its main features. The superregenerative reception principle was presented for the first time in 1922, and it was initially used with analog amplitude modulations, such as voice communications. The same principle was spread to digital amplitude modulations in applications where data transmission was required. Moreover, it has also been used in frequency modulation reception through an FM-to-AM conversion mechanism, but due to the inherent characteristics of the receiver, it is only suitable with wide band modulations.In the latest few years, some SR receiver proposals for phase modulation detection have emerged. It has been demonstrated that, with this type of modulation, the resulting architecture might be even simpler than the traditional ones devoted to detect amplitude modulations. This thesis advances in this line and its main goal is to discover new possibilities of the SR receiver in angular modulation detection, which have been little exploited so far. With this aim, a variety of prototypes were designed and implemented for PSK modulations on the one hand and, on the other hand, for narrow band FSK modulations. More specificifically, the thesis describes a SR QPSK transceiver and a SR M-PSK transceiver. These transceivers make use of a digital phase detection technique that is very simple. In order to confirm the viability of the proposed idea, some implementations in the HF band operating at a symbol rate of 10 kHz were developed. Regarding frequency modulations, we present a SR receiver detection method suitable for the narrowband case. This method is based on the observation of the instantaneous phase once per symbol, so that we are able to detect the received frequency through the value of the detected phase. For this case two implementations are presented: a SR receiver for Sunde's FSK modulation, and a SR receiver for MSK modulation. By using the designed SR receiver for the MSK modulations as a starting point, a SR MSK transceiver compatible with the IEEE 802.15.4 standard is implemented. This standard defines the physical layer and the medium access control (MAC) layer used for low speed wireless personal area network, a field in which the SR receiver fits perfectly. Finally, we describe a synchronization method for SR MSK receivers at the symbol, chip and frame levels. This method is presented in a general way and it is able to sinchronize through any preamble satisfying some specific requirements. In particular, we describe an implementation that aims to synchronize IEEE 802.15.4 standard frames. Simplicity has been prioritized in all the presented designs and implementations in order to potentiate the characteristic low cost and low power consumption features of the SR receiver. Likewise, we prove that this kind of receiver is especially efficient in the detection of phase and narrowband frequency modulations.Actualmente existe una demanda creciente de dispositivos inalámbricos que requieren el uso de front-ends de radiofrecuencia de bajo coste y consumo de potencia reducido, requisitos en los que el receptor superregenerativo (SR) destaca de forma especial. En esta tesis, se presentan distintas aplicaciones novedosas del receptor SR con métodos e implementaciones simples en consonancia con sus principales prestaciones. El principio de recepción superregenerativo fue presentado en el año 1922, siendo utilizado en sus inicios para modulaciones analógicas de amplitud como, por ejemplo, comunicaciones de voz. El mismo principio fue extendido posteriormente a modulaciones de amplitud digitales en aplicaciones que requerían la transmisión de datos. Por otro lado, también se ha utilizado en la recepción de modulaciones de frecuencia, mediante un mecanismo de conversión de modulación de frecuencia a modulación de amplitud. Sin embargo, debido a las características intrínsecas del receptor, este solo resulta adecuado para modulaciones de banda ancha. En los últimos años, han surgido algunas propuestas de receptor SR para modulaciones de fase. Se ha demostrado que, con este tipo de modulaciones, la arquitectura resultante puede ser incluso más simple que las tradicionales para la detección de modulaciones de amplitud. Esta tesis avanza precisamente en esta línea y tiene como objetivo descubrir nuevas posibilidades de utilización del receptor SR en la detección de modulaciones angulares, poco explotadas hasta el momento en combinación con este tipo de receptor. Con este objetivo, se diseñan e implementan diversos prototipos para modulaciones de fase PSK, por un lado, y para modulaciones de frecuencia FSK de banda estrecha, por otro. Más concretamente, se describe un transceptor SR QPSK y un transceptor SR M-PSK. Estos transceptores se basan en una técnica de detección de fase digital de gran simplicidad. Se han realizado implementaciones en la banda de HF operando a una frecuencia de símbolo de 10 kHz, con el fin de demostrar la viabilidad del concepto propuesto. Con respecto a las modulaciones de frecuencia, se presenta un método de detección con receptor SR para el caso de banda estrecha. Este método se basa en observar la fase instantánea una vez por símbolo, consiguiendo detectar la frecuencia recibida a través del valor de la fase detectada. En este caso, se presentan dos implementaciones: un receptor SR para la modulación FSK de Sunde y un receptor SR para la modulación MSK. Utilizando el receptor SR para la modulación MSK diseñado como punto de partida, se implementa un transceptor SR MSK compatible con el estándar 802.15.4. Este estándar define la capa física y la capa de control de acceso al medio (MAC) para redes inalámbricas de área personal de baja velocidad, ámbito en el cual el receptor SR encaja a la perfección. Finalmente, se describe un método de sincronización para receptores SR MSK a nivel de símbolo, de chip y de trama. Este método se presenta de forma genérica, pudiéndose sincronizar con cualquier preámbulo que cumpla unas características determinadas. En particular, se describe una implementación que tiene como objetivo sincronizar tramas del estándar IEEE 802.15.4

A Fully Integrated CMOS Receiver.

The rapidly growing wireless communication market is creating an increasing demand for low-cost highly-integrated radio frequency (RF) communication systems. This dissertation focuses on techniques to enable fully-integrated, wireless receivers incorporating all passive components, including the antenna, and also incorporating baseband synchronization on-chip. Not only is the receiver small in size and requires very low power, but it also delivers synchronized demodulated data. This research targets applications such as implantable neuroprosthetic devices and environmental wireless sensors, which need short range, low data-rate wireless communications but a long lifetime. To achieve these goals, the super-regenerative architecture is used, since power consumption with this architecture is low due to the simplified receiver architecture. This dissertation presents a 5GHz single chip receiver incorporating a compact on-chip 5 GHz slot antenna (50 times smaller than traditional dipole antennas) and a digital received data synchronization. A compact capacitively-loaded 5 GHz standing-wave resonator is used to improve the energy efficiency. An all-digital PLL timing scheme synchronizes the received data clock. A new type of low-power envelope detector is incorporated to increase the data rate and efficiency. The receiver achieves a data rate up to 1.2 Mb/s, dissipates 6.6 mW from a 1.5 V supply. The novel on-chip capacitively-loaded, transmission-line-standing-wave resonator is employed instead of a conventional low-Q on-chip inductor. The simulated quality factor of the resonator is very high (35), and is verified by phase-noise measurements of a prototype 5GHz Voltage Control Oscillator (VCO) incorporating this resonator. The prototype VCO, implemented in 0.13 µm CMOS, dissipates 3 mW from a 1.2 V supply, and achieves a measured phase noise of -117 dBc/Hz at a 1 MHz offset. In the on-chip antenna an efficient shielding technique is used to shield the antenna from the low-resistivity substrate underneath. Two standalone on-chip slot antenna prototypes were designed and fabricated in 0.13 µm CMOS. The 9 GHz prototype occupies a die area of only 0.3 mm2, has an active gain of -4.4 dBi and an efficiency of 9%. The second prototype occupies a die area of 0.47 mm2, and achieves a passive gain of approximately -17.0 dBi at 5 GHz.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/60739/1/shid_1.pd

의료용 인체 삽입물을 위한 무선 저전력 송수신기에 관한 연구

학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2016. 2. 남상욱.This thesis presents the wireless transceiver for medical implant application. The high propagation loss in human body which has high relative permittivity and conductive makes the implantable device be required for high sensitivity. Moreover, the device should have low power consumption to use for wireless implant medical application due to a restricted battery life. Also, this problem should be solved for on-body device considering integration with mobile device in the future. Simultaneously, the specific medical application such as epiretinal prosthesis, multi-channel electroencephalogram sensor demand high-data rate. Therefore, it is a main challenge that enhancing the devices power consumption and data-rate for implantable medical application. In order to enhance the performance of the device, several techniques are proposed in implantable human body transceivers. Firstly, the propagation loss in human-body is calculated for determine the frequency for medical implant application. The frequency bands allocated by FCC or MICS are too narrow and high lossy bands in human-body. For this reason, the optimum frequency for Implantable medical device is found by using Frisss formula and the link budget is calculated for capsule endoscopy system. The optimum frequency is verified through image recovery experiment in liquid human phantom and pig by using designed capsule endoscopy system. Secondly, the Super-Regenerative Receiver (SRR) with Digital Self-Quenching Loop (DSQL) is proposed for low power consumption. The proposed DSQL replaces the envelope detector used in a conventional SRR and minimizes power consumption by generating a self-quench signal digitally for a super-regenerative oscillator. The measurement results are given to show the performance of the proposed receiver. Thirdly, the RF Current Reused and Current Combining (CRCC) Power Amplifier (PA) is proposed for low power and high-speed transmitter. Normally, the PA having low output power has a feasibility issue that an optimum impedance of PA is too high to match with antenna impedance. For this reason, obtaining the maximum efficiency of PA is difficult for conventional structure. Moreover, conventional PAs output bandwidth is to be narrow due to high impedance transform ratio between PAs output and antennas input impedances. The CRCC structure solves this issue by decreasing the impedance transform ratio. The transmitter with CRCC PA is designed and verified through the measurement.Chapter 1. Introduction 1 1.1. WBAN (Wireless Body Area Network) 1 1.2. Challenges in Designing Transceiver for Medical Implant Application 7 Chapter 2. Propagation Loss in Human Body 10 2.1. Introduction 10 2.2. Far field approximation in human-body 13 2.3. Calculation of propagation loss in human-body 15 2.3.1. Frisss formula 15 2.3.2. Efficiency of transmitting antenna in human-body 17 2.4. Calculation of propagation loss in human-body and conclusion 19 Chapter 3. A Design of Transceiver for Capsule Endoscopy Application 21 3.1. Introduction 21 3.2. System Link Budget Calculation 24 3.3. Implementation 26 3.3.1. Transmitter with class B amplifier 26 3.3.2. Super-heterodyne receiver with AGC 28 3.3.3. Measurement results 30 3.4. Image recovery experiment 35 3.4.1. Integration of capsule endoscopy 35 3.4.2. Image recovery in the liquid human phantom 38 3.4.3. Image recovery in a pigs stomach and large intestine 40 3.5. Conclusion 41 Chapter 4. Super-Regenerative Receiver with Digitally Self-Quenching Loop 42 4.1. Introduction 42 4.1.1. Selection of receivers architecture for implantable medical device 44 4.1.2. Previous study of super-regenerative receiver 50 4.2. Main idea of proposed super-regenerative receiver 51 4.3. Description of proposed receiver 53 4.3.1. Digital self-quenching loop 55 4.3.2. Low noise amplifier and super-regenerative oscillator 57 4.3.3. Active RC filter for low power consumption 59 4.4. Experimental results 63 4.5. Summary and conclusion 69 Chapter 5. A Transmitter with Current-Reused and Current-Combining PA 71 5.1. Introduction 71 5.1.1. Previous study of OOK transmitter 72 5.2. Main idea of proposed transmitter 73 5.3. Description of proposed transmitter 79 5.3.1. Current-combining and current-reused PA 79 5.3.2. Ring oscillator with driving buffer 83 5.4. Experimental Results 85 5.5. Summary and conclusion 93 Chapter 6. Conclusion 95 Chapter 7. Appendix 97 7.1. Output spectrum of OOK signal 97 7.2. Theoretical BER of OOK comunication 99 Bibliography 101 초 록 109Docto

Integrated Circuit and System Design for Cognitive Radio and Ultra-Low Power Applications

The ubiquitous presence of wireless and battery-powered devices is an inseparable and invincible feature of our modern life. Meanwhile, the spectrum aggregation, and limited battery capacity of handheld devices challenge the exploding demand and growth of such radio systems. In this work, we try to present two separate solutions for each case; an ultra-wideband (UWB) receiver for Cognitive Radio (CR) applications to deal with spectrum aggregation, and an ultra-low power (ULP) receiver to enhance battery life of handheld wireless devices. Limited linearity and LO harmonics mixing are two major issues that ultra-wideband receivers, and CR in particular, are dealing with. Direct conversion schemes, based on current-driven passive mixers, have shown to improve the linearity, but unable to resolve LO harmonic mixing problem. They are usually limited to 3rd, and 5th harmonics rejection or require very complex and power hungry circuitry for higher number of harmonics. This work presents a heterodyne up-down conversion scheme in 180 nm CMOS technology for CR applications (54-862 MHz band) that mitigates the harmonic mixing issue for all the harmonics, while by employing an active feedback loop, a comparable to the state-of-the art IIP3 of better than +10 dBm is achieved. Measurements show an average NF of 7.5 dB when the active feedback loop is off (i.e. in the absence of destructive interference), and 15.5 dB when the feedback loop is active and a 0 dBm interferer is applied, respectively. Also, the second part of this work presents an ultra-low power super-regenerative receiver (SRR) suitable for OOK modulation and provides analytical insight into its design procedure. The receiver is fabricated in 40 nm CMOS technology and operates in the ISM band of 902-928 MHz. Binary search algorithm through Successive Approximation Register (SAR) architecture is being exploited to calibrate the internally generated quench signal and the working frequency of the receiver. Employing an on-chip inductor and a single-ended to differential architecture for the input amplifier has made the receiver fully integrable, eliminating the need for external components. A power consumption of 320 µW from a 0.65 V supply results in an excellent energy efficiency of 80 pJ/b at 4 Mb/s data rate. The receiver also employs an ADC that enables soft-decisioning and a convenient sensitivity-data rate trade-off, achieving sensitivity of -86.5, and -101.5 dBm at 1000 and 31.25 kbps data rate, respectivel

Integrated Circuit and System Design for Cognitive Radio and Ultra-Low Power Applications

The ubiquitous presence of wireless and battery-powered devices is an inseparable and invincible feature of our modern life. Meanwhile, the spectrum aggregation, and limited battery capacity of handheld devices challenge the exploding demand and growth of such radio systems. In this work, we try to present two separate solutions for each case; an ultra-wideband (UWB) receiver for Cognitive Radio (CR) applications to deal with spectrum aggregation, and an ultra-low power (ULP) receiver to enhance battery life of handheld wireless devices. Limited linearity and LO harmonics mixing are two major issues that ultra-wideband receivers, and CR in particular, are dealing with. Direct conversion schemes, based on current-driven passive mixers, have shown to improve the linearity, but unable to resolve LO harmonic mixing problem. They are usually limited to 3rd, and 5th harmonics rejection or require very complex and power hungry circuitry for higher number of harmonics. This work presents a heterodyne up-down conversion scheme in 180 nm CMOS technology for CR applications (54-862 MHz band) that mitigates the harmonic mixing issue for all the harmonics, while by employing an active feedback loop, a comparable to the state-of-the art IIP3 of better than +10 dBm is achieved. Measurements show an average NF of 7.5 dB when the active feedback loop is off (i.e. in the absence of destructive interference), and 15.5 dB when the feedback loop is active and a 0 dBm interferer is applied, respectively. Also, the second part of this work presents an ultra-low power super-regenerative receiver (SRR) suitable for OOK modulation and provides analytical insight into its design procedure. The receiver is fabricated in 40 nm CMOS technology and operates in the ISM band of 902-928 MHz. Binary search algorithm through Successive Approximation Register (SAR) architecture is being exploited to calibrate the internally generated quench signal and the working frequency of the receiver. Employing an on-chip inductor and a single-ended to differential architecture for the input amplifier has made the receiver fully integrable, eliminating the need for external components. A power consumption of 320 µW from a 0.65 V supply results in an excellent energy efficiency of 80 pJ/b at 4 Mb/s data rate. The receiver also employs an ADC that enables soft-decisioning and a convenient sensitivity-data rate trade-off, achieving sensitivity of -86.5, and -101.5 dBm at 1000 and 31.25 kbps data rate, respectivel

An all-digital transmitter for pulsed ultra-wideband communication

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.Includes bibliographical references (p. 91-96).Applications like sensor networks, medical monitoring, and asset tracking have led to a demand for energy-efficient and low-cost wireless transceivers. These types of applications typically require low effective data rates, thus providing an opportunity to employ simple modulation schemes and aggressive duty-cycling. Due to their inherently duty-cycled nature, pulse-based Ultra-Wideband (UWB) systems are amenable to low-power operation by shutting off circuitry during idle mode between pulses. Furthermore, the use of non-coherent UWB signaling greatly simplifies both transmitter and receiver implementations, offering additional energy savings. This thesis presents an all-digital transmitter designed for a non-coherent pulsed UWB system. By exploiting relaxed center frequency tolerances in non-coherent wideband communication, the transmitter synthesizes UWB pulses from an energy efficient, single-ended digital ring oscillator. Dual capacitively-coupled digital power amplifiers (PAs) are used in tandem to generate bipolar phase modulated pulses for spectral scrambling purposes. By maintaining opposite common modes at the output of these PAs during idle mode (i.e. when no pulses are being transmitted), low frequency turn-on and turn-off transients typically associated with single-ended digital circuits driving single-ended antennas are attenuated by up to 12dB. Furthermore, four level digital pulse shaping is employed to attenuate RF side lobes by up to 20dB. The resulting dual power amplifiers achieve FCC compliant operation in the 3.5, 4.0, and 4.5GHz IEEE 802.15.4a bands without the use of any off-chip filters or large passive components. The transmitter is fabricated in a 90nm CMOS process and requires a core area of 0.07mm2. The entirely digital architecture consumes zero static bias current, resulting in an energy efficiency of 17.5pJ/pulse at data rates up to 15.6Mbps.by Patrick Philip Mercier.S.M