'Institute of Electrical and Electronics Engineers (IEEE)'
Doi
Abstract
In this paper we describe a superregenerative (SR)
MSK receiver able to operate in a burst-mode framework where
synchronization is required for each packet. The receiver is based
on an SR oscillator which provides samples of the incoming
instantaneous phase trajectories. We develop a simple yet effective
technique to achieve joint chip and symbol synchronization
within the time limits of a suitable preamble. We develop some
general results and focus on the case of the IEEE 802.15.4 MSK
physical layer. We provide details on a VHDL implementation on
an FPGA where the most complex digital processing block is an
accumulator. Simulation and experimental results are provided
to validate the described technique.Peer ReviewedPostprint (published version
