MODELING AND CONTROL OF DIRECT-CONVERSION HYBRID SWITCHED-CAPACITOR DC-DC CONVERTERS

Efficient power delivery is increasingly important in modern computing, communications, consumer and other electronic systems, due to the high power demand and thermal concerns accompanied by performance advancements and tight packaging. In pursuit of high efficiency, small physical volume, and flexible regulation, hybrid switched-capacitor topologies have emerged as promising candidates for such applications. By incorporating both capacitors and inductors as energy storage elements, hybrid topologies achieve high power density while still maintaining soft charging and efficient regulation characteristics. However, challenges exist in the hybrid approach. In terms of reliability, each flying capacitor should be maintained at a nominal `balanced\u27 voltage for robust operation (especially during transients and startup), complicating the control system design. In terms of implementation, switching devices in hybrid converters often need complex gate driving circuits which add cost, area, and power consumption. This dissertation explores techniques that help to mitigate the aforementioned challenges. A discrete-time state space model is derived by treating the hybrid converter as two subsystems, the switched-capacitor stage and the output filter stage. This model is then used to design an estimator that extracts all flying capacitor voltages from the measurement of a single node. The controllability and observability of the switched-capacitor stage reveal the fundamental cause of imbalance at certain conversion ratios. A new switching sequence, the modified phase-shifted pulse width modulation, is developed to enable natural balance in originally imbalanced scenarios. Based on the model, a novel control algorithm, constant switch stress control, is proposed to achieve both output voltage regulation and active balance with fast dynamics. Finally, the design technique and test result of an integrated hybrid switched-capacitor converter are reported. A proposed gate driving strategy eliminates the need for external driving supplies and reduces the bootstrap capacitor area. On-chip mixed signal control ensures fast balancing dynamics and makes hard startup tolerable. This prototype achieves 96.9\% peak efficiency at 5V:1.2V conversion and a startup time of 12$\mu s$, which is over 100 times faster than the closest prior art. With the modeling, control, and design techniques introduced in this dissertation, the application of hybrid switched-capacitor converters may be extended to scenarios that were previously challenging for them, allowing enhanced performance compared to using traditional topologies. For problems that may require future attention, this dissertation also points to possible directions for further improvements

Improving energy capture and power quality of power electronic connected generation

Power electronic converter is a significant intermediate media for electric renewable energy systems when integrated into the utility grid. Renewable energy systems such as wind, solar and wave energy systems usually operate with irregular natural energy sources. Advanced energy conversion interfaces are therefore highly desirable for stable power supply, good system reliability and high energy extraction efficiency. This thesis investigates the power generation and conversion systems, with the concentrations on the long-term operation cost, full-power-range efficiency and power quality of power electronic converters, for wind, solar and wave energy applications. The story starts with a hybrid wind-solar energy system design targeting at improving energy yield and system reliability. Wind energy and solar energy, as two complementary energy resources, are combined in a single energy system that features improved energy supply stability and reduced energy storage requirement. Special adaptive energy extraction maximisation algorithms are developed for energy generators in order to increase the energy extraction efficiency. The overall energy cogeneration system can offer high productivity and robustness under varying weather conditions. In the second part of this thesis, a bidirectional DC-AC converter based on the well-established Silicon (Si) based two-level circuit and the emerging Silicon Carbide (SiC) based three-level circuit is investigated, with the motivation to enhance the full-power-range efficiency in renewable energy generation and conversion systems. The SiC based circuit is advantageous especially under low-power conditions due to its low switching losses. The costs of power electronics, especially the power semiconductor devices, are taken into account. The Si based circuit provides a more cost-effective option and lower conduction losses under high-power conditions to further improve the overall energy conversion efficiency. All these benefits are integrated in a single converter called hybrid level-matching (HLM) converter, which is comprised of parallel-connected SiC and Si based circuits. A model predictive control (MPC) algorithm is developed to assist the switching state selection for minimised power losses across the full power range. The proposed HLM converter shows similar power control quality and better full-power-range efficiency compared to its conventional counterparts. The operation of the HLM converter under the proposed MPC controller is experimentally verified by a lab-scale demonstrator. The final part of this thesis focuses on the control of an existing flying capacitor based multilevel converter known as stacked multicell converter (SMC). Considered as a superior DC-AC converter candidate in renewable energy standalone load applications, SMC can be controlled under different capacitor voltage ratios to increase the output voltage resolution. This is studied to explore the potential to improve power control quality within the same SMC circuit by applying different capacitor voltage set-points. The capacitor voltage balancing and the basic three-phase current control are achieved by means of a space vector based MPC algorithm. A method to reduce the computational burden by shrinking the space vector candidate size is proposed. The trade-off between capacitor voltage balancing and current reference tracking poses a major challenge to the SMC in its flexibility in capacitor voltage ratio choice. This is investigated in detail to verify the feasibility to reduce load harmonic distortion by modifying the traditional capacitor voltage ratio in a SMC with three stacked cells

Medium voltage-high power converter topologies comparison procedure for a 6.6kV Drive Application using 4.5kV IGBT Modules

This paper presents a general comparison procedure for medium voltage - high power multilevel converter topologies and semiconductors, which is mainly based on analyzing the performance limits of the converters output characteristics such as the output voltage, current, active power, efficiency, etc. Afterwards, the general procedure is applied to compare some of the most relevant converter topologies oriented to a 6.6 kV drive application supplying quadratic torque loads and using 4.5 kV IGBT modules. The paper concludes evaluating the comparison factors of the different converter topologies and selected semiconductors obtained by the proposed procedure. The proposed procedure can potentially be extrapolated to any desired application framework

Carrier-based sinusoidal pulse-width modulation techniques for flying capacitor modular multi-level cascaded converter

Carrier-based sinusoidal pulse-width modulation (PWM) techniques, such as phase disposoed PWM(PD-PWM) and phase shifted PWM (PS-PWM), are widely applied to control the modular multilevel cascaded converters (MMCC) having full H-bridge as sub-modules. This paper evaluates these PWM techniques when controlling a variant of the H-bridge MMCC, i.e. the MMCC five-level flying capacitor converter as sub-modules. This MMCC poses an extra challenge to PWM schemes; namely maintaining two inner floating capacitor voltage balancing. Two novel PWM techniques known as the swapped carrier PWM techniques are introduced for the control of this converter. The paper compares them with the two conventional ones using a performance metrics composed of voltage waveform performance, capability in natural flying capacitor voltage balancing, converter power loss, and switch utilisation. The results show that the proposed new PWM schemes outperform both conventional methods in both switching and conduction power losses and achieve similar performance like the PS-PWM under the three other metrics

Predictive control of a series-input, parallel-output, back-to-back, flying-capacitor multilevel converter

Thesis (MScEng (Electrical and Electronic Engineering))--Stellenbosch University, 2011.ENGLISH ABSTRACT: This thesis investigates the viability of constructing a solid-state transformer (SST) with a series-input, parallel-output connection of full-bridge, three-level ying-capacitor converters. It focusses on the active recti er front-end of the SST which is used to control the input current to be sinusoidal and in-phase with the sinusoidal input voltage. A stack of two converters are built and tested. The input current, as well as the ying capacitor voltages of the two active recti ers in the stack, are actively controlled by a nite-state model-based predictive (FS-MPC) controller. The use of multiple ying-capacitor converters poses a problem when using FS-MPC because of the large number of possible switching states to include in the prediction equations. Three FS-MPC control algorithms are proposed to attempt to overcome the problem associated with the large number of switching states. They are implemented on an FPGA digital controller. The algorithms are compared on the bases of voltage and current errors, as well as their responses to disturbances that are introduced into the system. The simulation and experimental results that are presented shows that by interleaving the control actions for the two converters, one can obtain fast and robust responses of the controlled variables. The viability of extending the interleaving control algorithm beyond two converters is also motivated.AFRIKAANSE OPSOMMING: Hierdie tesis ondersoek die moontlikheid van volbrug, drievlak vlieënde-kapasitoromsetters wat gebruik word om 'n serie-intree, parallel-uittree drywingselektroniese transformator (DET) te bou. Dit fokus op die aktiewe gelykrigter van die DET wat gebruik word om die intreestroom te beheer om sinusvormig en in fase met die sinusvormige intreespanning te wees. 'n Stapel van twee omsetters word gebou en getoets. Die intreestroom, sowel as die vlieënde kapasitorspannings van die twee aktiewe gelykrigters in die stapel, word aktief beheer met behulp van 'n eindige-toestand, model-gebaseerde voorspellende beheerder (ET-MVB). Die gebruik van veelvuldige vlieënde-kapasitoromsetters bemoeilik die implementering van 'n ET-MVB-beheerder as gevolg van die groot aantal skakeltoestande wat in die voorspellende vergelykings in ag geneem moet word. Drie ET-MVB-algoritmes word voorgestel om te poog om die probleme, wat met die groot aantal skakeltoestande geassosieer word, te oorkom. Die algoritmes word in 'n FPGA digitale verwerker geïmplementeer. Die algoritmes word vergelyk op grond van hul stroom- en spanningsfoute, asook hul reaksie op steurings wat op die stelsel ingevoer word. Die simulasie en praktiese resultate toon dat, deur die beheeraksies vir die twee omsetters te laat oorvleuel, die gedrag van die beheerde veranderlikes vinniger en meer robuust is. Die moontlikheid om die oorvleuelende beheeraksies uit te brei tot meer as twee omsetters word ook gemotiveer

Improving data center power delivery efficiency and power density with differential power processing and multilevel power converters

Existing data center power delivery architectures consist of many cascaded power conversion stages. The system-level power delivery efficiency decreases each time the requisite power is processed through the individual stages, and the total power converter footprint increases by each cascaded conversion stage. Innovative approaches are investigated in this dissertation for dc-dc step-down conversion and single-phase ac-dc conversion to improve power delivery efficiency and power density in data centers. This dissertation proposes a series-stacked architecture that provides inherently higher efficiency between a dc bus and dc loads through architectural changes, reporting above 99% power delivery efficiencies. The proposed series-stacked architecture increases power delivery efficiency by connecting the dc loads in series to allow the bulk of the requisite power to be delivered without being processed and by reducing overall power conversion using differential power processing. The series-stacked architecture exhibits voltage regulation and hot-swapping while delivering power to rapidly changing computational loads. This dissertation experimentally demonstrates series-stacked power delivery using real-life computational loads in a custom designed four-server rack. In order to provide a complete grid-to-12 V power delivery for data center applications, this dissertation also proposes a buck-type power factor correction converter that yields high power density between a single-phase grid and the dc bus, achieving 79 W/in3 power density. The proposed buck-type power factor correction converter improves power density by eliminating the high-voltage step-down dc-dc conversion stage, which is typically cascaded to boost-type power factor correction converters in conventional data center power delivery architectures, and by leveraging recent developments in flying capacitor multilevel converters using wide-bandgap transistors. The buck-type flying capacitor multilevel power factor correction converter presents a unique operation condition where the flying capacitor voltages are required to follow the input voltage at 50/60 Hz. This dissertation experimentally explores the applicability of such an operation by using a digitally controlled six-level flying capacitor multilevel converter prototype

CAPACITOR VOLTAGE BALANCING, FAULT DETECTION, AND FAULT TOLERANT CONTROL TECHNIQUES OF MODULAR MULTILEVEL CONVERTERS

Modular Multilevel Converters (MMCs) are distinguished by their modular nature that makes them suitable for wide range of high power and high voltage applications. However, they are vulnerable to internal faults because of the large number of series connected Sub-Modules. Additionally, it is highly recommended not to block the converter even if it is subjected to internal faults to secure the supply, to increase the reliability of the system and prevent unscheduled maintenance. This thesis introduces a fault tolerant control system for controlling the MMC in normal as well as abnormal operating conditions. This is done through developing a new adaptive voltage balancing strategy based on capacitor voltage estimation utilizing ADAptive LInear NEuron (ADALINE) and Recursive Least Squares (RLS) algorithms. The capacitor voltage balancing techniques that have been proposed in literature are based on measuring the capacitor voltage of each sub-module. On contrary, the proposed strategy eliminates the need of these measurements and associated communication links with the central controller. Furthermore, the thesis presents a novel fault diagnosis algorithm using the estimated capacitor voltages which are utilized to detect and localize different types of sub-module faults. The proposed fault diagnosis algorithm surpasses the methods presented in literature by its fast fault detection capability without the need of any extra sensing elements or special power circuit. Finally, a new Fault Tolerant Control Unit (FTCU) is proposed to tolerate the faults located inside the MMC submodules. The proposed FTCU is based on a sorting algorithm which modifies the parameters of the voltage balancing technique in an adaptive manner to overcome the reduction of the active submodules and secure the MMC operation without the need of full shut-down. Most of fault tolerant strategies that have been proposed by other researchers are based on using redundant components, while the proposed FTCU does not need any extra components. The dynamic performance of the proposed strategy is investigated, using PSCAD/EMTDC simulations and hardware in the loop (HIL) real-time simulations, under different normal and faulty operating conditions. The accuracy and the time response of the proposed fault detection and tolerant control units result in stabilizing the operation of the MMC under different types of faults. Consequently, the proposed integrated control strategy improves the reliability of the MMC

A Multi-level Multi-Modular Flying Capacitor Voltage Source Converter for High Power Applications

Two vital and dynamically changing issues are arising in the electric grid - an increase in electrical power demand, and subsequent reduction in power quality. Power electronics based solutions such as the Static Synchronous Compensator are increasingly deployed to mitigate power quality issues while High Voltage DC Transmission converters are currently installed to support the existing grid transmission capacity. Both applications require high power and high voltage power converters using switching devices with limited voltage ratings. The advent of Modular Multilevel Converters (MMC) is one of the recent responses to this need. These use half or full H-bridge circuits stacked up to form a chain, and hence can withstand high voltages using lower-rated switching devices. This thesis introduces a new member into the MMC family, i.e the Modular Multi-level Flying Capacitor Converter (MMFCC). This uses a three-level flying capacitor full-bridge circuit as a sub-module and offers features of modularity, scalability and fault tolerance. The choice of FC topology in place of the simple H-bridge stems from the FC’s ability to offer two extra voltage levels in the sub-module output and hence more degrees of freedom per module in controlling the voltage waveform. A three-level full-bridge FC sub-module uses three capacitors - an outer one for supporting the sub-module voltage, and two inner floating ones with half of the outer one’s capacitance and voltage rating. This use of slightly more complex FC sub-modules gives the benefits of a modular structure but without using twice as many sub-modules with their associated capacitors for the same total voltage. The thesis presents the principles of this topology, switching states redundancies and a method for capacitor voltage balancing. Also discussed are: the configuration of MMCC including the MMFCC in Single-Star Bridge-Cell (SSBC) or Single-Delta Bridge-Cell (SDBC) for FACTS and Battery Energy Storage System (BESS) applications; and Double-Star Chopper-Cell (DSCC) or Double-Star Bridge-Cell (DSBC) for HVDC systems. A novel overlapping hexagon pulse width modulation scheme is introduced and discussed for switching control of the MMFCC. This uses multiple hexagons all centred on one point, the same in number as the cascaded FC sub-modules, which are phase displaced relative to each other. The approach simplifies the modulation algorithm and brings flexibility in shaping the output voltage waveforms for different applications. An MMFCC experimental rig was designed and built in-house to validate some of the simulation results obtained for the modulation of this new topology. Details of the rig as well as results captured are discussed

Modular Multilevel Cascaded Flying Capacitor STATCOM for Balanced and Unbalanced Load Compensation

Voltage and current unbalance are major problems in distribution networks, particularly with the integration of distributed generation systems. One way of mitigating these issues is by injecting negative sequence current into the distribution network using a Static Synchronous Compensator (STATCOM) which normally also regulates the voltage and power factor. The benefits of modularity and scalability offered by Modular Multilevel Cascaded Converters (MMCC) make them suitable for STATCOM application. A number of different types of MMCC may be used, classified according to the sub-module circuit topology used. Their performance features and operational ranges for unbalanced load compensation are evaluated and quantified in this research. This thesis investigates the use of both single star and single delta configured five-level Flying Capacitor (FC) converter MMCC based STATCOMs for unbalanced load compensation. A detailed study is carried out to compare this type of sub-module with several other types namely: half bridge, 3-L H-bridge and 3-L FC half bridge, and reveals the one best suited to STATCOM operation. With the choice of 5-L FC H-bridge as the sub-module for STATCOM operation, a detailed investigation is also performed to decide which pulse width modulation technique is the best. This was based on the assessment of total harmonic distortion, power loss, sub-module switch utilization and natural balancing of inner flying capacitors. Two new modulation techniques of swapped-carrier PWM (SC-PWM) along with phase disposed and phase shifted PWM (PS-PWM) are analyzed under these four performance metrics. A novel contribution of this research is the development of a new space vector modulation technique using an overlapping hexagon technique. This space vector strategy offers benefits of eliminating control complexity and improving waveform quality, unlike the case of multilevel space vector technique. The simulation and experimental results show that this method provides superior performance and is applicable for other MMCC sub-modules. Another contribution is the analysis and quantification of operating ranges of both single star and delta MMCCs in rating the cluster dc-link voltage (star) and current (delta) for unbalanced load compensation. A novel method of extending the operating capabilities of both configurations uses a third harmonic injection method. An experimental investigation validates the operating range extension compared to the pure sinusoidal zero sequence voltage and current injection. Also, the superiority of the single delta configured MMCC for unbalanced loading compensation is validated

A New MMC Topology Which Decreases the Sub Module Voltage Fluctuations at Lower Switching Frequencies and Improves Converter Efficiency

Modular Multi-level inverters (MMCs) are becoming more common because of their suitability for applications in smart grids and multi-terminal HVDC transmission networks. The comparative study between the two classic topologies of MMC (AC side cascaded and DC side cascaded topologies) indicates some disadvantages which can affect their performance. The sub module voltage ripple and switching losses are one of the main issues and the reason for the appearance of the circulating current is sub module capacitor voltage ripple. Hence, the sub module capacitor needs to be large enough to constrain the voltage ripple when operating at lower switching frequencies. However, this is prohibitively uneconomical for the high voltage applications. There is always a trade off in MMC design between the switching frequency and sub module voltage ripple